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r182085 introduced a change that triggered an assertion on ARM. This is an immediate fix

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which doesn't resolve the deeper problem.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182098 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
David Tweed 2013-05-17 14:31:59 +00:00
parent 4456a8ec76
commit 91c623d4ee
1 changed files with 4 additions and 2 deletions
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6
lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
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@ -277,6 +277,7 @@ void RuntimeDyldELF::resolveX86Relocation(const SectionEntry &Section,
} }
} }
// FIXME: PR16013: this routine needs modification to handle repeated relocations.
void RuntimeDyldELF::resolveAArch64Relocation(const SectionEntry &Section, void RuntimeDyldELF::resolveAArch64Relocation(const SectionEntry &Section,
uint64_t Offset, uint64_t Offset,
uint64_t Value, uint64_t Value,
@ -356,6 +357,7 @@ void RuntimeDyldELF::resolveAArch64Relocation(const SectionEntry &Section,
} }
} }
// FIXME: PR16013: this routine needs modification to handle repeated relocations.
void RuntimeDyldELF::resolveARMRelocation(const SectionEntry &Section, void RuntimeDyldELF::resolveARMRelocation(const SectionEntry &Section,
uint64_t Offset, uint64_t Offset,
uint32_t Value, uint32_t Value,
@ -391,8 +393,8 @@ void RuntimeDyldELF::resolveARMRelocation(const SectionEntry &Section,
// We are not expecting any other addend in the relocation address. // We are not expecting any other addend in the relocation address.
// Using 0x000F0FFF because MOVW has its 16 bit immediate split into 2 // Using 0x000F0FFF because MOVW has its 16 bit immediate split into 2
// non-contiguous fields. // non-contiguous fields.
assert((*TargetPtr & 0x000F0FFF) == 0);
Value = Value & 0xFFFF; Value = Value & 0xFFFF;
*TargetPtr &= ~0x000F0FFF; // Not really right; see FIXME at top.
*TargetPtr |= Value & 0xFFF; *TargetPtr |= Value & 0xFFF;
*TargetPtr |= ((Value >> 12) & 0xF) << 16; *TargetPtr |= ((Value >> 12) & 0xF) << 16;
break; break;
@ -402,8 +404,8 @@ void RuntimeDyldELF::resolveARMRelocation(const SectionEntry &Section,
case ELF::R_ARM_MOVT_ABS : case ELF::R_ARM_MOVT_ABS :
// We are not expecting any other addend in the relocation address. // We are not expecting any other addend in the relocation address.
// Use 0x000F0FFF for the same reason as R_ARM_MOVW_ABS_NC. // Use 0x000F0FFF for the same reason as R_ARM_MOVW_ABS_NC.
assert((*TargetPtr & 0x000F0FFF) == 0);
Value = (Value >> 16) & 0xFFFF; Value = (Value >> 16) & 0xFFFF;
*TargetPtr &= ~0x000F0FFF; // Not really right; see FIXME at top.
*TargetPtr |= Value & 0xFFF; *TargetPtr |= Value & 0xFFF;
*TargetPtr |= ((Value >> 12) & 0xF) << 16; *TargetPtr |= ((Value >> 12) & 0xF) << 16;
break; break;