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[mips][ias] Prevent double-filling of delay slots by generating '.set noreorder' regions.
Summary: When clang is given -save-temps or -via-file-asm, any inline assembly in the source is parsed twice. Once by the compiler, and again by the assembler. We must take care to ensure that this doesn't lead to double-filling delay slots. Reviewers: sdardis, vkalintiris Subscribers: dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D19166 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266608 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1930,6 +1930,11 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
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}
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}
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bool FillDelaySlot =
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MCID.hasDelaySlot() && AssemblerOptions.back()->isReorder();
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if (FillDelaySlot)
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getTargetStreamer().emitDirectiveSetNoReorder();
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MacroExpanderResultTy ExpandResult =
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tryExpandInstruction(Inst, IDLoc, Out, STI);
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switch (ExpandResult) {
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@ -1944,8 +1949,10 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
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// If this instruction has a delay slot and .set reorder is active,
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// emit a NOP after it.
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if (MCID.hasDelaySlot() && AssemblerOptions.back()->isReorder())
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if (FillDelaySlot) {
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createNop(hasShortDelaySlot(Inst.getOpcode()), IDLoc, Out, STI);
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getTargetStreamer().emitDirectiveSetReorder();
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}
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if ((Inst.getOpcode() == Mips::JalOneReg ||
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Inst.getOpcode() == Mips::JalTwoReg || ExpandedJalSym) &&
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10
test/MC/Mips/double-expand.s
Normal file
10
test/MC/Mips/double-expand.s
Normal file
@ -0,0 +1,10 @@
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# RUN: llvm-mc -triple=mipsel-unknown-linux < %s | FileCheck %s
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# RUN: llvm-mc -triple=mipsel-unknown-linux < %s | \
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# RUN: llvm-mc -triple=mipsel-unknown-linux | FileCheck %s
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# CHECK: bnez $2, foo
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# CHECK: nop
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# CHECK-NOT: nop
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.text
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bnez $2, foo
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