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[mips] Guard micromips instructions with predicate InMicroMips. Also, fix

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assembler predicate HasStdEnd so that it is false when the target is micromips.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188824 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2013-08-20 20:46:51 +00:00
parent 8b262e5ab8
commit 93877b3cbc
3 changed files with 12 additions and 14 deletions
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20
lib/Target/Mips/MicroMipsInstrInfo.td
View File

@ -28,7 +28,7 @@ class StoreLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
!strconcat(opstr, "\t$rt, $addr"),
[(OpNode RO:$rt, addrimm12:$addr)], NoItinerary, FrmI>;
let DecoderNamespace = "MicroMips" in {
let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in {
/// Arithmetic Instructions (ALU Immediate)
def ADDiu_MM : MMRel, ArithLogicI<"addiu", simm16, GPR32Opnd>,
ADDI_FM_MM<0xc>;
@ -96,14 +96,12 @@ let DecoderNamespace = "MicroMips" in {
defm SW_MM : StoreM<"sw", GPR32Opnd>, MMRel, LW_FM_MM<0x3e>;
/// Load and Store Instructions - unaligned
let Predicates = [InMicroMips] in {
def LWL_MM : LoadLeftRightMM<"lwl", MipsLWL, GPR32Opnd, mem_mm_12>,
LWL_FM_MM<0x0>;
def LWR_MM : LoadLeftRightMM<"lwr", MipsLWR, GPR32Opnd, mem_mm_12>,
LWL_FM_MM<0x1>;
def SWL_MM : StoreLeftRightMM<"swl", MipsSWL, GPR32Opnd, mem_mm_12>,
LWL_FM_MM<0x8>;
def SWR_MM : StoreLeftRightMM<"swr", MipsSWR, GPR32Opnd, mem_mm_12>,
LWL_FM_MM<0x9>;
}
def LWL_MM : LoadLeftRightMM<"lwl", MipsLWL, GPR32Opnd, mem_mm_12>,
LWL_FM_MM<0x0>;
def LWR_MM : LoadLeftRightMM<"lwr", MipsLWR, GPR32Opnd, mem_mm_12>,
LWL_FM_MM<0x1>;
def SWL_MM : StoreLeftRightMM<"swl", MipsSWL, GPR32Opnd, mem_mm_12>,
LWL_FM_MM<0x8>;
def SWR_MM : StoreLeftRightMM<"swr", MipsSWR, GPR32Opnd, mem_mm_12>,
LWL_FM_MM<0x9>;
}

2
lib/Target/Mips/MipsInstrInfo.td
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@ -180,7 +180,7 @@ def RelocPIC : Predicate<"TM.getRelocationModel() == Reloc::PIC_">,
def NoNaNsFPMath : Predicate<"TM.Options.NoNaNsFPMath">,
AssemblerPredicate<"FeatureMips32">;
def HasStdEnc : Predicate<"Subtarget.hasStandardEncoding()">,
AssemblerPredicate<"!FeatureMips16">;
AssemblerPredicate<"!FeatureMips16,!FeatureMicroMips">;
def NotDSP : Predicate<"!Subtarget.hasDSP()">;
def InMicroMips : Predicate<"Subtarget.inMicroMipsMode()">,
AssemblerPredicate<"FeatureMicroMips">;

4
test/MC/Mips/micromips-alu-instructions.s
View File

@ -32,7 +32,7 @@
# CHECK-EL: xori $9, $6, 17767 # encoding: [0x26,0x71,0x67,0x45]
# CHECK-EL: xori $9, $6, 17767 # encoding: [0x26,0x71,0x67,0x45]
# CHECK-EL: nor $9, $6, $7 # encoding: [0xe6,0x00,0xd0,0x4a]
# CHECK-EL: not $7, $8 # encoding: [0x08,0x00,0xd0,0x3a]
# CHECK-EL: nor $7, $8, $zero # encoding: [0x08,0x00,0xd0,0x3a]
# CHECK-EL: mul $9, $6, $7 # encoding: [0xe6,0x00,0x10,0x4a]
# CHECK-EL: mult $9, $7 # encoding: [0xe9,0x00,0x3c,0x8b]
# CHECK-EL: multu $9, $7 # encoding: [0xe9,0x00,0x3c,0x9b]
@ -64,7 +64,7 @@
# CHECK-EB: xori $9, $6, 17767 # encoding: [0x71,0x26,0x45,0x67]
# CHECK-EB: xori $9, $6, 17767 # encoding: [0x71,0x26,0x45,0x67]
# CHECK-EB: nor $9, $6, $7 # encoding: [0x00,0xe6,0x4a,0xd0]
# CHECK-EB: not $7, $8 # encoding: [0x00,0x08,0x3a,0xd0]
# CHECK-EB: nor $7, $8, $zero # encoding: [0x00,0x08,0x3a,0xd0]
# CHECK-EB: mul $9, $6, $7 # encoding: [0x00,0xe6,0x4a,0x10]
# CHECK-EB: mult $9, $7 # encoding: [0x00,0xe9,0x8b,0x3c]
# CHECK-EB: multu $9, $7 # encoding: [0x00,0xe9,0x9b,0x3c]