mirror of
https://github.com/RPCSX/llvm.git
synced 2025-03-03 02:17:41 +00:00
CodeGen: Rename DEBUG_TYPE to match passnames
Rename the DEBUG_TYPE to match the names of corresponding passes where it makes sense. Also establish the pattern of simply referencing DEBUG_TYPE instead of repeating the passname where possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303921 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matthias Braun
parent
064b7cce39
commit
94c4904dc5
@ -96,7 +96,7 @@ namespace {
|
||||
|
||||
char AtomicExpand::ID = 0;
|
||||
char &llvm::AtomicExpandID = AtomicExpand::ID;
|
||||
INITIALIZE_PASS(AtomicExpand, "atomic-expand", "Expand Atomic instructions",
|
||||
INITIALIZE_PASS(AtomicExpand, DEBUG_TYPE, "Expand Atomic instructions",
|
||||
false, false)
|
||||
|
||||
FunctionPass *llvm::createAtomicExpandPass() { return new AtomicExpand(); }
|
||||
|
||||
@ -24,8 +24,6 @@
|
||||
#include <utility>
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "basictti"
|
||||
|
||||
// This flag is used by the template base class for BasicTTIImpl, and here to
|
||||
// provide a definition.
|
||||
cl::opt<unsigned>
|
||||
|
||||
@ -27,7 +27,7 @@
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "coal-branch"
|
||||
#define DEBUG_TYPE "branch-coalescing"
|
||||
|
||||
static cl::opt<cl::boolOrDefault>
|
||||
EnableBranchCoalescing("enable-branch-coalesce", cl::Hidden,
|
||||
@ -193,11 +193,11 @@ public:
|
||||
char BranchCoalescing::ID = 0;
|
||||
char &llvm::BranchCoalescingID = BranchCoalescing::ID;
|
||||
|
||||
INITIALIZE_PASS_BEGIN(BranchCoalescing, "branch-coalescing",
|
||||
INITIALIZE_PASS_BEGIN(BranchCoalescing, DEBUG_TYPE,
|
||||
"Branch Coalescing", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree)
|
||||
INITIALIZE_PASS_END(BranchCoalescing, "branch-coalescing", "Branch Coalescing",
|
||||
INITIALIZE_PASS_END(BranchCoalescing, DEBUG_TYPE, "Branch Coalescing",
|
||||
false, false)
|
||||
|
||||
BranchCoalescing::CoalescingCandidateInfo::CoalescingCandidateInfo()
|
||||
|
||||
@ -44,7 +44,7 @@
|
||||
#include <algorithm>
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "branchfolding"
|
||||
#define DEBUG_TYPE "branch-folder"
|
||||
|
||||
STATISTIC(NumDeadBlocks, "Number of dead blocks removed");
|
||||
STATISTIC(NumBranchOpts, "Number of branches optimized");
|
||||
@ -89,7 +89,7 @@ namespace {
|
||||
char BranchFolderPass::ID = 0;
|
||||
char &llvm::BranchFolderPassID = BranchFolderPass::ID;
|
||||
|
||||
INITIALIZE_PASS(BranchFolderPass, "branch-folder",
|
||||
INITIALIZE_PASS(BranchFolderPass, DEBUG_TYPE,
|
||||
"Control Flow Optimizer", false, false)
|
||||
|
||||
bool BranchFolderPass::runOnMachineFunction(MachineFunction &MF) {
|
||||
|
||||
@ -257,10 +257,10 @@ class TypePromotionTransaction;
|
||||
}
|
||||
|
||||
char CodeGenPrepare::ID = 0;
|
||||
INITIALIZE_PASS_BEGIN(CodeGenPrepare, "codegenprepare",
|
||||
INITIALIZE_PASS_BEGIN(CodeGenPrepare, DEBUG_TYPE,
|
||||
"Optimize for code generation", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(ProfileSummaryInfoWrapperPass)
|
||||
INITIALIZE_PASS_END(CodeGenPrepare, "codegenprepare",
|
||||
INITIALIZE_PASS_END(CodeGenPrepare, DEBUG_TYPE,
|
||||
"Optimize for code generation", false, false)
|
||||
|
||||
FunctionPass *llvm::createCodeGenPreparePass() { return new CodeGenPrepare(); }
|
||||
|
||||
@ -23,7 +23,7 @@
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "codegen-dce"
|
||||
#define DEBUG_TYPE "dead-mi-elimination"
|
||||
|
||||
STATISTIC(NumDeletes, "Number of dead instructions deleted");
|
||||
|
||||
@ -54,7 +54,7 @@ namespace {
|
||||
char DeadMachineInstructionElim::ID = 0;
|
||||
char &llvm::DeadMachineInstructionElimID = DeadMachineInstructionElim::ID;
|
||||
|
||||
INITIALIZE_PASS(DeadMachineInstructionElim, "dead-mi-elimination",
|
||||
INITIALIZE_PASS(DeadMachineInstructionElim, DEBUG_TYPE,
|
||||
"Remove dead machine instructions", false, false)
|
||||
|
||||
bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const {
|
||||
|
||||
@ -132,8 +132,7 @@ private:
|
||||
char DetectDeadLanes::ID = 0;
|
||||
char &llvm::DetectDeadLanesID = DetectDeadLanes::ID;
|
||||
|
||||
INITIALIZE_PASS(DetectDeadLanes, "detect-dead-lanes", "Detect Dead Lanes",
|
||||
false, false)
|
||||
INITIALIZE_PASS(DetectDeadLanes, DEBUG_TYPE, "Detect Dead Lanes", false, false)
|
||||
|
||||
/// Returns true if \p MI will get lowered to a series of COPY instructions.
|
||||
/// We call this a COPY-like instruction.
|
||||
|
||||
@ -71,12 +71,12 @@ namespace {
|
||||
} // end anonymous namespace
|
||||
|
||||
char DwarfEHPrepare::ID = 0;
|
||||
INITIALIZE_PASS_BEGIN(DwarfEHPrepare, "dwarfehprepare",
|
||||
INITIALIZE_PASS_BEGIN(DwarfEHPrepare, DEBUG_TYPE,
|
||||
"Prepare DWARF exceptions", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
|
||||
INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
|
||||
INITIALIZE_PASS_DEPENDENCY(TargetTransformInfoWrapperPass)
|
||||
INITIALIZE_PASS_END(DwarfEHPrepare, "dwarfehprepare",
|
||||
INITIALIZE_PASS_END(DwarfEHPrepare, DEBUG_TYPE,
|
||||
"Prepare DWARF exceptions", false, false)
|
||||
|
||||
FunctionPass *llvm::createDwarfEHPass() { return new DwarfEHPrepare(); }
|
||||
|
||||
@ -616,13 +616,13 @@ private:
|
||||
char EarlyIfConverter::ID = 0;
|
||||
char &llvm::EarlyIfConverterID = EarlyIfConverter::ID;
|
||||
|
||||
INITIALIZE_PASS_BEGIN(EarlyIfConverter,
|
||||
"early-ifcvt", "Early If Converter", false, false)
|
||||
INITIALIZE_PASS_BEGIN(EarlyIfConverter, DEBUG_TYPE,
|
||||
"Early If Converter", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineTraceMetrics)
|
||||
INITIALIZE_PASS_END(EarlyIfConverter,
|
||||
"early-ifcvt", "Early If Converter", false, false)
|
||||
INITIALIZE_PASS_END(EarlyIfConverter, DEBUG_TYPE,
|
||||
"Early If Converter", false, false)
|
||||
|
||||
void EarlyIfConverter::getAnalysisUsage(AnalysisUsage &AU) const {
|
||||
AU.addRequired<MachineBranchProbabilityInfo>();
|
||||
|
||||
@ -41,7 +41,7 @@ namespace {
|
||||
|
||||
char ExpandISelPseudos::ID = 0;
|
||||
char &llvm::ExpandISelPseudosID = ExpandISelPseudos::ID;
|
||||
INITIALIZE_PASS(ExpandISelPseudos, "expand-isel-pseudos",
|
||||
INITIALIZE_PASS(ExpandISelPseudos, DEBUG_TYPE,
|
||||
"Expand ISel Pseudo-instructions", false, false)
|
||||
|
||||
bool ExpandISelPseudos::runOnMachineFunction(MachineFunction &MF) {
|
||||
|
||||
@ -58,7 +58,7 @@ private:
|
||||
char ExpandPostRA::ID = 0;
|
||||
char &llvm::ExpandPostRAPseudosID = ExpandPostRA::ID;
|
||||
|
||||
INITIALIZE_PASS(ExpandPostRA, "postrapseudos",
|
||||
INITIALIZE_PASS(ExpandPostRA, DEBUG_TYPE,
|
||||
"Post-RA pseudo instruction expansion pass", false, false)
|
||||
|
||||
/// TransferImplicitOperands - MI is a pseudo-instruction, and the lowered
|
||||
|
||||
@ -37,7 +37,7 @@ public:
|
||||
|
||||
char FuncletLayout::ID = 0;
|
||||
char &llvm::FuncletLayoutID = FuncletLayout::ID;
|
||||
INITIALIZE_PASS(FuncletLayout, "funclet-layout",
|
||||
INITIALIZE_PASS(FuncletLayout, DEBUG_TYPE,
|
||||
"Contiguously Lay Out Funclets", false, false)
|
||||
|
||||
bool FuncletLayout::runOnMachineFunction(MachineFunction &F) {
|
||||
|
||||
@ -192,10 +192,7 @@ namespace {
|
||||
} // end anonymous namespace
|
||||
|
||||
char GlobalMerge::ID = 0;
|
||||
INITIALIZE_PASS_BEGIN(GlobalMerge, "global-merge", "Merge global variables",
|
||||
false, false)
|
||||
INITIALIZE_PASS_END(GlobalMerge, "global-merge", "Merge global variables",
|
||||
false, false)
|
||||
INITIALIZE_PASS(GlobalMerge, DEBUG_TYPE, "Merge global variables", false, false)
|
||||
|
||||
bool GlobalMerge::doMerge(SmallVectorImpl<GlobalVariable*> &Globals,
|
||||
Module &M, bool isConst, unsigned AddrSpace) const {
|
||||
|
||||
@ -39,7 +39,7 @@
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "ifcvt"
|
||||
#define DEBUG_TYPE "if-converter"
|
||||
|
||||
// Hidden options for help debugging.
|
||||
static cl::opt<int> IfCvtFnStart("ifcvt-fn-start", cl::init(-1), cl::Hidden);
|
||||
@ -316,9 +316,9 @@ namespace {
|
||||
|
||||
char &llvm::IfConverterID = IfConverter::ID;
|
||||
|
||||
INITIALIZE_PASS_BEGIN(IfConverter, "if-converter", "If Converter", false, false)
|
||||
INITIALIZE_PASS_BEGIN(IfConverter, DEBUG_TYPE, "If Converter", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
|
||||
INITIALIZE_PASS_END(IfConverter, "if-converter", "If Converter", false, false)
|
||||
INITIALIZE_PASS_END(IfConverter, DEBUG_TYPE, "If Converter", false, false)
|
||||
|
||||
bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
|
||||
if (skipFunction(*MF.getFunction()) || (PredicateFtor && !PredicateFtor(MF)))
|
||||
|
||||
@ -674,8 +674,8 @@ void ImplicitNullChecks::rewriteNullChecks(
|
||||
|
||||
char ImplicitNullChecks::ID = 0;
|
||||
char &llvm::ImplicitNullChecksID = ImplicitNullChecks::ID;
|
||||
INITIALIZE_PASS_BEGIN(ImplicitNullChecks, "implicit-null-checks",
|
||||
INITIALIZE_PASS_BEGIN(ImplicitNullChecks, DEBUG_TYPE,
|
||||
"Implicit null checks", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
|
||||
INITIALIZE_PASS_END(ImplicitNullChecks, "implicit-null-checks",
|
||||
INITIALIZE_PASS_END(ImplicitNullChecks, DEBUG_TYPE,
|
||||
"Implicit null checks", false, false)
|
||||
|
||||
@ -107,13 +107,11 @@ private:
|
||||
} // end anonymous namespace.
|
||||
|
||||
char InterleavedAccess::ID = 0;
|
||||
INITIALIZE_PASS_BEGIN(
|
||||
InterleavedAccess, "interleaved-access",
|
||||
INITIALIZE_PASS_BEGIN(InterleavedAccess, DEBUG_TYPE,
|
||||
"Lower interleaved memory accesses to target specific intrinsics", false,
|
||||
false)
|
||||
INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
|
||||
INITIALIZE_PASS_END(
|
||||
InterleavedAccess, "interleaved-access",
|
||||
INITIALIZE_PASS_END(InterleavedAccess, DEBUG_TYPE,
|
||||
"Lower interleaved memory accesses to target specific intrinsics", false,
|
||||
false)
|
||||
|
||||
|
||||
@ -43,7 +43,7 @@
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "live-debug-values"
|
||||
#define DEBUG_TYPE "livedebugvalues"
|
||||
|
||||
STATISTIC(NumInserted, "Number of DBG_VALUE instructions inserted");
|
||||
|
||||
@ -283,7 +283,7 @@ public:
|
||||
|
||||
char LiveDebugValues::ID = 0;
|
||||
char &llvm::LiveDebugValuesID = LiveDebugValues::ID;
|
||||
INITIALIZE_PASS(LiveDebugValues, "livedebugvalues", "Live DEBUG_VALUE analysis",
|
||||
INITIALIZE_PASS(LiveDebugValues, DEBUG_TYPE, "Live DEBUG_VALUE analysis",
|
||||
false, false)
|
||||
|
||||
/// Default construct and initialize the pass.
|
||||
|
||||
@ -45,7 +45,7 @@
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "livedebug"
|
||||
#define DEBUG_TYPE "livedebugvars"
|
||||
|
||||
static cl::opt<bool>
|
||||
EnableLDV("live-debug-variables", cl::init(true),
|
||||
@ -54,11 +54,11 @@ EnableLDV("live-debug-variables", cl::init(true),
|
||||
STATISTIC(NumInsertedDebugValues, "Number of DBG_VALUEs inserted");
|
||||
char LiveDebugVariables::ID = 0;
|
||||
|
||||
INITIALIZE_PASS_BEGIN(LiveDebugVariables, "livedebugvars",
|
||||
INITIALIZE_PASS_BEGIN(LiveDebugVariables, DEBUG_TYPE,
|
||||
"Debug Variable Analysis", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
|
||||
INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
|
||||
INITIALIZE_PASS_END(LiveDebugVariables, "livedebugvars",
|
||||
INITIALIZE_PASS_END(LiveDebugVariables, DEBUG_TYPE,
|
||||
"Debug Variable Analysis", false, false)
|
||||
|
||||
void LiveDebugVariables::getAnalysisUsage(AnalysisUsage &AU) const {
|
||||
|
||||
@ -25,10 +25,10 @@ using namespace llvm;
|
||||
#define DEBUG_TYPE "livestacks"
|
||||
|
||||
char LiveStacks::ID = 0;
|
||||
INITIALIZE_PASS_BEGIN(LiveStacks, "livestacks",
|
||||
INITIALIZE_PASS_BEGIN(LiveStacks, DEBUG_TYPE,
|
||||
"Live Stack Slot Analysis", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
|
||||
INITIALIZE_PASS_END(LiveStacks, "livestacks",
|
||||
INITIALIZE_PASS_END(LiveStacks, DEBUG_TYPE,
|
||||
"Live Stack Slot Analysis", false, false)
|
||||
|
||||
char &llvm::LiveStacksID = LiveStacks::ID;
|
||||
|
||||
@ -103,10 +103,10 @@ namespace {
|
||||
|
||||
char LocalStackSlotPass::ID = 0;
|
||||
char &llvm::LocalStackSlotAllocationID = LocalStackSlotPass::ID;
|
||||
INITIALIZE_PASS_BEGIN(LocalStackSlotPass, "localstackalloc",
|
||||
INITIALIZE_PASS_BEGIN(LocalStackSlotPass, DEBUG_TYPE,
|
||||
"Local Stack Slot Allocation", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(StackProtector)
|
||||
INITIALIZE_PASS_END(LocalStackSlotPass, "localstackalloc",
|
||||
INITIALIZE_PASS_END(LocalStackSlotPass, DEBUG_TYPE,
|
||||
"Local Stack Slot Allocation", false, false)
|
||||
|
||||
|
||||
|
||||
@ -53,7 +53,7 @@ private:
|
||||
|
||||
char LowerEmuTLS::ID = 0;
|
||||
|
||||
INITIALIZE_PASS(LowerEmuTLS, "loweremutls",
|
||||
INITIALIZE_PASS(LowerEmuTLS, DEBUG_TYPE,
|
||||
"Add __emutls_[vt]. variables for emultated TLS model", false,
|
||||
false)
|
||||
|
||||
|
||||
@ -26,7 +26,7 @@
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "block-freq"
|
||||
#define DEBUG_TYPE "machine-block-freq"
|
||||
|
||||
|
||||
static cl::opt<GVDAGType> ViewMachineBlockFreqPropagationDAG(
|
||||
@ -149,11 +149,11 @@ struct DOTGraphTraits<MachineBlockFrequencyInfo *>
|
||||
|
||||
} // end namespace llvm
|
||||
|
||||
INITIALIZE_PASS_BEGIN(MachineBlockFrequencyInfo, "machine-block-freq",
|
||||
INITIALIZE_PASS_BEGIN(MachineBlockFrequencyInfo, DEBUG_TYPE,
|
||||
"Machine Block Frequency Analysis", true, true)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
|
||||
INITIALIZE_PASS_END(MachineBlockFrequencyInfo, "machine-block-freq",
|
||||
INITIALIZE_PASS_END(MachineBlockFrequencyInfo, DEBUG_TYPE,
|
||||
"Machine Block Frequency Analysis", true, true)
|
||||
|
||||
char MachineBlockFrequencyInfo::ID = 0;
|
||||
|
||||
@ -499,13 +499,13 @@ public:
|
||||
|
||||
char MachineBlockPlacement::ID = 0;
|
||||
char &llvm::MachineBlockPlacementID = MachineBlockPlacement::ID;
|
||||
INITIALIZE_PASS_BEGIN(MachineBlockPlacement, "block-placement",
|
||||
INITIALIZE_PASS_BEGIN(MachineBlockPlacement, DEBUG_TYPE,
|
||||
"Branch Probability Basic Block Placement", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
|
||||
INITIALIZE_PASS_END(MachineBlockPlacement, "block-placement",
|
||||
INITIALIZE_PASS_END(MachineBlockPlacement, DEBUG_TYPE,
|
||||
"Branch Probability Basic Block Placement", false, false)
|
||||
|
||||
#ifndef NDEBUG
|
||||
|
||||
@ -108,12 +108,12 @@ namespace {
|
||||
|
||||
char MachineCSE::ID = 0;
|
||||
char &llvm::MachineCSEID = MachineCSE::ID;
|
||||
INITIALIZE_PASS_BEGIN(MachineCSE, "machine-cse",
|
||||
"Machine Common Subexpression Elimination", false, false)
|
||||
INITIALIZE_PASS_BEGIN(MachineCSE, DEBUG_TYPE,
|
||||
"Machine Common Subexpression Elimination", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
|
||||
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
|
||||
INITIALIZE_PASS_END(MachineCSE, "machine-cse",
|
||||
"Machine Common Subexpression Elimination", false, false)
|
||||
INITIALIZE_PASS_END(MachineCSE, DEBUG_TYPE,
|
||||
"Machine Common Subexpression Elimination", false, false)
|
||||
|
||||
/// The source register of a COPY machine instruction can be propagated to all
|
||||
/// its users, and this propagation could increase the probability of finding
|
||||
|
||||
@ -86,11 +86,11 @@ private:
|
||||
char MachineCombiner::ID = 0;
|
||||
char &llvm::MachineCombinerID = MachineCombiner::ID;
|
||||
|
||||
INITIALIZE_PASS_BEGIN(MachineCombiner, "machine-combiner",
|
||||
INITIALIZE_PASS_BEGIN(MachineCombiner, DEBUG_TYPE,
|
||||
"Machine InstCombiner", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineTraceMetrics)
|
||||
INITIALIZE_PASS_END(MachineCombiner, "machine-combiner", "Machine InstCombiner",
|
||||
INITIALIZE_PASS_END(MachineCombiner, DEBUG_TYPE, "Machine InstCombiner",
|
||||
false, false)
|
||||
|
||||
void MachineCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
|
||||
|
||||
@ -27,7 +27,7 @@
|
||||
#include "llvm/Target/TargetSubtargetInfo.h"
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "codegen-cp"
|
||||
#define DEBUG_TYPE "machine-cp"
|
||||
|
||||
STATISTIC(NumDeletes, "Number of dead copies deleted");
|
||||
|
||||
@ -79,7 +79,7 @@ namespace {
|
||||
char MachineCopyPropagation::ID = 0;
|
||||
char &llvm::MachineCopyPropagationID = MachineCopyPropagation::ID;
|
||||
|
||||
INITIALIZE_PASS(MachineCopyPropagation, "machine-cp",
|
||||
INITIALIZE_PASS(MachineCopyPropagation, DEBUG_TYPE,
|
||||
"Machine Copy Propagation Pass", false, false)
|
||||
|
||||
/// Remove any entry in \p Map where the register is a subregister or equal to
|
||||
|
||||
@ -38,7 +38,7 @@
|
||||
#include "llvm/Target/TargetSubtargetInfo.h"
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "machine-licm"
|
||||
#define DEBUG_TYPE "machinelicm"
|
||||
|
||||
static cl::opt<bool>
|
||||
AvoidSpeculation("avoid-speculation",
|
||||
@ -237,13 +237,13 @@ namespace {
|
||||
|
||||
char MachineLICM::ID = 0;
|
||||
char &llvm::MachineLICMID = MachineLICM::ID;
|
||||
INITIALIZE_PASS_BEGIN(MachineLICM, "machinelicm",
|
||||
"Machine Loop Invariant Code Motion", false, false)
|
||||
INITIALIZE_PASS_BEGIN(MachineLICM, DEBUG_TYPE,
|
||||
"Machine Loop Invariant Code Motion", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
|
||||
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
|
||||
INITIALIZE_PASS_END(MachineLICM, "machinelicm",
|
||||
"Machine Loop Invariant Code Motion", false, false)
|
||||
INITIALIZE_PASS_END(MachineLICM, DEBUG_TYPE,
|
||||
"Machine Loop Invariant Code Motion", false, false)
|
||||
|
||||
/// Test if the given loop is the outer-most loop that has a unique predecessor.
|
||||
static bool LoopIsOuterMostWithPredecessor(MachineLoop *CurLoop) {
|
||||
|
||||
@ -901,7 +901,7 @@ namespace llvm {
|
||||
ModulePass *createMachineOutlinerPass() { return new MachineOutliner(); }
|
||||
}
|
||||
|
||||
INITIALIZE_PASS(MachineOutliner, "machine-outliner",
|
||||
INITIALIZE_PASS(MachineOutliner, DEBUG_TYPE,
|
||||
"Machine Function Outliner", false, false)
|
||||
|
||||
void MachineOutliner::pruneOverlaps(std::vector<Candidate> &CandidateList,
|
||||
|
||||
@ -715,13 +715,13 @@ char MachinePipeliner::ID = 0;
|
||||
int MachinePipeliner::NumTries = 0;
|
||||
#endif
|
||||
char &llvm::MachinePipelinerID = MachinePipeliner::ID;
|
||||
INITIALIZE_PASS_BEGIN(MachinePipeliner, "pipeliner",
|
||||
INITIALIZE_PASS_BEGIN(MachinePipeliner, DEBUG_TYPE,
|
||||
"Modulo Software Pipelining", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
|
||||
INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
|
||||
INITIALIZE_PASS_END(MachinePipeliner, "pipeliner",
|
||||
INITIALIZE_PASS_END(MachinePipeliner, DEBUG_TYPE,
|
||||
"Modulo Software Pipelining", false, false)
|
||||
|
||||
/// The "main" function for implementing Swing Modulo Scheduling.
|
||||
|
||||
@ -69,7 +69,7 @@
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "misched"
|
||||
#define DEBUG_TYPE "machine-scheduler"
|
||||
|
||||
namespace llvm {
|
||||
|
||||
@ -191,13 +191,13 @@ char MachineScheduler::ID = 0;
|
||||
|
||||
char &llvm::MachineSchedulerID = MachineScheduler::ID;
|
||||
|
||||
INITIALIZE_PASS_BEGIN(MachineScheduler, "machine-scheduler",
|
||||
INITIALIZE_PASS_BEGIN(MachineScheduler, DEBUG_TYPE,
|
||||
"Machine Instruction Scheduler", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
|
||||
INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
|
||||
INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
|
||||
INITIALIZE_PASS_END(MachineScheduler, "machine-scheduler",
|
||||
INITIALIZE_PASS_END(MachineScheduler, DEBUG_TYPE,
|
||||
"Machine Instruction Scheduler", false, false)
|
||||
|
||||
MachineScheduler::MachineScheduler()
|
||||
|
||||
@ -173,14 +173,14 @@ namespace {
|
||||
|
||||
char MachineSinking::ID = 0;
|
||||
char &llvm::MachineSinkingID = MachineSinking::ID;
|
||||
INITIALIZE_PASS_BEGIN(MachineSinking, "machine-sink",
|
||||
"Machine code sinking", false, false)
|
||||
INITIALIZE_PASS_BEGIN(MachineSinking, DEBUG_TYPE,
|
||||
"Machine code sinking", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
|
||||
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
|
||||
INITIALIZE_PASS_END(MachineSinking, "machine-sink",
|
||||
"Machine code sinking", false, false)
|
||||
INITIALIZE_PASS_END(MachineSinking, DEBUG_TYPE,
|
||||
"Machine code sinking", false, false)
|
||||
|
||||
bool MachineSinking::PerformTrivialForwardCoalescing(MachineInstr &MI,
|
||||
MachineBasicBlock *MBB) {
|
||||
|
||||
@ -44,12 +44,12 @@ using namespace llvm;
|
||||
char MachineTraceMetrics::ID = 0;
|
||||
char &llvm::MachineTraceMetricsID = MachineTraceMetrics::ID;
|
||||
|
||||
INITIALIZE_PASS_BEGIN(MachineTraceMetrics,
|
||||
"machine-trace-metrics", "Machine Trace Metrics", false, true)
|
||||
INITIALIZE_PASS_BEGIN(MachineTraceMetrics, DEBUG_TYPE,
|
||||
"Machine Trace Metrics", false, true)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
|
||||
INITIALIZE_PASS_END(MachineTraceMetrics,
|
||||
"machine-trace-metrics", "Machine Trace Metrics", false, true)
|
||||
INITIALIZE_PASS_END(MachineTraceMetrics, DEBUG_TYPE,
|
||||
"Machine Trace Metrics", false, true)
|
||||
|
||||
MachineTraceMetrics::MachineTraceMetrics() : MachineFunctionPass(ID) {
|
||||
std::fill(std::begin(Ensembles), std::end(Ensembles), nullptr);
|
||||
|
||||
@ -23,7 +23,7 @@
|
||||
#include "llvm/Target/TargetSubtargetInfo.h"
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "phi-opt"
|
||||
#define DEBUG_TYPE "opt-phis"
|
||||
|
||||
STATISTIC(NumPHICycles, "Number of PHI cycles replaced");
|
||||
STATISTIC(NumDeadPHICycles, "Number of dead PHI cycles");
|
||||
@ -59,7 +59,7 @@ namespace {
|
||||
|
||||
char OptimizePHIs::ID = 0;
|
||||
char &llvm::OptimizePHIsID = OptimizePHIs::ID;
|
||||
INITIALIZE_PASS(OptimizePHIs, "opt-phis",
|
||||
INITIALIZE_PASS(OptimizePHIs, DEBUG_TYPE,
|
||||
"Optimize machine instruction PHIs", false, false)
|
||||
|
||||
bool OptimizePHIs::runOnMachineFunction(MachineFunction &Fn) {
|
||||
|
||||
@ -112,11 +112,11 @@ STATISTIC(NumReused, "Number of reused lowered phis");
|
||||
char PHIElimination::ID = 0;
|
||||
char& llvm::PHIEliminationID = PHIElimination::ID;
|
||||
|
||||
INITIALIZE_PASS_BEGIN(PHIElimination, "phi-node-elimination",
|
||||
INITIALIZE_PASS_BEGIN(PHIElimination, DEBUG_TYPE,
|
||||
"Eliminate PHI nodes for register allocation",
|
||||
false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(LiveVariables)
|
||||
INITIALIZE_PASS_END(PHIElimination, "phi-node-elimination",
|
||||
INITIALIZE_PASS_END(PHIElimination, DEBUG_TYPE,
|
||||
"Eliminate PHI nodes for register allocation", false, false)
|
||||
|
||||
void PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const {
|
||||
|
||||
@ -200,7 +200,7 @@ namespace {
|
||||
|
||||
char &llvm::PostRASchedulerID = PostRAScheduler::ID;
|
||||
|
||||
INITIALIZE_PASS(PostRAScheduler, "post-RA-sched",
|
||||
INITIALIZE_PASS(PostRAScheduler, DEBUG_TYPE,
|
||||
"Post RA top-down list latency scheduler", false, false)
|
||||
|
||||
SchedulePostRATDList::SchedulePostRATDList(
|
||||
|
||||
@ -20,7 +20,7 @@
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "processimplicitdefs"
|
||||
#define DEBUG_TYPE "processimpdefs"
|
||||
|
||||
namespace {
|
||||
/// Process IMPLICIT_DEF instructions and make sure there is one implicit_def
|
||||
@ -51,9 +51,7 @@ public:
|
||||
char ProcessImplicitDefs::ID = 0;
|
||||
char &llvm::ProcessImplicitDefsID = ProcessImplicitDefs::ID;
|
||||
|
||||
INITIALIZE_PASS_BEGIN(ProcessImplicitDefs, "processimpdefs",
|
||||
"Process Implicit Definitions", false, false)
|
||||
INITIALIZE_PASS_END(ProcessImplicitDefs, "processimpdefs",
|
||||
INITIALIZE_PASS(ProcessImplicitDefs, DEBUG_TYPE,
|
||||
"Process Implicit Definitions", false, false)
|
||||
|
||||
void ProcessImplicitDefs::getAnalysisUsage(AnalysisUsage &AU) const {
|
||||
|
||||
@ -45,7 +45,7 @@
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "pei"
|
||||
#define DEBUG_TYPE "prologepilog"
|
||||
|
||||
typedef SmallVector<MachineBasicBlock *, 4> MBBVector;
|
||||
static void doSpillCalleeSavedRegs(MachineFunction &MF, RegScavenger *RS,
|
||||
@ -129,12 +129,12 @@ WarnStackSize("warn-stack-size", cl::Hidden, cl::init((unsigned)-1),
|
||||
cl::desc("Warn for stack size bigger than the given"
|
||||
" number"));
|
||||
|
||||
INITIALIZE_PASS_BEGIN(PEI, "prologepilog", "Prologue/Epilogue Insertion", false,
|
||||
INITIALIZE_PASS_BEGIN(PEI, DEBUG_TYPE, "Prologue/Epilogue Insertion", false,
|
||||
false)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
|
||||
INITIALIZE_PASS_DEPENDENCY(StackProtector)
|
||||
INITIALIZE_PASS_END(PEI, "prologepilog",
|
||||
INITIALIZE_PASS_END(PEI, DEBUG_TYPE,
|
||||
"Prologue/Epilogue Insertion & Frame Finalization", false,
|
||||
false)
|
||||
|
||||
|
||||
@ -112,11 +112,11 @@ char RenameIndependentSubregs::ID;
|
||||
|
||||
char &llvm::RenameIndependentSubregsID = RenameIndependentSubregs::ID;
|
||||
|
||||
INITIALIZE_PASS_BEGIN(RenameIndependentSubregs, "rename-independent-subregs",
|
||||
INITIALIZE_PASS_BEGIN(RenameIndependentSubregs, DEBUG_TYPE,
|
||||
"Rename Independent Subregisters", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
|
||||
INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
|
||||
INITIALIZE_PASS_END(RenameIndependentSubregs, "rename-independent-subregs",
|
||||
INITIALIZE_PASS_END(RenameIndependentSubregs, DEBUG_TYPE,
|
||||
"Rename Independent Subregisters", false, false)
|
||||
|
||||
bool RenameIndependentSubregs::renameComponents(LiveInterval &LI) const {
|
||||
|
||||
@ -52,7 +52,7 @@
|
||||
using namespace llvm;
|
||||
using namespace llvm::safestack;
|
||||
|
||||
#define DEBUG_TYPE "safestack"
|
||||
#define DEBUG_TYPE "safe-stack"
|
||||
|
||||
namespace llvm {
|
||||
|
||||
@ -820,10 +820,10 @@ public:
|
||||
} // anonymous namespace
|
||||
|
||||
char SafeStackLegacyPass::ID = 0;
|
||||
INITIALIZE_PASS_BEGIN(SafeStackLegacyPass, "safe-stack",
|
||||
INITIALIZE_PASS_BEGIN(SafeStackLegacyPass, DEBUG_TYPE,
|
||||
"Safe Stack instrumentation pass", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
|
||||
INITIALIZE_PASS_END(SafeStackLegacyPass, "safe-stack",
|
||||
INITIALIZE_PASS_END(SafeStackLegacyPass, DEBUG_TYPE,
|
||||
"Safe Stack instrumentation pass", false, false)
|
||||
|
||||
FunctionPass *llvm::createSafeStackPass() { return new SafeStackLegacyPass(); }
|
||||
|
||||
@ -49,12 +49,8 @@ private:
|
||||
} // namespace
|
||||
|
||||
char ScalarizeMaskedMemIntrin::ID = 0;
|
||||
INITIALIZE_PASS_BEGIN(ScalarizeMaskedMemIntrin, "scalarize-masked-mem-intrin",
|
||||
"Scalarize unsupported masked memory intrinsics", false,
|
||||
false)
|
||||
INITIALIZE_PASS_END(ScalarizeMaskedMemIntrin, "scalarize-masked-mem-intrin",
|
||||
"Scalarize unsupported masked memory intrinsics", false,
|
||||
false)
|
||||
INITIALIZE_PASS(ScalarizeMaskedMemIntrin, DEBUG_TYPE,
|
||||
"Scalarize unsupported masked memory intrinsics", false, false)
|
||||
|
||||
FunctionPass *llvm::createScalarizeMaskedMemIntrinPass() {
|
||||
return new ScalarizeMaskedMemIntrin();
|
||||
|
||||
@ -27,7 +27,7 @@
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "shadowstackgclowering"
|
||||
#define DEBUG_TYPE "shadow-stack-gc-lowering"
|
||||
|
||||
namespace {
|
||||
|
||||
@ -66,10 +66,10 @@ private:
|
||||
};
|
||||
}
|
||||
|
||||
INITIALIZE_PASS_BEGIN(ShadowStackGCLowering, "shadow-stack-gc-lowering",
|
||||
INITIALIZE_PASS_BEGIN(ShadowStackGCLowering, DEBUG_TYPE,
|
||||
"Shadow Stack GC Lowering", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(GCModuleInfo)
|
||||
INITIALIZE_PASS_END(ShadowStackGCLowering, "shadow-stack-gc-lowering",
|
||||
INITIALIZE_PASS_END(ShadowStackGCLowering, DEBUG_TYPE,
|
||||
"Shadow Stack GC Lowering", false, false)
|
||||
|
||||
FunctionPass *llvm::createShadowStackGCLoweringPass() { return new ShadowStackGCLowering(); }
|
||||
|
||||
@ -210,13 +210,12 @@ public:
|
||||
char ShrinkWrap::ID = 0;
|
||||
char &llvm::ShrinkWrapID = ShrinkWrap::ID;
|
||||
|
||||
INITIALIZE_PASS_BEGIN(ShrinkWrap, "shrink-wrap", "Shrink Wrap Pass", false,
|
||||
false)
|
||||
INITIALIZE_PASS_BEGIN(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
|
||||
INITIALIZE_PASS_END(ShrinkWrap, "shrink-wrap", "Shrink Wrap Pass", false, false)
|
||||
INITIALIZE_PASS_END(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false)
|
||||
|
||||
bool ShrinkWrap::useOrDefCSROrFI(const MachineInstr &MI,
|
||||
RegScavenger *RS) const {
|
||||
|
||||
@ -74,7 +74,7 @@ private:
|
||||
} // end anonymous namespace
|
||||
|
||||
char SjLjEHPrepare::ID = 0;
|
||||
INITIALIZE_PASS(SjLjEHPrepare, "sjljehprepare", "Prepare SjLj exceptions",
|
||||
INITIALIZE_PASS(SjLjEHPrepare, DEBUG_TYPE, "Prepare SjLj exceptions",
|
||||
false, false)
|
||||
|
||||
// Public Interface To the SjLjEHPrepare pass.
|
||||
|
||||
@ -19,7 +19,7 @@ using namespace llvm;
|
||||
#define DEBUG_TYPE "slotindexes"
|
||||
|
||||
char SlotIndexes::ID = 0;
|
||||
INITIALIZE_PASS(SlotIndexes, "slotindexes",
|
||||
INITIALIZE_PASS(SlotIndexes, DEBUG_TYPE,
|
||||
"Slot index numbering", false, false)
|
||||
|
||||
STATISTIC(NumLocalRenum, "Number of local renumberings");
|
||||
|
||||
@ -40,14 +40,14 @@
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "spillplacement"
|
||||
#define DEBUG_TYPE "spill-code-placement"
|
||||
|
||||
char SpillPlacement::ID = 0;
|
||||
INITIALIZE_PASS_BEGIN(SpillPlacement, "spill-code-placement",
|
||||
INITIALIZE_PASS_BEGIN(SpillPlacement, DEBUG_TYPE,
|
||||
"Spill Code Placement Analysis", true, true)
|
||||
INITIALIZE_PASS_DEPENDENCY(EdgeBundles)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
|
||||
INITIALIZE_PASS_END(SpillPlacement, "spill-code-placement",
|
||||
INITIALIZE_PASS_END(SpillPlacement, DEBUG_TYPE,
|
||||
"Spill Code Placement Analysis", true, true)
|
||||
|
||||
char &llvm::SpillPlacementID = SpillPlacement::ID;
|
||||
|
||||
@ -53,7 +53,7 @@
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "stackcoloring"
|
||||
#define DEBUG_TYPE "stack-coloring"
|
||||
|
||||
static cl::opt<bool>
|
||||
DisableColoring("no-stack-coloring",
|
||||
@ -371,12 +371,12 @@ private:
|
||||
char StackColoring::ID = 0;
|
||||
char &llvm::StackColoringID = StackColoring::ID;
|
||||
|
||||
INITIALIZE_PASS_BEGIN(StackColoring,
|
||||
"stack-coloring", "Merge disjoint stack slots", false, false)
|
||||
INITIALIZE_PASS_BEGIN(StackColoring, DEBUG_TYPE,
|
||||
"Merge disjoint stack slots", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
|
||||
INITIALIZE_PASS_DEPENDENCY(StackProtector)
|
||||
INITIALIZE_PASS_END(StackColoring,
|
||||
"stack-coloring", "Merge disjoint stack slots", false, false)
|
||||
INITIALIZE_PASS_END(StackColoring, DEBUG_TYPE,
|
||||
"Merge disjoint stack slots", false, false)
|
||||
|
||||
void StackColoring::getAnalysisUsage(AnalysisUsage &AU) const {
|
||||
AU.addRequired<SlotIndexes>();
|
||||
|
||||
@ -58,10 +58,10 @@ static cl::opt<bool> EnableSelectionDAGSP("enable-selectiondag-sp",
|
||||
cl::init(true), cl::Hidden);
|
||||
|
||||
char StackProtector::ID = 0;
|
||||
INITIALIZE_PASS_BEGIN(StackProtector, "stack-protector",
|
||||
INITIALIZE_PASS_BEGIN(StackProtector, DEBUG_TYPE,
|
||||
"Insert stack protectors", false, true)
|
||||
INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
|
||||
INITIALIZE_PASS_END(StackProtector, "stack-protector",
|
||||
INITIALIZE_PASS_END(StackProtector, DEBUG_TYPE,
|
||||
"Insert stack protectors", false, true)
|
||||
|
||||
FunctionPass *llvm::createStackProtectorPass() { return new StackProtector(); }
|
||||
|
||||
@ -32,7 +32,7 @@
|
||||
#include <vector>
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "stackslotcoloring"
|
||||
#define DEBUG_TYPE "stack-slot-coloring"
|
||||
|
||||
static cl::opt<bool>
|
||||
DisableSharing("no-stack-slot-sharing",
|
||||
@ -116,12 +116,12 @@ namespace {
|
||||
char StackSlotColoring::ID = 0;
|
||||
char &llvm::StackSlotColoringID = StackSlotColoring::ID;
|
||||
|
||||
INITIALIZE_PASS_BEGIN(StackSlotColoring, "stack-slot-coloring",
|
||||
INITIALIZE_PASS_BEGIN(StackSlotColoring, DEBUG_TYPE,
|
||||
"Stack Slot Coloring", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
|
||||
INITIALIZE_PASS_DEPENDENCY(LiveStacks)
|
||||
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
|
||||
INITIALIZE_PASS_END(StackSlotColoring, "stack-slot-coloring",
|
||||
INITIALIZE_PASS_END(StackSlotColoring, DEBUG_TYPE,
|
||||
"Stack Slot Coloring", false, false)
|
||||
|
||||
namespace {
|
||||
|
||||
@ -40,8 +40,7 @@ char TailDuplicatePass::ID = 0;
|
||||
|
||||
char &llvm::TailDuplicateID = TailDuplicatePass::ID;
|
||||
|
||||
INITIALIZE_PASS(TailDuplicatePass, "tailduplication", "Tail Duplication", false,
|
||||
false)
|
||||
INITIALIZE_PASS(TailDuplicatePass, DEBUG_TYPE, "Tail Duplication", false, false)
|
||||
|
||||
bool TailDuplicatePass::runOnMachineFunction(MachineFunction &MF) {
|
||||
if (skipFunction(*MF.getFunction()))
|
||||
|
||||
@ -52,7 +52,7 @@
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "twoaddrinstr"
|
||||
#define DEBUG_TYPE "twoaddressinstruction"
|
||||
|
||||
STATISTIC(NumTwoAddressInstrs, "Number of two-address instructions");
|
||||
STATISTIC(NumCommuted , "Number of instructions commuted to coalesce");
|
||||
@ -171,10 +171,10 @@ public:
|
||||
} // end anonymous namespace
|
||||
|
||||
char TwoAddressInstructionPass::ID = 0;
|
||||
INITIALIZE_PASS_BEGIN(TwoAddressInstructionPass, "twoaddressinstruction",
|
||||
INITIALIZE_PASS_BEGIN(TwoAddressInstructionPass, DEBUG_TYPE,
|
||||
"Two-Address instruction pass", false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
|
||||
INITIALIZE_PASS_END(TwoAddressInstructionPass, "twoaddressinstruction",
|
||||
INITIALIZE_PASS_END(TwoAddressInstructionPass, DEBUG_TYPE,
|
||||
"Two-Address instruction pass", false, false)
|
||||
|
||||
char &llvm::TwoAddressInstructionPassID = TwoAddressInstructionPass::ID;
|
||||
|
||||
@ -94,7 +94,7 @@ private:
|
||||
} // end anonymous namespace
|
||||
|
||||
char WinEHPrepare::ID = 0;
|
||||
INITIALIZE_PASS(WinEHPrepare, "winehprepare", "Prepare Windows exceptions",
|
||||
INITIALIZE_PASS(WinEHPrepare, DEBUG_TYPE, "Prepare Windows exceptions",
|
||||
false, false)
|
||||
|
||||
FunctionPass *llvm::createWinEHPass() { return new WinEHPrepare(); }
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; REQUIRES: asserts
|
||||
; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -verify-misched -debug-only=misched -aarch64-enable-stp-suppress=false -o - 2>&1 > /dev/null | FileCheck %s
|
||||
; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -verify-misched -debug-only=machine-scheduler -aarch64-enable-stp-suppress=false -o - 2>&1 > /dev/null | FileCheck %s
|
||||
|
||||
; CHECK: ********** MI Scheduling **********
|
||||
; CHECK-LABEL: stp_i64_scale:BB#0
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; REQUIRES: asserts
|
||||
; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -enable-misched=0 -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s
|
||||
; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -enable-misched=0 -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
|
||||
; REQUIRES: asserts
|
||||
|
||||
@G = external global [0 x i32], align 4
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
; REQUIRES: asserts
|
||||
; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s
|
||||
; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=exynos-m1 -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck --check-prefix=EXYNOS %s
|
||||
; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
|
||||
; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=exynos-m1 -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck --check-prefix=EXYNOS %s
|
||||
|
||||
; Test ldr clustering.
|
||||
; CHECK: ********** MI Scheduling **********
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
; REQUIRES: asserts
|
||||
; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=misched -disable-machine-dce -o - 2>&1 > /dev/null | FileCheck %s
|
||||
; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=misched -disable-machine-dce -o - -misched-limit=2 2>&1 > /dev/null | FileCheck %s
|
||||
; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=machine-scheduler -disable-machine-dce -o - 2>&1 > /dev/null | FileCheck %s
|
||||
; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=machine-scheduler -disable-machine-dce -o - -misched-limit=2 2>&1 > /dev/null | FileCheck %s
|
||||
;
|
||||
; The Cortex-A53 machine model will cause the MADD instruction to be scheduled
|
||||
; much higher than the ADD instructions in order to hide latency. When not
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
; the loads to avoid unnecessary stalls. The generic machine model schedules 4
|
||||
; loads consecutively for this case and will cause stalls.
|
||||
;
|
||||
; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s
|
||||
; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
|
||||
; CHECK: ********** MI Scheduling **********
|
||||
; CHECK: main:BB#2
|
||||
; CHECK: LDR
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; REQUIRES: asserts
|
||||
; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s
|
||||
; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
|
||||
;
|
||||
; For Cortex-A53, shiftable operands that are not actually shifted
|
||||
; are not needed for an additional two cycles.
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; REQUIRES: asserts
|
||||
; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s
|
||||
; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
|
||||
;
|
||||
; Test for bug in misched memory dependency calculation.
|
||||
;
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; REQUIRES: asserts
|
||||
; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -enable-misched=0 -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s
|
||||
; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -enable-misched=0 -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
|
||||
|
||||
|
||||
@G1 = common global [100 x i32] zeroinitializer, align 4
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
# RUN: llc -o /dev/null %s -mtriple=aarch64-- -run-pass=machine-scheduler -enable-misched -debug-only=misched 2>&1 | FileCheck %s
|
||||
# RUN: llc -o /dev/null %s -mtriple=aarch64-- -run-pass=machine-scheduler -enable-misched -debug-only=machine-scheduler 2>&1 | FileCheck %s
|
||||
# REQUIRES: asserts
|
||||
--- |
|
||||
define void @func() { ret void }
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
; RUN: llc -mcpu=cyclone -debug-only=misched < %s 2>&1 | FileCheck %s
|
||||
; RUN: llc -mcpu=cyclone -debug-only=machine-scheduler < %s 2>&1 | FileCheck %s
|
||||
|
||||
; REQUIRES: asserts
|
||||
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
; RUN: llc -debug-only=misched -march=amdgcn -verify-machineinstrs %s -o - 2>&1| FileCheck -check-prefix=SI-NOHSA -check-prefix=FUNC -check-prefix=DEBUG %s
|
||||
; RUN: llc -debug-only=machine-scheduler -march=amdgcn -verify-machineinstrs %s -o - 2>&1| FileCheck -check-prefix=SI-NOHSA -check-prefix=FUNC -check-prefix=DEBUG %s
|
||||
; REQUIRES: asserts
|
||||
|
||||
; Verify that the extload generated from %eval has the default
|
||||
@ -20,4 +20,4 @@ define amdgpu_kernel void @extload_align(i32* %out, i32 %index) #0 {
|
||||
%eval = sext i16 %val to i32
|
||||
store i32 %eval, i32* %out
|
||||
ret void
|
||||
}
|
||||
}
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
# RUN: llc -march=amdgcn -misched=converge -run-pass machine-scheduler %s -o - -debug-only=misched 2>&1 | FileCheck %s
|
||||
# RUN: llc -march=amdgcn -misched=converge -run-pass machine-scheduler %s -o - -debug-only=machine-scheduler 2>&1 | FileCheck %s
|
||||
# REQUIRES: asserts
|
||||
|
||||
# Check there is no SReg_32 pressure created by DS_* instructions because of M0 use
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
; REQUIRES: asserts
|
||||
; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=cortex-r52 -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s --check-prefix=CHECK --check-prefix=R52_SCHED
|
||||
; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=generic -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
|
||||
; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=cortex-r52 -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s --check-prefix=CHECK --check-prefix=R52_SCHED
|
||||
; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=generic -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
|
||||
;
|
||||
; Check the latency for instructions for both generic and cortex-r52.
|
||||
; Cortex-r52 machine model will cause the div to be sceduled before eor
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; REQUIRES: asserts
|
||||
; RUN: llc -mtriple=thumb-eabi -mcpu=swift -pre-RA-sched=source -join-globalcopies -enable-misched -verify-misched -debug-only=misched -arm-atomic-cfg-tidy=0 %s -o - 2>&1 | FileCheck %s
|
||||
; RUN: llc -mtriple=thumb-eabi -mcpu=swift -pre-RA-sched=source -join-globalcopies -enable-misched -verify-misched -debug-only=machine-scheduler -arm-atomic-cfg-tidy=0 %s -o - 2>&1 | FileCheck %s
|
||||
;
|
||||
; Loop counter copies should be eliminated.
|
||||
; There is also a MUL here, but we don't care where it is scheduled.
|
||||
|
||||
@ -1,9 +1,9 @@
|
||||
; REQUIRES: asserts
|
||||
; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a9 -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > \
|
||||
; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a9 -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > \
|
||||
; RUN: /dev/null | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_A9
|
||||
; RUN: llc < %s -mtriple=arm-eabi -mcpu=swift -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > \
|
||||
; RUN: llc < %s -mtriple=arm-eabi -mcpu=swift -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > \
|
||||
; RUN: /dev/null | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_SWIFT
|
||||
; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-r52 -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > \
|
||||
; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-r52 -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > \
|
||||
; RUN: /dev/null | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_R52
|
||||
;
|
||||
; Check the latency of instructions for processors with sched-models
|
||||
|
||||
@ -1,10 +1,10 @@
|
||||
# Basic machine sched model test for Thumb2 int instructions
|
||||
# RUN: llc -o /dev/null %s -mtriple=thumbv7-eabi -mcpu=swift -run-pass machine-scheduler -enable-misched -verify-misched \
|
||||
# RUN: -debug-only=misched 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_SWIFT
|
||||
# RUN: -debug-only=machine-scheduler 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_SWIFT
|
||||
# RUN: llc -o /dev/null %s -mtriple=thumbv7--eabi -mcpu=cortex-a9 -run-pass machine-scheduler -enable-misched -verify-misched \
|
||||
# RUN: -debug-only=misched 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_A9
|
||||
# RUN: -debug-only=machine-scheduler 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_A9
|
||||
# RUN: llc -o /dev/null %s -mtriple=thumbv8r-eabi -mcpu=cortex-r52 -run-pass machine-scheduler -enable-misched -verify-misched \
|
||||
# RUN: -debug-only=misched 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_R52
|
||||
# RUN: -debug-only=machine-scheduler 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_R52
|
||||
# REQUIRES: asserts
|
||||
--- |
|
||||
; ModuleID = 'foo.ll'
|
||||
|
||||
@ -1,9 +1,9 @@
|
||||
# RUN: llc -o /dev/null %s -mtriple=arm-eabi -mcpu=swift -run-pass machine-scheduler -enable-misched -verify-misched \
|
||||
# RUN: -debug-only=misched 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_SWIFT
|
||||
# RUN: -debug-only=machine-scheduler 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_SWIFT
|
||||
# RUN: llc -o /dev/null %s -mtriple=arm-eabi -mcpu=cortex-a9 -run-pass machine-scheduler -enable-misched -verify-misched \
|
||||
# RUN: -debug-only=misched 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_A9
|
||||
# RUN: -debug-only=machine-scheduler 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_A9
|
||||
# RUN: llc -o /dev/null %s -mtriple=arm-eabi -mcpu=cortex-r52 -run-pass machine-scheduler -enable-misched -verify-misched \
|
||||
# RUN: -debug-only=misched 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_R52
|
||||
# RUN: -debug-only=machine-scheduler 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK_R52
|
||||
# REQUIRES: asserts
|
||||
--- |
|
||||
; ModuleID = 'foo.ll'
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
# RUN: llc -o /dev/null %s -mtriple=arm-eabi -mcpu=cortex-r52 -run-pass machine-scheduler -enable-misched -debug-only=misched -misched-topdown 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=TOPDOWN
|
||||
# RUN: llc -o /dev/null %s -mtriple=arm-eabi -mcpu=cortex-r52 -run-pass machine-scheduler -enable-misched -debug-only=misched -misched-bottomup 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=BOTTOMUP
|
||||
# RUN: llc -o /dev/null %s -mtriple=arm-eabi -mcpu=cortex-r52 -run-pass machine-scheduler -enable-misched -debug-only=machine-scheduler -misched-topdown 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=TOPDOWN
|
||||
# RUN: llc -o /dev/null %s -mtriple=arm-eabi -mcpu=cortex-r52 -run-pass machine-scheduler -enable-misched -debug-only=machine-scheduler -misched-bottomup 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=BOTTOMUP
|
||||
# REQUIRES: asserts
|
||||
--- |
|
||||
; ModuleID = 'foo.ll'
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; REQUIRES: asserts
|
||||
; RUN: llc %s -mtriple=lanai-unknown-unknown -debug-only=misched -o /dev/null 2>&1 | FileCheck %s
|
||||
; RUN: llc %s -mtriple=lanai-unknown-unknown -debug-only=machine-scheduler -o /dev/null 2>&1 | FileCheck %s
|
||||
|
||||
; Make sure there are no control dependencies between memory operations that
|
||||
; are trivially disjoint.
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; REQUIRES: asserts
|
||||
; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse4.1 -mcpu=penryn -stats 2>&1 | grep "9 machine-licm"
|
||||
; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse4.1 -mcpu=penryn -stats 2>&1 | grep "9 machinelicm"
|
||||
; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse4.1 -mcpu=penryn | FileCheck %s
|
||||
; rdar://6627786
|
||||
; rdar://7792037
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; REQUIRES: asserts
|
||||
; RUN: llc -mcpu=haswell < %s -stats -O2 2>&1 | grep "4 machine-licm.*hoisted"
|
||||
; RUN: llc -mcpu=haswell < %s -stats -O2 2>&1 | grep "4 machinelicm.*hoisted"
|
||||
; For test:
|
||||
; 2 invariant loads, 1 for OBJC_SELECTOR_REFERENCES_
|
||||
; and 1 for objc_msgSend from the GOT
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
; REQUIRES: asserts
|
||||
; RUN: llc < %s -verify-machineinstrs -march=x86 -mcpu=core2 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s
|
||||
; RUN: llc < %s -verify-machineinstrs -march=x86 -mcpu=core2 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
|
||||
;
|
||||
; Test scheduling of copy instructions.
|
||||
;
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
; REQUIRES: asserts
|
||||
; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=penryn -stats 2>&1 | \
|
||||
; RUN: grep "twoaddrinstr" | grep "Number of instructions aggressively commuted"
|
||||
; RUN: grep "twoaddressinstruction" | grep "Number of instructions aggressively commuted"
|
||||
; rdar://6480363
|
||||
|
||||
target triple = "i386-apple-darwin9.6"
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user