diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h
index 455d91a36a8..80c9428f0d3 100644
--- a/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -225,6 +225,8 @@ namespace ISD {
     ADJCALLSTACKDOWN,  // Beginning of a call sequence
     ADJCALLSTACKUP,    // End of a call sequence
 
+    // PCMARKER - This corrosponds to the pcmarker intrinsic.
+    PCMARKER,
 
     // BUILTIN_OP_END - This must be the last enum value in this list.
     BUILTIN_OP_END,
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 576232540e9..5f8a21aca0f 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -552,6 +552,10 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
       break;
     }
     break;
+  case ISD::PCMARKER:
+    Tmp1 = LegalizeOp(Node->getOperand(0));  // Legalize the chain.
+    Result = DAG.getNode(ISD::PCMARKER, MVT::Other, Tmp1, Node->getOperand(1));
+    break;
   case ISD::TRUNCSTORE:
     Tmp1 = LegalizeOp(Node->getOperand(0));  // Legalize the chain.
     Tmp3 = LegalizeOp(Node->getOperand(2));  // Legalize the pointer.
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index d4804d98227..edc5b8c6f5e 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -1099,6 +1099,7 @@ bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) {
 const char *SDNode::getOperationName() const {
   switch (getOpcode()) {
   default: return "<<Unknown>>";
+  case ISD::PCMARKER:      return "PCMarker";
   case ISD::EntryToken:    return "EntryToken";
   case ISD::TokenFactor:   return "TokenFactor";
   case ISD::Constant:      return "Constant";
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 9871cb32c16..75352982034 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -662,6 +662,12 @@ void SelectionDAGLowering::visitCall(CallInst &I) {
       setValue(&I, DAG.getSetCC(ISD::SETUO, MVT::i1, getValue(I.getOperand(1)),
                                 getValue(I.getOperand(2))));
       return;
+    case Intrinsic::pcmarker: {
+      SDOperand Num = getValue(I.getOperand(1));
+      DAG.setRoot(DAG.getNode(ISD::PCMARKER, MVT::Other, getRoot(), Num));
+      return;
+    }
+
     }
   
   SDOperand Callee;
diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp
index 3a86a39f77f..d7df75bde11 100644
--- a/lib/Target/Alpha/AlphaISelPattern.cpp
+++ b/lib/Target/Alpha/AlphaISelPattern.cpp
@@ -27,10 +27,20 @@
 #include "llvm/Support/MathExtras.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/Support/Debug.h"
+#include "llvm/Support/CommandLine.h"
 #include <set>
 #include <algorithm>
 using namespace llvm;
 
+namespace llvm {
+  cl::opt<bool> EnableAlphaIDIV("enable-alpha-intfpdiv", 
+                             cl::desc("Use the FP div instruction for integer div when possible"), 
+                             cl::Hidden);
+  cl::opt<bool> EnableAlpha("enable-alpha-ftoi", 
+                             cl::desc("Enablue use of ftoi* and itof* instructions (ev6 and higher)"), 
+                             cl::Hidden);
+}
+
 //===----------------------------------------------------------------------===//
 //  AlphaTargetLowering - Alpha Implementation of the TargetLowering interface
 namespace {
@@ -1697,6 +1707,11 @@ void ISel::Select(SDOperand N) {
       Alpha::ADJUSTSTACKUP;
     BuildMI(BB, Opc, 1).addImm(Tmp1);
     return;
+
+  case ISD::PCMARKER:
+    Select(N.getOperand(0)); //Chain
+    BuildMI(BB, Alpha::PCLABEL, 2).addImm( cast<ConstantSDNode>(N.getOperand(1))->getValue());
+    return;
   }
   assert(0 && "Should not be reached!");
 }
diff --git a/lib/Target/Alpha/AlphaInstrInfo.td b/lib/Target/Alpha/AlphaInstrInfo.td
index 7789a10f3a4..0cd20dd8f94 100644
--- a/lib/Target/Alpha/AlphaInstrInfo.td
+++ b/lib/Target/Alpha/AlphaInstrInfo.td
@@ -30,6 +30,8 @@ def WTF : PseudoInstAlpha<(ops ), "#wtf">;
 def ADJUSTSTACKUP : PseudoInstAlpha<(ops ), "ADJUP">;
 def ADJUSTSTACKDOWN : PseudoInstAlpha<(ops ), "ADJDOWN">;
 
+def PCLABEL : PseudoInstAlpha<(ops s64imm:$num), "PCMARKER_$num:\n">;
+
 //*****************
 //These are shortcuts, the assembler expands them
 //*****************