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Cull non-standard variants of ARM architectures (NFC)

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Summary:
This patch changes ARMV5, ARMV5E, ARMV6SM, ARMV6HL, ARMV7, ARMV7L,
ARMV7HL, ARMV7EM to be treated as aliases for the corresponding
standard architectures, instead of as actual architectures.

Reviewers: rengolin

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D14577

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252903 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Artyom Skrobov 2015-11-12 15:51:41 +00:00
parent e8073938cf
commit 957ee69c41
5 changed files with 10 additions and 58 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
include/llvm/Support/ARMTargetParser.def
View File

@ -76,8 +76,6 @@ ARM_ARCH("armv6zk", AK_ARMV6ZK, "6ZK", "v6zk", ARMBuildAttrs::CPUArch::v6KZ,
(AEK_SEC | AEK_DSP))
ARM_ARCH("armv6-m", AK_ARMV6M, "6-M", "v6m", ARMBuildAttrs::CPUArch::v6_M,
AEK_NONE)
ARM_ARCH("armv6s-m", AK_ARMV6SM, "6S-M", "v6sm", ARMBuildAttrs::CPUArch::v6S_M,
AEK_NONE)
ARM_ARCH("armv7-a", AK_ARMV7A, "7-A", "v7", ARMBuildAttrs::CPUArch::v7,
AEK_DSP)
ARM_ARCH("armv7-r", AK_ARMV7R, "7-R", "v7r", ARMBuildAttrs::CPUArch::v7,
@ -97,20 +95,8 @@ ARM_ARCH("iwmmxt2", AK_IWMMXT2, "iwmmxt2", "", ARMBuildAttrs::CPUArch::v5TE,
AEK_NONE)
ARM_ARCH("xscale", AK_XSCALE, "xscale", "", ARMBuildAttrs::CPUArch::v5TE,
AEK_NONE)
ARM_ARCH("armv5", AK_ARMV5, "5T", "v5", ARMBuildAttrs::CPUArch::v5T,
AEK_NONE)
ARM_ARCH("armv5e", AK_ARMV5E, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE,
AEK_DSP)
ARM_ARCH("armv6j", AK_ARMV6J, "6J", "v6", ARMBuildAttrs::CPUArch::v6,
AEK_DSP)
ARM_ARCH("armv6hl", AK_ARMV6HL, "6-M", "v6hl", ARMBuildAttrs::CPUArch::v6_M,
AEK_NONE)
ARM_ARCH("armv7", AK_ARMV7, "7", "v7", ARMBuildAttrs::CPUArch::v7,
AEK_NONE)
ARM_ARCH("armv7l", AK_ARMV7L, "7-L", "v7l", ARMBuildAttrs::CPUArch::v7,
AEK_DSP)
ARM_ARCH("armv7hl", AK_ARMV7HL, "7-L", "v7hl", ARMBuildAttrs::CPUArch::v7,
AEK_DSP)
ARM_ARCH("armv7s", AK_ARMV7S, "7-S", "v7s", ARMBuildAttrs::CPUArch::v7,
AEK_DSP)
ARM_ARCH("armv7k", AK_ARMV7K, "7-K", "v7k", ARMBuildAttrs::CPUArch::v7,
@ -181,8 +167,6 @@ ARM_CPU_NAME("arm968e-s", AK_ARMV5TE, FK_NONE, false, AEK_NONE)
ARM_CPU_NAME("arm10e", AK_ARMV5TE, FK_NONE, false, AEK_NONE)
ARM_CPU_NAME("arm1020e", AK_ARMV5TE, FK_NONE, false, AEK_NONE)
ARM_CPU_NAME("arm1022e", AK_ARMV5TE, FK_NONE, true, AEK_NONE)
ARM_CPU_NAME("iwmmxt", AK_ARMV5TE, FK_NONE, false, AEK_NONE)
ARM_CPU_NAME("xscale", AK_ARMV5TE, FK_NONE, false, AEK_NONE)
ARM_CPU_NAME("arm926ej-s", AK_ARMV5TEJ, FK_NONE, true, AEK_NONE)
ARM_CPU_NAME("arm1136jf-s", AK_ARMV6, FK_VFPV2, true, AEK_NONE)
ARM_CPU_NAME("arm1176j-s", AK_ARMV6K, FK_NONE, false, AEK_NONE)
@ -229,16 +213,8 @@ ARM_CPU_NAME("generic", AK_ARMV8_1A, FK_NEON_FP_ARMV8, true, AEK_NONE)
// Non-standard Arch names.
ARM_CPU_NAME("iwmmxt", AK_IWMMXT, FK_NONE, true, AEK_NONE)
ARM_CPU_NAME("xscale", AK_XSCALE, FK_NONE, true, AEK_NONE)
ARM_CPU_NAME("arm10tdmi", AK_ARMV5, FK_NONE, true, AEK_NONE)
ARM_CPU_NAME("arm1022e", AK_ARMV5E, FK_NONE, true, AEK_NONE)
ARM_CPU_NAME("arm1136j-s", AK_ARMV6J, FK_NONE, true, AEK_NONE)
ARM_CPU_NAME("arm1136jz-s", AK_ARMV6J, FK_NONE, false, AEK_NONE)
ARM_CPU_NAME("cortex-m0", AK_ARMV6SM, FK_NONE, true, AEK_NONE)
ARM_CPU_NAME("arm1176jzf-s", AK_ARMV6HL, FK_VFPV2, true, AEK_NONE)
ARM_CPU_NAME("cortex-a8", AK_ARMV7, FK_NEON, true, AEK_SEC)
ARM_CPU_NAME("cortex-a8", AK_ARMV7L, FK_NEON, true, AEK_SEC)
ARM_CPU_NAME("cortex-a8", AK_ARMV7HL, FK_NEON, true, AEK_SEC)
ARM_CPU_NAME("cortex-m4", AK_ARMV7EM, FK_NONE, true, AEK_NONE)
ARM_CPU_NAME("swift", AK_ARMV7S, FK_NEON_VFPV4, true,
(AEK_HWDIVARM | AEK_HWDIV))
ARM_CPU_NAME("cortex-a7", AK_ARMV7K, FK_NONE, true, AEK_HWDIVARM | AEK_HWDIV)

18
lib/Support/TargetParser.cpp
View File

@ -369,9 +369,11 @@ static StringRef getFPUSynonym(StringRef FPU) {
static StringRef getArchSynonym(StringRef Arch) {
return StringSwitch<StringRef>(Arch)
.Case("v6sm", "v6s-m")
.Case("v6m", "v6-m")
.Case("v7a", "v7-a")
.Case("v5", "v5t")
.Case("v5e", "v5te")
.Case("v6hl", "v6k")
.Cases("v6m", "v6sm", "v6s-m", "v6-m")
.Cases("v7", "v7a", "v7hl", "v7l", "v7-a")
.Case("v7r", "v7-r")
.Case("v7m", "v7-m")
.Case("v7em", "v7e-m")
@ -513,15 +515,12 @@ unsigned llvm::ARM::parseArchProfile(StringRef Arch) {
switch (parseArch(Arch)) {
case ARM::AK_ARMV6M:
case ARM::AK_ARMV7M:
case ARM::AK_ARMV6SM:
case ARM::AK_ARMV7EM:
return ARM::PK_M;
case ARM::AK_ARMV7R:
return ARM::PK_R;
case ARM::AK_ARMV7:
case ARM::AK_ARMV7A:
case ARM::AK_ARMV7K:
case ARM::AK_ARMV7L:
case ARM::AK_ARMV8A:
case ARM::AK_ARMV8_1A:
return ARM::PK_A;
@ -542,13 +541,11 @@ unsigned llvm::ARM::parseArchVersion(StringRef Arch) {
case ARM::AK_ARMV4:
case ARM::AK_ARMV4T:
return 4;
case ARM::AK_ARMV5:
case ARM::AK_ARMV5T:
case ARM::AK_ARMV5TE:
case ARM::AK_IWMMXT:
case ARM::AK_IWMMXT2:
case ARM::AK_XSCALE:
case ARM::AK_ARMV5E:
case ARM::AK_ARMV5TEJ:
return 5;
case ARM::AK_ARMV6:
@ -558,15 +555,10 @@ unsigned llvm::ARM::parseArchVersion(StringRef Arch) {
case ARM::AK_ARMV6Z:
case ARM::AK_ARMV6ZK:
case ARM::AK_ARMV6M:
case ARM::AK_ARMV6SM:
case ARM::AK_ARMV6HL:
return 6;
case ARM::AK_ARMV7:
case ARM::AK_ARMV7A:
case ARM::AK_ARMV7R:
case ARM::AK_ARMV7M:
case ARM::AK_ARMV7L:
case ARM::AK_ARMV7HL:
case ARM::AK_ARMV7S:
case ARM::AK_ARMV7EM:
case ARM::AK_ARMV7K:

7
lib/Support/Triple.cpp
View File

@ -487,9 +487,7 @@ static Triple::SubArchType parseSubArch(StringRef SubArchName) {
return Triple::NoSubArch;
case ARM::AK_ARMV4T:
return Triple::ARMSubArch_v4t;
case ARM::AK_ARMV5:
case ARM::AK_ARMV5T:
case ARM::AK_ARMV5E:
return Triple::ARMSubArch_v5;
case ARM::AK_ARMV5TE:
case ARM::AK_IWMMXT:
@ -503,18 +501,13 @@ static Triple::SubArchType parseSubArch(StringRef SubArchName) {
return Triple::ARMSubArch_v6;
case ARM::AK_ARMV6K:
case ARM::AK_ARMV6ZK:
case ARM::AK_ARMV6HL:
return Triple::ARMSubArch_v6k;
case ARM::AK_ARMV6T2:
return Triple::ARMSubArch_v6t2;
case ARM::AK_ARMV6M:
case ARM::AK_ARMV6SM:
return Triple::ARMSubArch_v6m;
case ARM::AK_ARMV7:
case ARM::AK_ARMV7A:
case ARM::AK_ARMV7R:
case ARM::AK_ARMV7L:
case ARM::AK_ARMV7HL:
return Triple::ARMSubArch_v7;
case ARM::AK_ARMV7K:
return Triple::ARMSubArch_v7k;

14
lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
View File

@ -1007,24 +1007,20 @@ static MachO::CPUSubTypeARM getMachOSubTypeFromArch(StringRef Arch) {
return MachO::CPU_SUBTYPE_ARM_V7;
case ARM::AK_ARMV4T:
return MachO::CPU_SUBTYPE_ARM_V4T;
case ARM::AK_ARMV5T:
case ARM::AK_ARMV5TE:
case ARM::AK_ARMV5TEJ:
return MachO::CPU_SUBTYPE_ARM_V5;
case ARM::AK_ARMV6:
case ARM::AK_ARMV6K:
return MachO::CPU_SUBTYPE_ARM_V6;
case ARM::AK_ARMV5:
return MachO::CPU_SUBTYPE_ARM_V5;
case ARM::AK_ARMV5T:
case ARM::AK_ARMV5E:
case ARM::AK_ARMV5TE:
case ARM::AK_ARMV5TEJ:
return MachO::CPU_SUBTYPE_ARM_V5TEJ;
case ARM::AK_ARMV7:
case ARM::AK_ARMV7A:
return MachO::CPU_SUBTYPE_ARM_V7;
case ARM::AK_ARMV7S:
return MachO::CPU_SUBTYPE_ARM_V7S;
case ARM::AK_ARMV7K:
return MachO::CPU_SUBTYPE_ARM_V7K;
case ARM::AK_ARMV6M:
case ARM::AK_ARMV6SM:
return MachO::CPU_SUBTYPE_ARM_V6M;
case ARM::AK_ARMV7M:
return MachO::CPU_SUBTYPE_ARM_V7M;

5
lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
View File

@ -701,7 +701,6 @@ void ARMTargetELFStreamer::emitArchDefaultAttributes() {
case ARM::AK_ARMV3:
case ARM::AK_ARMV3M:
case ARM::AK_ARMV4:
case ARM::AK_ARMV5:
setAttributeItem(ARM_ISA_use, Allowed, false);
break;
@ -731,10 +730,6 @@ void ARMTargetELFStreamer::emitArchDefaultAttributes() {
setAttributeItem(THUMB_ISA_use, Allowed, false);
break;
case ARM::AK_ARMV7:
setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
break;
case ARM::AK_ARMV7A:
setAttributeItem(CPU_arch_profile, ApplicationProfile, false);
setAttributeItem(ARM_ISA_use, Allowed, false);