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Implement setcc correctly for G5 and non-G5 systems
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23060 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1087,17 +1087,23 @@ SDOperand PPC32DAGToDAGISel::Select(SDOperand Op) {
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SDOperand CCReg =
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SelectCC(Select(N->getOperand(0)), Select(N->getOperand(1)), CC);
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SDOperand IntCR;
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if (TLI.getTargetMachine().getSubtarget<PPCSubtarget>().isGigaProcessor()) {
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IntCR = CurDAG->getTargetNode(PPC::MFOCRF, MVT::i32, CCReg);
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} else {
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assert(0 && "Not imp yet!");
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// FIXME: HOW DO WE DO THIS??
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#if 0
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//SDOperand CR7Op = CurDAG->getCopyToReg();
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BuildMI(BB, PPC::MCRF, 1, PPC::CR7).addReg(CCReg);
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BuildMI(BB, PPC::MFCR, 0, IntCR);
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#endif
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}
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// Force the ccreg into CR7.
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SDOperand CR7Reg = CurDAG->getRegister(PPC::CR7, MVT::i32);
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std::vector<MVT::ValueType> VTs;
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VTs.push_back(MVT::Other);
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VTs.push_back(MVT::Flag); // NONSTANDARD CopyToReg node: defines a flag
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std::vector<SDOperand> Ops;
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Ops.push_back(CurDAG->getEntryNode());
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Ops.push_back(CR7Reg);
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Ops.push_back(CCReg);
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CCReg = CurDAG->getNode(ISD::CopyToReg, VTs, Ops).getValue(1);
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if (TLI.getTargetMachine().getSubtarget<PPCSubtarget>().isGigaProcessor())
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IntCR = CurDAG->getTargetNode(PPC::MFOCRF, MVT::i32, CR7Reg, CCReg);
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else
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IntCR = CurDAG->getTargetNode(PPC::MFCR, MVT::i32, CCReg);
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if (!Inv) {
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CurDAG->SelectNodeTo(N, MVT::i32, PPC::RLWINM, IntCR,
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