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[GlobalISel] Set the Selected MF property.
None of GlobalISel requires the property, but this lets us use the verifier instead of rolling our own "all instructions selected" check. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277484 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -37,6 +37,11 @@ public:
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.set(MachineFunctionProperties::Property::RegBankSelected);
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}
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MachineFunctionProperties getSetProperties() const override {
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return MachineFunctionProperties().set(
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MachineFunctionProperties::Property::Selected);
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}
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InstructionSelect();
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bool runOnMachineFunction(MachineFunction &MF) override;
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@ -85,20 +85,6 @@ bool InstructionSelect::runOnMachineFunction(MachineFunction &MF) {
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assert(MF.size() == NumBlocks && "Inserting blocks is not supported yet");
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// Check that we did select everything. Do this separately to make sure we
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// didn't miss any newly inserted instructions.
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// FIXME: This (and other checks) should move into a verifier, predicated on
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// a "post-isel" MachineFunction property. That would also let us selectively
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// enable it depending on build configuration.
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for (MachineBasicBlock &MBB : MF) {
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for (MachineInstr &MI : MBB) {
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if (isPreISelGenericOpcode(MI.getOpcode())) {
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reportSelectionError(
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MI, "Generic instruction survived instruction selection");
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}
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}
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}
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// Now that selection is complete, there are no more generic vregs.
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// FIXME: We're still discussing what to do with the vreg->size map:
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// it's somewhat redundant (with the def MIs type size), but having to
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@ -31,6 +31,8 @@
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define void @store_s64_gpr(i64* %addr) { ret void }
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define void @store_s32_gpr(i32* %addr) { ret void }
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define void @selected_property() { ret void }
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...
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---
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@ -419,3 +421,19 @@ body: |
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G_STORE { s32, p0 } %1, %0 :: (store 4 into %ir.addr)
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...
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---
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# Check that we set the "selected" property.
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# CHECK-LABEL: name: selected_property
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# CHECK: legalized: true
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# CHECK-NEXT: regBankSelected: true
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# CHECK-NEXT: selected: true
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# CHECK-NEXT: isSSA: true
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name: selected_property
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isSSA: true
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legalized: true
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regBankSelected: true
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selected: false
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body: |
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bb.0:
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...
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