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synced 2024-11-27 05:30:49 +00:00
Refactor LegalizeTypes: Erase LegalizeAction and make the type legalizer use
the TargetLowering enum. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132418 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
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cf31f91931
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@ -174,24 +174,24 @@ SDValue DAGTypeLegalizer::PromoteIntRes_BITCAST(SDNode *N) {
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default:
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assert(false && "Unknown type action!");
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break;
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case Legal:
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case TargetLowering::TypeLegal:
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break;
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case PromoteInteger:
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case TargetLowering::TypePromoteInteger:
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if (NOutVT.bitsEq(NInVT))
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// The input promotes to the same size. Convert the promoted value.
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return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetPromotedInteger(InOp));
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break;
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case SoftenFloat:
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case TargetLowering::TypeSoftenFloat:
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// Promote the integer operand by hand.
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return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftenedFloat(InOp));
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case ExpandInteger:
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case ExpandFloat:
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case TargetLowering::TypeExpandInteger:
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case TargetLowering::TypeExpandFloat:
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break;
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case ScalarizeVector:
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case TargetLowering::TypeScalarizeVector:
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// Convert the element to an integer and promote it by hand.
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return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT,
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BitConvertToInteger(GetScalarizedVector(InOp)));
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case SplitVector: {
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case TargetLowering::TypeSplitVector: {
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// For example, i32 = BITCAST v2i16 on alpha. Convert the split
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// pieces of the input into integers and reassemble in the final type.
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SDValue Lo, Hi;
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@ -208,7 +208,7 @@ SDValue DAGTypeLegalizer::PromoteIntRes_BITCAST(SDNode *N) {
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JoinIntegers(Lo, Hi));
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return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp);
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}
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case WidenVector:
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case TargetLowering::TypeWidenVector:
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if (OutVT.bitsEq(NInVT))
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// The input is widened to the same size. Convert to the widened value.
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return DAG.getNode(ISD::BITCAST, dl, OutVT, GetWidenedVector(InOp));
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@ -342,7 +342,8 @@ SDValue DAGTypeLegalizer::PromoteIntRes_INT_EXTEND(SDNode *N) {
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EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
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DebugLoc dl = N->getDebugLoc();
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if (getTypeAction(N->getOperand(0).getValueType()) == PromoteInteger) {
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if (getTypeAction(N->getOperand(0).getValueType())
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== TargetLowering::TypePromoteInteger) {
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SDValue Res = GetPromotedInteger(N->getOperand(0));
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assert(Res.getValueType().bitsLE(NVT) && "Extension doesn't make sense!");
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@ -507,11 +508,11 @@ SDValue DAGTypeLegalizer::PromoteIntRes_TRUNCATE(SDNode *N) {
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switch (getTypeAction(N->getOperand(0).getValueType())) {
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default: llvm_unreachable("Unknown type action!");
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case Legal:
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case ExpandInteger:
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case TargetLowering::TypeLegal:
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case TargetLowering::TypeExpandInteger:
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Res = N->getOperand(0);
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break;
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case PromoteInteger:
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case TargetLowering::TypePromoteInteger:
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Res = GetPromotedInteger(N->getOperand(0));
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break;
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}
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@ -1513,7 +1514,8 @@ void DAGTypeLegalizer::ExpandIntRes_ANY_EXTEND(SDNode *N,
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} else {
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// For example, extension of an i48 to an i64. The operand type necessarily
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// promotes to the result type, so will end up being expanded too.
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assert(getTypeAction(Op.getValueType()) == PromoteInteger &&
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assert(getTypeAction(Op.getValueType()) ==
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TargetLowering::TypePromoteInteger &&
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"Only know how to promote this result!");
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SDValue Res = GetPromotedInteger(Op);
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assert(Res.getValueType() == N->getValueType(0) &&
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@ -2030,7 +2032,8 @@ void DAGTypeLegalizer::ExpandIntRes_SIGN_EXTEND(SDNode *N,
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} else {
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// For example, extension of an i48 to an i64. The operand type necessarily
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// promotes to the result type, so will end up being expanded too.
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assert(getTypeAction(Op.getValueType()) == PromoteInteger &&
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assert(getTypeAction(Op.getValueType()) ==
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TargetLowering::TypePromoteInteger &&
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"Only know how to promote this result!");
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SDValue Res = GetPromotedInteger(Op);
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assert(Res.getValueType() == N->getValueType(0) &&
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@ -2178,7 +2181,8 @@ void DAGTypeLegalizer::ExpandIntRes_ZERO_EXTEND(SDNode *N,
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} else {
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// For example, extension of an i48 to an i64. The operand type necessarily
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// promotes to the result type, so will end up being expanded too.
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assert(getTypeAction(Op.getValueType()) == PromoteInteger &&
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assert(getTypeAction(Op.getValueType()) ==
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TargetLowering::TypePromoteInteger &&
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"Only know how to promote this result!");
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SDValue Res = GetPromotedInteger(Op);
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assert(Res.getValueType() == N->getValueType(0) &&
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@ -224,38 +224,38 @@ bool DAGTypeLegalizer::run() {
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switch (getTypeAction(ResultVT)) {
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default:
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assert(false && "Unknown action!");
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case Legal:
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case TargetLowering::TypeLegal:
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break;
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// The following calls must take care of *all* of the node's results,
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// not just the illegal result they were passed (this includes results
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// with a legal type). Results can be remapped using ReplaceValueWith,
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// or their promoted/expanded/etc values registered in PromotedIntegers,
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// ExpandedIntegers etc.
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case PromoteInteger:
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case TargetLowering::TypePromoteInteger:
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PromoteIntegerResult(N, i);
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Changed = true;
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goto NodeDone;
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case ExpandInteger:
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case TargetLowering::TypeExpandInteger:
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ExpandIntegerResult(N, i);
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Changed = true;
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goto NodeDone;
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case SoftenFloat:
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case TargetLowering::TypeSoftenFloat:
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SoftenFloatResult(N, i);
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Changed = true;
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goto NodeDone;
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case ExpandFloat:
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case TargetLowering::TypeExpandFloat:
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ExpandFloatResult(N, i);
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Changed = true;
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goto NodeDone;
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case ScalarizeVector:
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case TargetLowering::TypeScalarizeVector:
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ScalarizeVectorResult(N, i);
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Changed = true;
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goto NodeDone;
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case SplitVector:
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case TargetLowering::TypeSplitVector:
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SplitVectorResult(N, i);
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Changed = true;
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goto NodeDone;
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case WidenVector:
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case TargetLowering::TypeWidenVector:
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WidenVectorResult(N, i);
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Changed = true;
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goto NodeDone;
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@ -277,36 +277,36 @@ ScanOperands:
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switch (getTypeAction(OpVT)) {
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default:
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assert(false && "Unknown action!");
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case Legal:
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case TargetLowering::TypeLegal:
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continue;
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// The following calls must either replace all of the node's results
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// using ReplaceValueWith, and return "false"; or update the node's
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// operands in place, and return "true".
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case PromoteInteger:
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case TargetLowering::TypePromoteInteger:
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NeedsReanalyzing = PromoteIntegerOperand(N, i);
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Changed = true;
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break;
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case ExpandInteger:
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case TargetLowering::TypeExpandInteger:
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NeedsReanalyzing = ExpandIntegerOperand(N, i);
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Changed = true;
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break;
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case SoftenFloat:
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case TargetLowering::TypeSoftenFloat:
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NeedsReanalyzing = SoftenFloatOperand(N, i);
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Changed = true;
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break;
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case ExpandFloat:
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case TargetLowering::TypeExpandFloat:
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NeedsReanalyzing = ExpandFloatOperand(N, i);
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Changed = true;
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break;
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case ScalarizeVector:
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case TargetLowering::TypeScalarizeVector:
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NeedsReanalyzing = ScalarizeVectorOperand(N, i);
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Changed = true;
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break;
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case SplitVector:
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case TargetLowering::TypeSplitVector:
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NeedsReanalyzing = SplitVectorOperand(N, i);
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Changed = true;
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break;
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case WidenVector:
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case TargetLowering::TypeWidenVector:
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NeedsReanalyzing = WidenVectorOperand(N, i);
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Changed = true;
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break;
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@ -57,16 +57,6 @@ public:
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// 1+ - This is a node which has this many unprocessed operands.
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};
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private:
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enum LegalizeAction {
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Legal, // The target natively supports this type.
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PromoteInteger, // Replace this integer type with a larger one.
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ExpandInteger, // Split this integer type into two of half the size.
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SoftenFloat, // Convert this float type to a same size integer type.
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ExpandFloat, // Split this float type into two of half the size.
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ScalarizeVector, // Replace this one-element vector with its element type.
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SplitVector, // Split this vector type into two of half the size.
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WidenVector // This vector type should be widened into a larger vector.
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};
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/// ValueTypeActions - This is a bitvector that contains two bits for each
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/// simple value type, where the two bits correspond to the LegalizeAction
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@ -74,27 +64,8 @@ private:
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TargetLowering::ValueTypeActionImpl ValueTypeActions;
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/// getTypeAction - Return how we should legalize values of this type.
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LegalizeAction getTypeAction(EVT VT) const {
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switch (TLI.getTypeAction(*DAG.getContext(), VT)) {
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default:
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assert(false && "Unknown legalize action!");
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case TargetLowering::Legal:
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return Legal;
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case TargetLowering::TypePromoteInteger:
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return PromoteInteger;
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case TargetLowering::TypeExpandInteger:
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return ExpandInteger;
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case TargetLowering::TypeExpandFloat:
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return ExpandFloat;
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case TargetLowering::TypeSoftenFloat:
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return SoftenFloat;
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case TargetLowering::TypeWidenVector:
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return WidenVector;
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case TargetLowering::TypeScalarizeVector:
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return ScalarizeVector;
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case TargetLowering::TypeSplitVector:
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return SplitVector;
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}
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TargetLowering::LegalizeTypeAction getTypeAction(EVT VT) const {
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return TLI.getTypeAction(*DAG.getContext(), VT);
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}
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/// isTypeLegal - Return true if this type is legal on this target.
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@ -43,36 +43,36 @@ void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) {
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switch (getTypeAction(InVT)) {
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default:
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assert(false && "Unknown type action!");
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case Legal:
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case PromoteInteger:
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case TargetLowering::TypeLegal:
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case TargetLowering::TypePromoteInteger:
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break;
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case SoftenFloat:
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case TargetLowering::TypeSoftenFloat:
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// Convert the integer operand instead.
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SplitInteger(GetSoftenedFloat(InOp), Lo, Hi);
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Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
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Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
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return;
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case ExpandInteger:
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case ExpandFloat:
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case TargetLowering::TypeExpandInteger:
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case TargetLowering::TypeExpandFloat:
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// Convert the expanded pieces of the input.
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GetExpandedOp(InOp, Lo, Hi);
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Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
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Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
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return;
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case SplitVector:
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case TargetLowering::TypeSplitVector:
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GetSplitVector(InOp, Lo, Hi);
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if (TLI.isBigEndian())
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std::swap(Lo, Hi);
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Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
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Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
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return;
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case ScalarizeVector:
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case TargetLowering::TypeScalarizeVector:
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// Convert the element instead.
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SplitInteger(BitConvertToInteger(GetScalarizedVector(InOp)), Lo, Hi);
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Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
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Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
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return;
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case WidenVector: {
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case TargetLowering::TypeWidenVector: {
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assert(!(InVT.getVectorNumElements() & 1) && "Unsupported BITCAST");
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InOp = GetWidenedVector(InOp);
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EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
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@ -526,13 +526,13 @@ void DAGTypeLegalizer::SplitVecRes_BITCAST(SDNode *N, SDValue &Lo,
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switch (getTypeAction(InVT)) {
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default:
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assert(false && "Unknown type action!");
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case Legal:
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case PromoteInteger:
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case SoftenFloat:
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case ScalarizeVector:
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case TargetLowering::TypeLegal:
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case TargetLowering::TypePromoteInteger:
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case TargetLowering::TypeSoftenFloat:
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case TargetLowering::TypeScalarizeVector:
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break;
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case ExpandInteger:
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case ExpandFloat:
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case TargetLowering::TypeExpandInteger:
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case TargetLowering::TypeExpandFloat:
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// A scalar to vector conversion, where the scalar needs expansion.
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// If the vector is being split in two then we can just convert the
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// expanded pieces.
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@ -545,7 +545,7 @@ void DAGTypeLegalizer::SplitVecRes_BITCAST(SDNode *N, SDValue &Lo,
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return;
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}
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break;
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case SplitVector:
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case TargetLowering::TypeSplitVector:
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// If the input is a vector that needs to be split, convert each split
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// piece of the input now.
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GetSplitVector(InOp, Lo, Hi);
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@ -774,7 +774,7 @@ void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
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EVT InVT = N->getOperand(0).getValueType();
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switch (getTypeAction(InVT)) {
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default: llvm_unreachable("Unexpected type action!");
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case Legal: {
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case TargetLowering::TypeLegal: {
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EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
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LoVT.getVectorNumElements());
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Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
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@ -783,10 +783,10 @@ void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
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DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
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break;
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}
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case SplitVector:
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case TargetLowering::TypeSplitVector:
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GetSplitVector(N->getOperand(0), Lo, Hi);
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break;
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case WidenVector: {
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case TargetLowering::TypeWidenVector: {
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// If the result needs to be split and the input needs to be widened,
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// the two types must have different lengths. Use the widened result
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// and extract from it to do the split.
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@ -1439,7 +1439,7 @@ SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
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unsigned Opcode = N->getOpcode();
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unsigned InVTNumElts = InVT.getVectorNumElements();
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if (getTypeAction(InVT) == WidenVector) {
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if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) {
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InOp = GetWidenedVector(N->getOperand(0));
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InVT = InOp.getValueType();
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InVTNumElts = InVT.getVectorNumElements();
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@ -1515,7 +1515,7 @@ SDValue DAGTypeLegalizer::WidenVecRes_Shift(SDNode *N) {
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SDValue ShOp = N->getOperand(1);
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EVT ShVT = ShOp.getValueType();
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if (getTypeAction(ShVT) == WidenVector) {
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if (getTypeAction(ShVT) == TargetLowering::TypeWidenVector) {
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ShOp = GetWidenedVector(ShOp);
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ShVT = ShOp.getValueType();
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}
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@ -1557,9 +1557,9 @@ SDValue DAGTypeLegalizer::WidenVecRes_BITCAST(SDNode *N) {
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default:
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assert(false && "Unknown type action!");
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break;
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case Legal:
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case TargetLowering::TypeLegal:
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break;
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case PromoteInteger:
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case TargetLowering::TypePromoteInteger:
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// If the InOp is promoted to the same size, convert it. Otherwise,
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// fall out of the switch and widen the promoted input.
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InOp = GetPromotedInteger(InOp);
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@ -1567,13 +1567,13 @@ SDValue DAGTypeLegalizer::WidenVecRes_BITCAST(SDNode *N) {
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if (WidenVT.bitsEq(InVT))
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return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
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break;
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case SoftenFloat:
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case ExpandInteger:
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case ExpandFloat:
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case ScalarizeVector:
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case SplitVector:
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case TargetLowering::TypeSoftenFloat:
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case TargetLowering::TypeExpandInteger:
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case TargetLowering::TypeExpandFloat:
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case TargetLowering::TypeScalarizeVector:
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case TargetLowering::TypeSplitVector:
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break;
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case WidenVector:
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case TargetLowering::TypeWidenVector:
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// If the InOp is widened to the same size, convert it. Otherwise, fall
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// out of the switch and widen the widened input.
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InOp = GetWidenedVector(InOp);
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@ -1653,7 +1653,7 @@ SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
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unsigned NumOperands = N->getNumOperands();
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bool InputWidened = false; // Indicates we need to widen the input.
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if (getTypeAction(InVT) != WidenVector) {
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if (getTypeAction(InVT) != TargetLowering::TypeWidenVector) {
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if (WidenVT.getVectorNumElements() % InVT.getVectorNumElements() == 0) {
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// Add undef vectors to widen to correct length.
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unsigned NumConcat = WidenVT.getVectorNumElements() /
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@ -1732,7 +1732,7 @@ SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) {
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ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
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unsigned InVTNumElts = InVT.getVectorNumElements();
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if (getTypeAction(InVT) == WidenVector) {
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if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) {
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InOp = GetWidenedVector(InOp);
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InVT = InOp.getValueType();
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InVTNumElts = InVT.getVectorNumElements();
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@ -1800,7 +1800,7 @@ SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
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SDValue Idx = N->getOperand(1);
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DebugLoc dl = N->getDebugLoc();
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if (getTypeAction(InOp.getValueType()) == WidenVector)
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if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
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InOp = GetWidenedVector(InOp);
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EVT InVT = InOp.getValueType();
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@ -1882,7 +1882,7 @@ SDValue DAGTypeLegalizer::WidenVecRes_SELECT(SDNode *N) {
|
||||
EVT CondEltVT = CondVT.getVectorElementType();
|
||||
EVT CondWidenVT = EVT::getVectorVT(*DAG.getContext(),
|
||||
CondEltVT, WidenNumElts);
|
||||
if (getTypeAction(CondVT) == WidenVector)
|
||||
if (getTypeAction(CondVT) == TargetLowering::TypeWidenVector)
|
||||
Cond1 = GetWidenedVector(Cond1);
|
||||
|
||||
if (Cond1.getValueType() != CondWidenVT)
|
||||
@ -2026,7 +2026,7 @@ SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
|
||||
DebugLoc dl = N->getDebugLoc();
|
||||
unsigned NumElts = VT.getVectorNumElements();
|
||||
SDValue InOp = N->getOperand(0);
|
||||
if (getTypeAction(InOp.getValueType()) == WidenVector)
|
||||
if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
|
||||
InOp = GetWidenedVector(InOp);
|
||||
EVT InVT = InOp.getValueType();
|
||||
EVT InEltVT = InVT.getVectorElementType();
|
||||
@ -2081,7 +2081,7 @@ SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) {
|
||||
unsigned NumOperands = N->getNumOperands();
|
||||
for (unsigned i=0; i < NumOperands; ++i) {
|
||||
SDValue InOp = N->getOperand(i);
|
||||
if (getTypeAction(InOp.getValueType()) == WidenVector)
|
||||
if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
|
||||
InOp = GetWidenedVector(InOp);
|
||||
for (unsigned j=0; j < NumInElts; ++j)
|
||||
Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
|
||||
|
Loading…
Reference in New Issue
Block a user