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optimize the case of cond ? 42 : 41 and friends. This compiles the
example to: _test: movl 4(%esp), %eax cmpl $41, (%eax) setg %al movzbl %al, %eax orl $4294967294, %eax ret instead of: movl 4(%esp), %eax cmpl $41, (%eax) movl $4294967294, %ecx movl $4294967295, %eax cmova %ecx, %eax ret which is smaller in code size and faster. rdar://6668608 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66868 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -8218,6 +8218,18 @@ static SDValue PerformSELECTCombine(SDNode *N, SelectionDAG &DAG,
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return DAG.getNode(ISD::SHL, DL, LHS.getValueType(), Cond,
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DAG.getConstant(ShAmt, MVT::i8));
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}
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// Optimize Cond ? cst+1 : cst -> zext(setcc(C)+cst.
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if (RHSC->getAPIntValue()+1 == LHSC->getAPIntValue()) {
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if (NeedsCondInvert) // Invert the condition if needed.
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Cond = DAG.getNode(ISD::XOR, DL, Cond.getValueType(), Cond,
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DAG.getConstant(1, Cond.getValueType()));
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// Zero extend the condition if needed.
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Cond = DAG.getNode(ISD::ZERO_EXTEND, DL, RHSC->getValueType(0), Cond);
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return DAG.getNode(ISD::ADD, DL, Cond.getValueType(), Cond,
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SDValue(RHSC, 0));
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}
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}
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}
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@ -8263,6 +8275,21 @@ static SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG,
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return DCI.CombineTo(N, Cond, SDValue());
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return Cond;
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}
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// Optimize Cond ? cst+1 : cst -> zext(setcc(C)+cst.
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if (FalseC->getAPIntValue()+1 == TrueC->getAPIntValue()) {
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SDValue Cond = N->getOperand(3);
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Cond = DAG.getNode(X86ISD::SETCC, DL, MVT::i8,
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DAG.getConstant(CC, MVT::i8), Cond);
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// Zero extend the condition if needed.
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Cond = DAG.getNode(ISD::ZERO_EXTEND, DL, FalseC->getValueType(0), Cond);
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Cond = DAG.getNode(ISD::ADD, DL, Cond.getValueType(), Cond,
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SDValue(FalseC, 0));
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if (N->getNumValues() == 2) // Dead flag value?
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return DCI.CombineTo(N, Cond, SDValue());
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return Cond;
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}
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}
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}
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return SDValue();
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14
test/CodeGen/X86/select-no-cmov.ll
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14
test/CodeGen/X86/select-no-cmov.ll
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@ -0,0 +1,14 @@
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; RUN: llvm-as < %s | llc | not grep cmov
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
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target triple = "i386-apple-darwin7"
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; Should compile to setcc | -2.
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; rdar://6668608
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define i32 @test(i32* nocapture %P) nounwind readonly {
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entry:
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%0 = load i32* %P, align 4 ; <i32> [#uses=1]
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%1 = icmp sgt i32 %0, 41 ; <i1> [#uses=1]
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%iftmp.0.0 = select i1 %1, i32 -1, i32 -2 ; <i32> [#uses=1]
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ret i32 %iftmp.0.0
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}
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