Fixed a nasty layering violation in the edis source

code.  It used to #include the enhanced disassembly
information for the targets it supported straight
out of lib/Target/{X86,ARM,...} but now it uses a
new interface provided by MCDisassembler, and (so
far) implemented by X86 and ARM.

Also removed hacky #define-controlled initialization
of targets in edis.  If clients only want edis to
initialize a limited set of targets, they can set
--enable-targets on the configure command line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101179 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sean Callanan 2010-04-13 21:21:57 +00:00
parent 0a6f053732
commit 9899f70a74
13 changed files with 159 additions and 122 deletions

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@ -0,0 +1,29 @@
//===-- llvm/MC/EDInstInfo.h - EDis instruction info ------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
#ifndef EDINSTINFO_H
#define EDINSTINFO_H
#include "llvm/System/DataTypes.h"
namespace llvm {
#define EDIS_MAX_OPERANDS 13
#define EDIS_MAX_SYNTAXES 2
struct EDInstInfo {
uint8_t instructionType;
uint8_t numOperands;
uint8_t operandTypes[EDIS_MAX_OPERANDS];
uint8_t operandFlags[EDIS_MAX_OPERANDS];
const char operandOrders[EDIS_MAX_SYNTAXES][EDIS_MAX_OPERANDS];
};
} // namespace llvm
#endif

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@ -16,6 +16,8 @@ namespace llvm {
class MCInst;
class MemoryObject;
class raw_ostream;
struct EDInstInfo;
/// MCDisassembler - Superclass for all disassemblers. Consumes a memory region
/// and provides an array of assembly instructions.
@ -43,7 +45,15 @@ public:
const MemoryObject &region,
uint64_t address,
raw_ostream &vStream) const = 0;
};
/// getEDInfo - Returns the enhanced insturction information corresponding to
/// the disassembler.
///
/// @return - An array of instruction information, with one entry for
/// each MCInst opcode this disassembler returns.
/// NULL if there is no info for this target.
virtual EDInstInfo *getEDInfo() const { return NULL; }
};
} // namespace llvm

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@ -18,6 +18,7 @@
#include "ARMDisassembler.h"
#include "ARMDisassemblerCore.h"
#include "llvm/MC/EDInstInfo.h"
#include "llvm/MC/MCInst.h"
#include "llvm/Target/TargetRegistry.h"
#include "llvm/Support/Debug.h"
@ -38,7 +39,9 @@
///
#include "../ARMGenDecoderTables.inc"
namespace llvm {
#include "../ARMGenEDInfo.inc"
using namespace llvm;
/// showBitVector - Use the raw_ostream to log a diagnostic message describing
/// the inidividual bits of the instruction.
@ -547,4 +550,10 @@ extern "C" void LLVMInitializeARMDisassembler() {
createThumbDisassembler);
}
} // namespace llvm
EDInstInfo *ARMDisassembler::getEDInfo() const {
return instInfoARM;
}
EDInstInfo *ThumbDisassembler::getEDInfo() const {
return instInfoARM;
}

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@ -24,6 +24,8 @@ class MCInst;
class MemoryObject;
class raw_ostream;
struct EDInstInfo;
/// ARMDisassembler - ARM disassembler for all ARM platforms.
class ARMDisassembler : public MCDisassembler {
public:
@ -42,6 +44,9 @@ public:
const MemoryObject &region,
uint64_t address,
raw_ostream &vStream) const;
/// getEDInfo - See MCDisassembler.
EDInstInfo *getEDInfo() const;
private:
};
@ -82,6 +87,9 @@ public:
const MemoryObject &region,
uint64_t address,
raw_ostream &vStream) const;
/// getEDInfo - See MCDisassembler.
EDInstInfo *getEDInfo() const;
private:
Session SO;
};

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@ -17,6 +17,7 @@
#include "X86Disassembler.h"
#include "X86DisassemblerDecoder.h"
#include "llvm/MC/EDInstInfo.h"
#include "llvm/MC/MCDisassembler.h"
#include "llvm/MC/MCDisassembler.h"
#include "llvm/MC/MCInst.h"
@ -26,6 +27,7 @@
#include "llvm/Support/raw_ostream.h"
#include "X86GenRegisterNames.inc"
#include "X86GenEDInfo.inc"
using namespace llvm;
using namespace llvm::X86Disassembler;
@ -69,6 +71,10 @@ X86GenericDisassembler::X86GenericDisassembler(DisassemblerMode mode) :
X86GenericDisassembler::~X86GenericDisassembler() {
}
EDInstInfo *X86GenericDisassembler::getEDInfo() const {
return instInfoX86;
}
/// regionReader - a callback function that wraps the readByte method from
/// MemoryObject.
///

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@ -94,6 +94,8 @@ namespace llvm {
class MCInst;
class MemoryObject;
class raw_ostream;
struct EDInstInfo;
namespace X86Disassembler {
@ -115,6 +117,9 @@ public:
const MemoryObject &region,
uint64_t address,
raw_ostream &vStream) const;
/// getEDInfo - See MCDisassembler.
EDInstInfo *getEDInfo() const;
private:
DisassemblerMode fMode;
};

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@ -18,6 +18,7 @@
#include "llvm/ADT/OwningPtr.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/MC/EDInstInfo.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDisassembler.h"
@ -39,47 +40,34 @@
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetSelect.h"
#ifdef EDIS_X86
#include "../../lib/Target/X86/X86GenEDInfo.inc"
#endif
#ifdef EDIS_ARM
#include "../../lib/Target/ARM/ARMGenEDInfo.inc"
#endif
using namespace llvm;
bool EDDisassembler::sInitialized = false;
EDDisassembler::DisassemblerMap_t EDDisassembler::sDisassemblers;
struct InfoMap {
struct TripleMap {
Triple::ArchType Arch;
const char *String;
const InstInfo *Info;
};
static struct InfoMap infomap[] = {
#ifdef EDIS_X86
{ Triple::x86, "i386-unknown-unknown", instInfoX86 },
{ Triple::x86_64, "x86_64-unknown-unknown", instInfoX86 },
#endif
#ifdef EDIS_ARM
{ Triple::arm, "arm-unknown-unknown", instInfoARM },
{ Triple::thumb, "thumb-unknown-unknown", instInfoARM },
#endif
{ Triple::InvalidArch, NULL, NULL }
static struct TripleMap triplemap[] = {
{ Triple::x86, "i386-unknown-unknown" },
{ Triple::x86_64, "x86_64-unknown-unknown" },
{ Triple::arm, "arm-unknown-unknown" },
{ Triple::thumb, "thumb-unknown-unknown" },
{ Triple::InvalidArch, NULL, }
};
/// infoFromArch - Returns the InfoMap corresponding to a given architecture,
/// infoFromArch - Returns the TripleMap corresponding to a given architecture,
/// or NULL if there is an error
///
/// @arg arch - The Triple::ArchType for the desired architecture
static const InfoMap *infoFromArch(Triple::ArchType arch) {
static const char *tripleFromArch(Triple::ArchType arch) {
unsigned int infoIndex;
for (infoIndex = 0; infomap[infoIndex].String != NULL; ++infoIndex) {
if (arch == infomap[infoIndex].Arch)
return &infomap[infoIndex];
for (infoIndex = 0; triplemap[infoIndex].String != NULL; ++infoIndex) {
if (arch == triplemap[infoIndex].Arch)
return triplemap[infoIndex].String;
}
return NULL;
@ -115,25 +103,17 @@ static int getLLVMSyntaxVariant(Triple::ArchType arch,
}
}
#define BRINGUP_TARGET(tgt) \
LLVMInitialize##tgt##TargetInfo(); \
LLVMInitialize##tgt##Target(); \
LLVMInitialize##tgt##AsmPrinter(); \
LLVMInitialize##tgt##AsmParser(); \
LLVMInitialize##tgt##Disassembler();
void EDDisassembler::initialize() {
if (sInitialized)
return;
sInitialized = true;
#ifdef EDIS_X86
BRINGUP_TARGET(X86)
#endif
#ifdef EDIS_ARM
BRINGUP_TARGET(ARM)
#endif
InitializeAllTargetInfos();
InitializeAllTargets();
InitializeAllAsmPrinters();
InitializeAllAsmParsers();
InitializeAllDisassemblers();
}
#undef BRINGUP_TARGET
@ -175,14 +155,10 @@ EDDisassembler::EDDisassembler(CPUKey &key) :
HasSemantics(false),
ErrorStream(nulls()),
Key(key) {
const InfoMap *infoMap = infoFromArch(key.Arch);
if (!infoMap)
return;
const char *triple = tripleFromArch(key.Arch);
InstInfos = infoMap->Info;
const char *triple = infoMap->String;
if (!triple)
return;
LLVMSyntaxVariant = getLLVMSyntaxVariant(key.Arch, key.Syntax);
@ -220,6 +196,8 @@ EDDisassembler::EDDisassembler(CPUKey &key) :
if (!Disassembler)
return;
InstInfos = Disassembler->getEDInfo();
InstString.reset(new std::string);
InstStream.reset(new raw_string_ostream(*InstString));
@ -231,8 +209,6 @@ EDDisassembler::EDDisassembler(CPUKey &key) :
GenericAsmLexer.reset(new AsmLexer(*AsmInfo));
SpecificAsmLexer.reset(Tgt->createAsmLexer(*AsmInfo));
SpecificAsmLexer->InstallLexer(*GenericAsmLexer);
InstInfos = infoMap->Info;
initMaps(*targetMachine->getRegisterInfo());
@ -285,7 +261,7 @@ EDInst *EDDisassembler::createInst(EDByteReaderCallback byteReader,
delete inst;
return NULL;
} else {
const InstInfo *thisInstInfo;
const llvm::EDInstInfo *thisInstInfo;
thisInstInfo = &InstInfos[inst->getOpcode()];
@ -308,7 +284,6 @@ void EDDisassembler::initMaps(const TargetRegisterInfo &registerInfo) {
switch (Key.Arch) {
default:
break;
#ifdef EDIS_X86
case Triple::x86:
case Triple::x86_64:
stackPointers.insert(registerIDWithName("SP"));
@ -319,15 +294,12 @@ void EDDisassembler::initMaps(const TargetRegisterInfo &registerInfo) {
programCounters.insert(registerIDWithName("EIP"));
programCounters.insert(registerIDWithName("RIP"));
break;
#endif
#ifdef EDIS_ARM
case Triple::arm:
case Triple::thumb:
stackPointers.insert(registerIDWithName("SP"));
programCounters.insert(registerIDWithName("PC"));
break;
#endif
}
}

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@ -48,6 +48,8 @@ template <typename T> class SmallVectorImpl;
class SourceMgr;
class Target;
class TargetRegisterInfo;
struct EDInstInfo;
}
/// EDDisassembler - Encapsulates a disassembler for a single architecture and
@ -143,7 +145,7 @@ struct EDDisassembler {
llvm::sys::Mutex PrinterMutex;
/// The array of instruction information provided by the TableGen backend for
/// the target architecture
const InstInfo *InstInfos;
const llvm::EDInstInfo *InstInfos;
/// The target-specific lexer for use in tokenizing strings, in
/// target-independent and target-specific portions
llvm::OwningPtr<llvm::AsmLexer> GenericAsmLexer;

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@ -18,6 +18,7 @@
#include "EDOperand.h"
#include "EDToken.h"
#include "llvm/MC/EDInstInfo.h"
#include "llvm/MC/MCInst.h"
using namespace llvm;
@ -25,7 +26,7 @@ using namespace llvm;
EDInst::EDInst(llvm::MCInst *inst,
uint64_t byteSize,
EDDisassembler &disassembler,
const InstInfo *info) :
const llvm::EDInstInfo *info) :
Disassembler(disassembler),
Inst(inst),
ThisInstInfo(info),

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@ -23,6 +23,10 @@
#include <string>
#include <vector>
namespace llvm {
struct EDInstInfo;
}
/// CachedResult - Encapsulates the result of a function along with the validity
/// of that result, so that slow functions don't need to run twice
struct CachedResult {
@ -54,7 +58,7 @@ struct EDInst {
/// The containing MCInst
llvm::MCInst *Inst;
/// The instruction information provided by TableGen for this instruction
const InstInfo *ThisInstInfo;
const llvm::EDInstInfo *ThisInstInfo;
/// The number of bytes for the machine code representation of the instruction
uint64_t ByteSize;
@ -95,7 +99,7 @@ struct EDInst {
EDInst(llvm::MCInst *inst,
uint64_t byteSize,
EDDisassembler &disassembler,
const InstInfo *instInfo);
const llvm::EDInstInfo *instInfo);
~EDInst();
/// byteSize - returns the number of bytes consumed by the machine code

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@ -17,6 +17,7 @@
#include "EDInst.h"
#include "EDOperand.h"
#include "llvm/MC/EDInstInfo.h"
#include "llvm/MC/MCInst.h"
using namespace llvm;

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@ -49,18 +49,6 @@ ifeq ($(HOST_OS),Darwin)
endif
endif
EDIS_DEFINES =
ifneq (,$(findstring X86,$(TARGETS_TO_BUILD)))
EDIS_DEFINES := $(EDIS_DEFINES) -DEDIS_X86
endif
ifneq (,$(findstring ARM,$(TARGETS_TO_BUILD)))
EDIS_DEFINES := $(EDIS_DEFINES) -DEDIS_ARM
endif
CXXFLAGS := $(CXXFLAGS) $(EDIS_DEFINES)
EDInfo.inc: $(TBLGEN)
$(Echo) "Building semantic information header"
$(Verb) $(TableGen) -o $(call SYSPATH, $@) -gen-enhanced-disassembly-header /dev/null

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@ -19,6 +19,7 @@
#include "CodeGenTarget.h"
#include "Record.h"
#include "llvm/MC/EDInstInfo.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/raw_ostream.h"
@ -27,9 +28,6 @@
#include <string>
#include <vector>
#define MAX_OPERANDS 13
#define MAX_SYNTAXES 2
using namespace llvm;
///////////////////////////////////////////////////////////
@ -376,7 +374,7 @@ static int X86TypeFromOpName(LiteralConstantEmitter *type,
/// @operandFlags - A reference the array of operand flag objects
/// @inst - The instruction to use as a source of information
static void X86PopulateOperands(
LiteralConstantEmitter *(&operandTypes)[MAX_OPERANDS],
LiteralConstantEmitter *(&operandTypes)[EDIS_MAX_OPERANDS],
const CodeGenInstruction &inst) {
if (!inst.TheDef->isSubClassOf("X86Inst"))
return;
@ -406,7 +404,7 @@ static void X86PopulateOperands(
/// @opName - The name of the operand
/// @flag - The name of the flag to add
static inline void decorate1(
FlagsConstantEmitter *(&operandFlags)[MAX_OPERANDS],
FlagsConstantEmitter *(&operandFlags)[EDIS_MAX_OPERANDS],
const CodeGenInstruction &inst,
const char *opName,
const char *opFlag) {
@ -458,7 +456,7 @@ static inline void decorate1(
/// @arg inst - A reference to the original instruction
static void X86ExtractSemantics(
LiteralConstantEmitter &instType,
FlagsConstantEmitter *(&operandFlags)[MAX_OPERANDS],
FlagsConstantEmitter *(&operandFlags)[EDIS_MAX_OPERANDS],
const CodeGenInstruction &inst) {
const std::string &name = inst.TheDef->getName();
@ -655,7 +653,7 @@ static int ARMFlagFromOpName(LiteralConstantEmitter *type,
/// @operandFlags - A reference the array of operand flag objects
/// @inst - The instruction to use as a source of information
static void ARMPopulateOperands(
LiteralConstantEmitter *(&operandTypes)[MAX_OPERANDS],
LiteralConstantEmitter *(&operandTypes)[EDIS_MAX_OPERANDS],
const CodeGenInstruction &inst) {
if (!inst.TheDef->isSubClassOf("InstARM") &&
!inst.TheDef->isSubClassOf("InstThumb"))
@ -664,8 +662,9 @@ static void ARMPopulateOperands(
unsigned int index;
unsigned int numOperands = inst.OperandList.size();
if (numOperands > MAX_OPERANDS) {
errs() << "numOperands == " << numOperands << " > " << MAX_OPERANDS << '\n';
if (numOperands > EDIS_MAX_OPERANDS) {
errs() << "numOperands == " << numOperands << " > " <<
EDIS_MAX_OPERANDS << '\n';
llvm_unreachable("Too many operands");
}
@ -698,8 +697,8 @@ static void ARMPopulateOperands(
/// @arg inst - A reference to the original instruction
static void ARMExtractSemantics(
LiteralConstantEmitter &instType,
LiteralConstantEmitter *(&operandTypes)[MAX_OPERANDS],
FlagsConstantEmitter *(&operandFlags)[MAX_OPERANDS],
LiteralConstantEmitter *(&operandTypes)[EDIS_MAX_OPERANDS],
FlagsConstantEmitter *(&operandFlags)[EDIS_MAX_OPERANDS],
const CodeGenInstruction &inst) {
const std::string &name = inst.TheDef->getName();
@ -759,15 +758,15 @@ static void populateInstInfo(CompoundConstantEmitter &infoArray,
CompoundConstantEmitter *operandTypeArray = new CompoundConstantEmitter;
infoStruct->addEntry(operandTypeArray);
LiteralConstantEmitter *operandTypes[MAX_OPERANDS];
LiteralConstantEmitter *operandTypes[EDIS_MAX_OPERANDS];
CompoundConstantEmitter *operandFlagArray = new CompoundConstantEmitter;
infoStruct->addEntry(operandFlagArray);
FlagsConstantEmitter *operandFlags[MAX_OPERANDS];
FlagsConstantEmitter *operandFlags[EDIS_MAX_OPERANDS];
for (unsigned operandIndex = 0;
operandIndex < MAX_OPERANDS;
operandIndex < EDIS_MAX_OPERANDS;
++operandIndex) {
operandTypes[operandIndex] = new LiteralConstantEmitter;
operandTypeArray->addEntry(operandTypes[operandIndex]);
@ -793,9 +792,11 @@ static void populateInstInfo(CompoundConstantEmitter &infoArray,
infoStruct->addEntry(operandOrderArray);
for (unsigned syntaxIndex = 0; syntaxIndex < MAX_SYNTAXES; ++syntaxIndex) {
for (unsigned syntaxIndex = 0;
syntaxIndex < EDIS_MAX_SYNTAXES;
++syntaxIndex) {
CompoundConstantEmitter *operandOrder =
new CompoundConstantEmitter(MAX_OPERANDS);
new CompoundConstantEmitter(EDIS_MAX_OPERANDS);
operandOrderArray->addEntry(operandOrder);
@ -808,33 +809,7 @@ static void populateInstInfo(CompoundConstantEmitter &infoArray,
}
}
void EDEmitter::run(raw_ostream &o) {
unsigned int i = 0;
CompoundConstantEmitter infoArray;
CodeGenTarget target;
populateInstInfo(infoArray, target);
o << "InstInfo instInfo" << target.getName().c_str() << "[] = ";
infoArray.emit(o, i);
o << ";" << "\n";
}
void EDEmitter::runHeader(raw_ostream &o) {
EmitSourceFileHeader("Enhanced Disassembly Info Header", o);
o << "#ifndef EDInfo_" << "\n";
o << "#define EDInfo_" << "\n";
o << "\n";
o << "#include <inttypes.h>" << "\n";
o << "\n";
o << "#define MAX_OPERANDS " << format("%d", MAX_OPERANDS) << "\n";
o << "#define MAX_SYNTAXES " << format("%d", MAX_SYNTAXES) << "\n";
o << "\n";
unsigned int i = 0;
static void emitCommonEnums(raw_ostream &o, unsigned int &i) {
EnumEmitter operandTypes("OperandTypes");
operandTypes.addEntry("kOperandTypeNone");
operandTypes.addEntry("kOperandTypeImmediate");
@ -872,7 +847,6 @@ void EDEmitter::runHeader(raw_ostream &o) {
operandTypes.addEntry("kOperandTypeThumb2AddrModeSoReg");
operandTypes.addEntry("kOperandTypeThumb2AddrModeImm8s4");
operandTypes.addEntry("kOperandTypeThumb2AddrModeImm8s4Offset");
operandTypes.emit(o, i);
o << "\n";
@ -895,14 +869,42 @@ void EDEmitter::runHeader(raw_ostream &o) {
instructionTypes.emit(o, i);
o << "\n";
}
void EDEmitter::run(raw_ostream &o) {
unsigned int i = 0;
StructEmitter instInfo("InstInfo");
instInfo.addMember("uint8_t", "instructionType");
instInfo.addMember("uint8_t", "numOperands");
instInfo.addMember("uint8_t", "operandTypes[MAX_OPERANDS]");
instInfo.addMember("uint8_t", "operandFlags[MAX_OPERANDS]");
instInfo.addMember("const char", "operandOrders[MAX_SYNTAXES][MAX_OPERANDS]");
instInfo.emit(o, i);
CompoundConstantEmitter infoArray;
CodeGenTarget target;
populateInstInfo(infoArray, target);
emitCommonEnums(o, i);
o << "namespace {\n";
o << "llvm::EDInstInfo instInfo" << target.getName().c_str() << "[] = ";
infoArray.emit(o, i);
o << ";" << "\n";
o << "}\n";
}
void EDEmitter::runHeader(raw_ostream &o) {
EmitSourceFileHeader("Enhanced Disassembly Info Header", o);
o << "#ifndef EDInfo_" << "\n";
o << "#define EDInfo_" << "\n";
o << "\n";
o << "#include <inttypes.h>" << "\n";
o << "\n";
o << "#define EDIS_MAX_OPERANDS " << format("%d", EDIS_MAX_OPERANDS) << "\n";
o << "#define EDIS_MAX_SYNTAXES " << format("%d", EDIS_MAX_SYNTAXES) << "\n";
o << "\n";
unsigned int i = 0;
emitCommonEnums(o, i);
o << "\n";
o << "#endif" << "\n";