Don't attach annotations to MCInst's. Instead, have the disassembler return, and the printer accept, an annotation string which can be passed through if the client cares about annotations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139876 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson 2011-09-15 23:38:46 +00:00
parent 71280b55a3
commit 98c5ddabca
31 changed files with 88 additions and 114 deletions

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@ -70,6 +70,7 @@ public:
/// @param address - The address, in the memory space of region, of the first
/// byte of the instruction.
/// @param vStream - The stream to print warnings and diagnostic messages on.
/// @param cStream - The stream to print comments and annotations on.
/// @return - MCDisassembler::Success if the instruction is valid,
/// MCDisassembler::SoftFail if the instruction was
/// disassemblable but invalid,
@ -78,7 +79,8 @@ public:
uint64_t& size,
const MemoryObject &region,
uint64_t address,
raw_ostream &vStream) const = 0;
raw_ostream &vStream,
raw_ostream &cStream) const = 0;
/// getEDInfo - Returns the enhanced instruction information corresponding to
/// the disassembler.

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@ -129,7 +129,6 @@ public:
class MCInst {
unsigned Opcode;
SmallVector<MCOperand, 8> Operands;
SmallVector<std::string, 1> Annotations;
public:
MCInst() : Opcode(0) {}
@ -145,15 +144,7 @@ public:
Operands.push_back(Op);
}
void addAnnotation(const std::string &Annot) {
Annotations.push_back(Annot);
}
void clear() {
Operands.clear();
Annotations.clear();
}
void clear() { Operands.clear(); }
size_t size() { return Operands.size(); }
typedef SmallVector<MCOperand, 8>::iterator iterator;
@ -163,9 +154,6 @@ public:
return Operands.insert(I, Op);
}
size_t getNumAnnotations() const { return Annotations.size(); }
std::string getAnnotation(size_t i) const { return Annotations[i]; }
void print(raw_ostream &OS, const MCAsmInfo *MAI) const;
void dump() const;

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@ -28,6 +28,9 @@ protected:
/// The current set of available features.
unsigned AvailableFeatures;
/// Utility function for printing annotations.
void printAnnotation(raw_ostream &OS, StringRef Annot);
public:
MCInstPrinter(const MCAsmInfo &mai)
: CommentStream(0), MAI(mai), AvailableFeatures(0) {}
@ -39,11 +42,8 @@ public:
/// printInst - Print the specified MCInst to the specified raw_ostream.
///
virtual void printInst(const MCInst *MI, raw_ostream &OS) = 0;
/// printAnnotations - Print the annotation comments attached to specified
/// MCInst to the specified raw_ostream.
void printAnnotations(const MCInst *MI, raw_ostream &OS);
virtual void printInst(const MCInst *MI, raw_ostream &OS,
StringRef Annot) = 0;
/// getOpcodeName - Return the name of the specified opcode enum (e.g.
/// "MOV32ri") or empty if we can't resolve it.

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@ -1244,7 +1244,7 @@ void MCAsmStreamer::EmitInstruction(const MCInst &Inst) {
// If we have an AsmPrinter, use that to print, otherwise print the MCInst.
if (InstPrinter)
InstPrinter->printInst(&Inst, OS);
InstPrinter->printInst(&Inst, OS, "");
else
Inst.print(OS, &MAI);
EmitEOL();

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@ -144,7 +144,7 @@ size_t LLVMDisasmInstruction(LLVMDisasmContextRef DCR, uint8_t *Bytes,
MCInstPrinter *IP = DC->getIP();
MCDisassembler::DecodeStatus S;
S = DisAsm->getInstruction(Inst, Size, MemoryObject, PC,
/*REMOVE*/ nulls());
/*REMOVE*/ nulls(), DC->CommentStream);
switch (S) {
case MCDisassembler::Fail:
case MCDisassembler::SoftFail:
@ -152,28 +152,16 @@ size_t LLVMDisasmInstruction(LLVMDisasmContextRef DCR, uint8_t *Bytes,
return 0;
case MCDisassembler::Success: {
SmallVector<char, 64> InsnStr;
raw_svector_ostream OS(InsnStr);
IP->printInst(&Inst, OS);
OS.flush();
DC->CommentStream.flush();
assert(DC->CommentsToEmit.back() == '\n');
DC->CommentsToEmit.push_back('\n');
StringRef Comments = DC->CommentsToEmit.str();
do {
// Emit a line of comments.
size_t Position = Comments.find('\n');
OS << ' ' << DC->getAsmInfo()->getCommentString()
<< ' ' << Comments.substr(0, Position) << '\n';
SmallVector<char, 64> InsnStr;
raw_svector_ostream OS(InsnStr);
IP->printInst(&Inst, OS, Comments);
OS.flush();
Comments = Comments.substr(Position+1);
} while (!Comments.empty());
DC->CommentsToEmit.clear();
// Tell the comment stream that the vector changed underneath it.
DC->CommentsToEmit.clear();
DC->CommentStream.resync();
assert(OutStringSize != 0 && "Output buffer cannot be zero size");

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@ -246,7 +246,7 @@ EDInst *EDDisassembler::createInst(EDByteReaderCallback byteReader,
MCDisassembler::DecodeStatus S;
S = Disassembler->getInstruction(*inst, byteSize, memoryObject, address,
ErrorStream);
ErrorStream, nulls());
switch (S) {
case MCDisassembler::Fail:
case MCDisassembler::SoftFail:
@ -327,7 +327,7 @@ bool EDDisassembler::registerIsProgramCounter(unsigned registerID) {
int EDDisassembler::printInst(std::string &str, MCInst &inst) {
PrinterMutex.acquire();
InstPrinter->printInst(&inst, *InstStream);
InstPrinter->printInst(&inst, *InstStream, "");
InstStream->flush();
str = *InstString;
InstString->clear();

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@ -41,16 +41,6 @@ void MCInst::print(raw_ostream &OS, const MCAsmInfo *MAI) const {
OS << " ";
getOperand(i).print(OS, MAI);
}
if (getNumAnnotations()) {
OS << " # Annots: ";
for (unsigned i = 0, e = getNumAnnotations(); i != e; ++i) {
OS << " \"";
OS << getAnnotation(i);
OS << '"';
}
}
OS << ">";
}
@ -67,17 +57,6 @@ void MCInst::dump_pretty(raw_ostream &OS, const MCAsmInfo *MAI,
OS << Separator;
getOperand(i).print(OS, MAI);
}
if (getNumAnnotations()) {
OS << " # Annots: ";
for (unsigned i = 0, e = getNumAnnotations(); i != e; ++i) {
OS << Separator;
OS << '"';
OS << getAnnotation(i);
OS << '"';
}
}
OS << ">";
}

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@ -8,8 +8,6 @@
//===----------------------------------------------------------------------===//
#include "llvm/MC/MCInstPrinter.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCInst.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
@ -27,8 +25,6 @@ void MCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
assert(0 && "Target should implement this");
}
void MCInstPrinter::printAnnotations(const MCInst *MI, raw_ostream &OS) {
for (unsigned i = 0, e = MI->getNumAnnotations(); i != e; ++i) {
OS << MI->getAnnotation(i) << "\n";
}
void MCInstPrinter::printAnnotation(raw_ostream &OS, StringRef Annot) {
if (!Annot.empty()) OS << Annot << "\n";
}

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@ -47,7 +47,8 @@ public:
uint64_t &size,
const MemoryObject &region,
uint64_t address,
raw_ostream &vStream) const;
raw_ostream &vStream,
raw_ostream &cStream) const;
/// getEDInfo - See MCDisassembler.
EDInstInfo *getEDInfo() const;
@ -71,7 +72,8 @@ public:
uint64_t &size,
const MemoryObject &region,
uint64_t address,
raw_ostream &vStream) const;
raw_ostream &vStream,
raw_ostream &cStream) const;
/// getEDInfo - See MCDisassembler.
EDInstInfo *getEDInfo() const;
@ -328,7 +330,8 @@ EDInstInfo *ThumbDisassembler::getEDInfo() const {
DecodeStatus ARMDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
const MemoryObject &Region,
uint64_t Address,
raw_ostream &os) const {
raw_ostream &os,
raw_ostream &cs) const {
uint8_t bytes[4];
assert(!(STI.getFeatureBits() & ARM::ModeThumb) &&
@ -527,7 +530,8 @@ void ThumbDisassembler::UpdateThumbVFPPredicate(MCInst &MI) const {
DecodeStatus ThumbDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
const MemoryObject &Region,
uint64_t Address,
raw_ostream &os) const {
raw_ostream &os,
raw_ostream &cs) const {
uint8_t bytes[4];
assert((STI.getFeatureBits() & ARM::ModeThumb) &&

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@ -51,7 +51,8 @@ void ARMInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
OS << getRegisterName(RegNo);
}
void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
StringRef Annot) {
unsigned Opcode = MI->getOpcode();
// Check for MOVs and print canonical forms, instead.
@ -71,9 +72,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
O << ", " << getRegisterName(MO2.getReg());
assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
if (CommentStream) printAnnotations(MI, *CommentStream);
if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
@ -91,13 +90,12 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
<< ", " << getRegisterName(MO1.getReg());
if (ARM_AM::getSORegShOp(MO2.getImm()) == ARM_AM::rrx) {
if (CommentStream) printAnnotations(MI, *CommentStream);
if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
O << ", #" << translateShiftImm(ARM_AM::getSORegOffset(MO2.getImm()));
if (CommentStream) printAnnotations(MI, *CommentStream);
if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
@ -111,7 +109,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
O << ".w";
O << '\t';
printRegisterList(MI, 4, O);
if (CommentStream) printAnnotations(MI, *CommentStream);
if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
if (Opcode == ARM::STR_PRE_IMM && MI->getOperand(2).getReg() == ARM::SP &&
@ -119,7 +117,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
O << '\t' << "push";
printPredicateOperand(MI, 4, O);
O << "\t{" << getRegisterName(MI->getOperand(1).getReg()) << "}";
if (CommentStream) printAnnotations(MI, *CommentStream);
if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
@ -132,7 +130,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
O << ".w";
O << '\t';
printRegisterList(MI, 4, O);
if (CommentStream) printAnnotations(MI, *CommentStream);
if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
if (Opcode == ARM::LDR_POST_IMM && MI->getOperand(2).getReg() == ARM::SP &&
@ -140,7 +138,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
O << '\t' << "pop";
printPredicateOperand(MI, 5, O);
O << "\t{" << getRegisterName(MI->getOperand(0).getReg()) << "}";
if (CommentStream) printAnnotations(MI, *CommentStream);
if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
@ -152,7 +150,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
printPredicateOperand(MI, 2, O);
O << '\t';
printRegisterList(MI, 4, O);
if (CommentStream) printAnnotations(MI, *CommentStream);
if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
@ -163,7 +161,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
printPredicateOperand(MI, 2, O);
O << '\t';
printRegisterList(MI, 4, O);
if (CommentStream) printAnnotations(MI, *CommentStream);
if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
@ -182,7 +180,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
if (Writeback) O << "!";
O << ", ";
printRegisterList(MI, 3, O);
if (CommentStream) printAnnotations(MI, *CommentStream);
if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
@ -191,12 +189,12 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
MI->getOperand(1).getReg() == ARM::R8) {
O << "\tnop";
printPredicateOperand(MI, 2, O);
if (CommentStream) printAnnotations(MI, *CommentStream);
if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
printInstruction(MI, O);
if (CommentStream) printAnnotations(MI, *CommentStream);
if (CommentStream) printAnnotation(*CommentStream, Annot);
}
void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,

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@ -25,7 +25,7 @@ class ARMInstPrinter : public MCInstPrinter {
public:
ARMInstPrinter(const MCAsmInfo &MAI, const MCSubtargetInfo &STI);
virtual void printInst(const MCInst *MI, raw_ostream &O);
virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot);
virtual StringRef getOpcodeName(unsigned Opcode) const;
virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;

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@ -497,7 +497,8 @@ MCDisassembler::DecodeStatus MBlazeDisassembler::getInstruction(MCInst &instr,
uint64_t &size,
const MemoryObject &region,
uint64_t address,
raw_ostream &vStream) const {
raw_ostream &vStream,
raw_ostream &cStream) const {
// The machine instruction.
uint32_t insn;
uint64_t read;

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@ -44,7 +44,8 @@ public:
uint64_t &size,
const MemoryObject &region,
uint64_t address,
raw_ostream &vStream) const;
raw_ostream &vStream,
raw_ostream &cStream) const;
/// getEDInfo - See MCDisassembler.
EDInstInfo *getEDInfo() const;

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@ -25,8 +25,10 @@ using namespace llvm;
// Include the auto-generated portion of the assembly writer.
#include "MBlazeGenAsmWriter.inc"
void MBlazeInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
void MBlazeInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
StringRef Annot) {
printInstruction(MI, O);
if (CommentStream) printAnnotation(*CommentStream, Annot);
}
void MBlazeInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,

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@ -24,7 +24,7 @@ namespace llvm {
MBlazeInstPrinter(const MCAsmInfo &MAI)
: MCInstPrinter(MAI) {}
virtual void printInst(const MCInst *MI, raw_ostream &O);
virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot);
// Autogenerated by tblgen.
void printInstruction(const MCInst *MI, raw_ostream &O);

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@ -25,8 +25,10 @@ using namespace llvm;
// Include the auto-generated portion of the assembly writer.
#include "MSP430GenAsmWriter.inc"
void MSP430InstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
void MSP430InstPrinter::printInst(const MCInst *MI, raw_ostream &O,
StringRef Annot) {
printInstruction(MI, O);
if (CommentStream) printAnnotation(*CommentStream, Annot);
}
void MSP430InstPrinter::printPCRelImmOperand(const MCInst *MI, unsigned OpNo,

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@ -24,7 +24,7 @@ namespace llvm {
MSP430InstPrinter(const MCAsmInfo &MAI)
: MCInstPrinter(MAI) {}
virtual void printInst(const MCInst *MI, raw_ostream &O);
virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot);
// Autogenerated by tblgen.
void printInstruction(const MCInst *MI, raw_ostream &O);

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@ -69,8 +69,10 @@ void MipsInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
OS << '$' << LowercaseString(getRegisterName(RegNo));
}
void MipsInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
void MipsInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
StringRef Annot) {
printInstruction(MI, O);
if (CommentStream) printAnnotation(*CommentStream, Annot);
}
void MipsInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,

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@ -86,7 +86,7 @@ public:
virtual StringRef getOpcodeName(unsigned Opcode) const;
virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
virtual void printInst(const MCInst *MI, raw_ostream &O);
virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot);
private:
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);

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@ -513,7 +513,7 @@ void PTXMCAsmStreamer::EmitInstruction(const MCInst &Inst) {
// If we have an AsmPrinter, use that to print, otherwise print the MCInst.
if (InstPrinter)
InstPrinter->printInst(&Inst, OS);
InstPrinter->printInst(&Inst, OS, "");
else
Inst.print(OS, &MAI);
EmitEOL();

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@ -31,7 +31,8 @@ void PPCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
OS << getRegisterName(RegNo);
}
void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
StringRef Annot) {
// Check for slwi/srwi mnemonics.
if (MI->getOpcode() == PPC::RLWINM) {
unsigned char SH = MI->getOperand(2).getImm();
@ -50,6 +51,8 @@ void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
O << ", ";
printOperand(MI, 1, O);
O << ", " << (unsigned int)SH;
if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
}
@ -60,6 +63,7 @@ void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
printOperand(MI, 0, O);
O << ", ";
printOperand(MI, 1, O);
if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
@ -73,11 +77,13 @@ void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
O << ", ";
printOperand(MI, 1, O);
O << ", " << (unsigned int)SH;
if (CommentStream) printAnnotation(*CommentStream, Annot);
return;
}
}
printInstruction(MI, O);
if (CommentStream) printAnnotation(*CommentStream, Annot);
}

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@ -32,7 +32,7 @@ public:
}
virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
virtual void printInst(const MCInst *MI, raw_ostream &O);
virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot);
virtual StringRef getOpcodeName(unsigned Opcode) const;
static const char *getInstructionName(unsigned Opcode);

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@ -114,7 +114,8 @@ X86GenericDisassembler::getInstruction(MCInst &instr,
uint64_t &size,
const MemoryObject &region,
uint64_t address,
raw_ostream &vStream) const {
raw_ostream &vStream,
raw_ostream &cStream) const {
InternalInstruction internalInstr;
int ret = decodeInstruction(&internalInstr,

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@ -117,7 +117,8 @@ public:
uint64_t &size,
const MemoryObject &region,
uint64_t address,
raw_ostream &vStream) const;
raw_ostream &vStream,
raw_ostream &cStream) const;
/// getEDInfo - See MCDisassembler.
EDInstInfo *getEDInfo() const;

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@ -39,14 +39,15 @@ void X86ATTInstPrinter::printRegName(raw_ostream &OS,
OS << '%' << getRegisterName(RegNo);
}
void X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS) {
void X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
StringRef Annot) {
// Try to print any aliases first.
if (!printAliasInstr(MI, OS))
printInstruction(MI, OS);
// If verbose assembly is enabled, we can print some informative comments.
if (CommentStream) {
printAnnotations(MI, *CommentStream);
printAnnotation(*CommentStream, Annot);
EmitAnyX86InstComments(MI, *CommentStream, getRegisterName);
}
}

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@ -25,7 +25,7 @@ public:
X86ATTInstPrinter(const MCAsmInfo &MAI);
virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
virtual void printInst(const MCInst *MI, raw_ostream &OS);
virtual void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot);
virtual StringRef getOpcodeName(unsigned Opcode) const;
// Autogenerated by tblgen, returns true if we successfully printed an

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@ -32,12 +32,13 @@ void X86IntelInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
OS << getRegisterName(RegNo);
}
void X86IntelInstPrinter::printInst(const MCInst *MI, raw_ostream &OS) {
void X86IntelInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
StringRef Annot) {
printInstruction(MI, OS);
// If verbose assembly is enabled, we can print some informative comments.
if (CommentStream) {
printAnnotations(MI, *CommentStream);
printAnnotation(*CommentStream, Annot);
EmitAnyX86InstComments(MI, *CommentStream, getRegisterName);
}
}

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@ -27,7 +27,7 @@ public:
: MCInstPrinter(MAI) {}
virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
virtual void printInst(const MCInst *MI, raw_ostream &OS);
virtual void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot);
virtual StringRef getOpcodeName(unsigned Opcode) const;
// Autogenerated by tblgen.

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@ -68,7 +68,7 @@ static bool PrintInsts(const MCDisassembler &DisAsm,
MCDisassembler::DecodeStatus S;
S = DisAsm.getInstruction(Inst, Size, memoryObject, Index,
/*REMOVE*/ nulls());
/*REMOVE*/ nulls(), nulls());
switch (S) {
case MCDisassembler::Fail:
SM.PrintMessage(SMLoc::getFromPointer(Bytes[Index].second),
@ -83,7 +83,7 @@ static bool PrintInsts(const MCDisassembler &DisAsm,
// Fall through
case MCDisassembler::Success:
Printer.printInst(&Inst, Out);
Printer.printInst(&Inst, Out, "");
Out << "\n";
break;
}

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@ -40,7 +40,7 @@ MCFunction::createFunctionFromMC(StringRef Name, const MCDisassembler *DisAsm,
for (uint64_t Index = Start; Index < End; Index += Size) {
MCInst Inst;
if (DisAsm->getInstruction(Inst, Size, Region, Index, DebugOut)) {
if (DisAsm->getInstruction(Inst, Size, Region, Index, DebugOut, nulls())) {
if (Ana->isBranch(Inst)) {
uint64_t targ = Ana->evaluateBranch(Inst, Index, Size);
// FIXME: Distinguish relocations from nop jumps.

View File

@ -262,13 +262,14 @@ static void DisassembleInput(const StringRef &Filename) {
if (!CFG) {
for (Index = Start; Index < End; Index += Size) {
MCInst Inst;
if (DisAsm->getInstruction(Inst, Size, memoryObject, Index,
DebugOut)) {
DebugOut, nulls())) {
uint64_t addr;
if (error(i->getAddress(addr))) break;
outs() << format("%8x:\t", addr + Index);
DumpBytes(StringRef(Bytes.data() + Index, Size));
IP->printInst(&Inst, outs());
IP->printInst(&Inst, outs(), "");
outs() << "\n";
} else {
errs() << ToolName << ": warning: invalid instruction encoding\n";
@ -323,7 +324,7 @@ static void DisassembleInput(const StringRef &Filename) {
// Simple loops.
if (fi->second.contains(&fi->second))
outs() << '\t';
IP->printInst(&Inst.Inst, outs());
IP->printInst(&Inst.Inst, outs(), "");
outs() << '\n';
}
}
@ -359,7 +360,7 @@ static void DisassembleInput(const StringRef &Filename) {
// Escape special chars and print the instruction in mnemonic form.
std::string Str;
raw_string_ostream OS(Str);
IP->printInst(&i->second.getInsts()[ii].Inst, OS);
IP->printInst(&i->second.getInsts()[ii].Inst, OS, "");
Out << DOT::EscapeString(OS.str()) << '|';
}
Out << "<o>\" shape=\"record\" ];\n";