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Fix whitespace and tabs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129517 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -907,68 +907,68 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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// String/text processing ops.
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse42_pcmpistrm128 : GCCBuiltin<"__builtin_ia32_pcmpistrm128">,
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Intrinsic<[llvm_v16i8_ty],
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[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty],
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[IntrNoMem]>;
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Intrinsic<[llvm_v16i8_ty],
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[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty],
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[IntrNoMem]>;
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def int_x86_sse42_pcmpistri128 : GCCBuiltin<"__builtin_ia32_pcmpistri128">,
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty],
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[IntrNoMem]>;
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty],
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[IntrNoMem]>;
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def int_x86_sse42_pcmpistria128 : GCCBuiltin<"__builtin_ia32_pcmpistria128">,
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty],
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[IntrNoMem]>;
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty],
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[IntrNoMem]>;
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def int_x86_sse42_pcmpistric128 : GCCBuiltin<"__builtin_ia32_pcmpistric128">,
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty],
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[IntrNoMem]>;
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty],
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[IntrNoMem]>;
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def int_x86_sse42_pcmpistrio128 : GCCBuiltin<"__builtin_ia32_pcmpistrio128">,
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty],
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[IntrNoMem]>;
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty],
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[IntrNoMem]>;
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def int_x86_sse42_pcmpistris128 : GCCBuiltin<"__builtin_ia32_pcmpistris128">,
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty],
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[IntrNoMem]>;
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty],
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[IntrNoMem]>;
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def int_x86_sse42_pcmpistriz128 : GCCBuiltin<"__builtin_ia32_pcmpistriz128">,
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty],
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[IntrNoMem]>;
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i8_ty],
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[IntrNoMem]>;
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def int_x86_sse42_pcmpestrm128 : GCCBuiltin<"__builtin_ia32_pcmpestrm128">,
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Intrinsic<[llvm_v16i8_ty],
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[llvm_v16i8_ty, llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty,
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llvm_i8_ty],
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[IntrNoMem]>;
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Intrinsic<[llvm_v16i8_ty],
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[llvm_v16i8_ty, llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty,
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llvm_i8_ty],
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[IntrNoMem]>;
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def int_x86_sse42_pcmpestri128 : GCCBuiltin<"__builtin_ia32_pcmpestri128">,
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty,
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llvm_i8_ty],
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[IntrNoMem]>;
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty,
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llvm_i8_ty],
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[IntrNoMem]>;
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def int_x86_sse42_pcmpestria128 : GCCBuiltin<"__builtin_ia32_pcmpestria128">,
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty,
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llvm_i8_ty],
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[IntrNoMem]>;
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty,
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llvm_i8_ty],
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[IntrNoMem]>;
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def int_x86_sse42_pcmpestric128 : GCCBuiltin<"__builtin_ia32_pcmpestric128">,
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty,
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llvm_i8_ty],
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[IntrNoMem]>;
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty,
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llvm_i8_ty],
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[IntrNoMem]>;
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def int_x86_sse42_pcmpestrio128 : GCCBuiltin<"__builtin_ia32_pcmpestrio128">,
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty,
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llvm_i8_ty],
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[IntrNoMem]>;
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty,
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llvm_i8_ty],
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[IntrNoMem]>;
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def int_x86_sse42_pcmpestris128 : GCCBuiltin<"__builtin_ia32_pcmpestris128">,
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty,
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llvm_i8_ty],
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[IntrNoMem]>;
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty,
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llvm_i8_ty],
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[IntrNoMem]>;
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def int_x86_sse42_pcmpestriz128 : GCCBuiltin<"__builtin_ia32_pcmpestriz128">,
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty,
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llvm_i8_ty],
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[IntrNoMem]>;
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Intrinsic<[llvm_i32_ty],
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[llvm_v16i8_ty, llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty,
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llvm_i8_ty],
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[IntrNoMem]>;
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}
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//===----------------------------------------------------------------------===//
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@ -1557,14 +1557,14 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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Intrinsic<[], [llvm_ptrx86mmx_ty, llvm_x86mmx_ty], []>;
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def int_x86_mmx_palignr_b : GCCBuiltin<"__builtin_ia32_palignr">,
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Intrinsic<[llvm_x86mmx_ty], [llvm_x86mmx_ty,
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Intrinsic<[llvm_x86mmx_ty], [llvm_x86mmx_ty,
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llvm_x86mmx_ty, llvm_i8_ty], [IntrNoMem]>;
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def int_x86_mmx_pextr_w : GCCBuiltin<"__builtin_ia32_vec_ext_v4hi">,
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Intrinsic<[llvm_i32_ty], [llvm_x86mmx_ty, llvm_i32_ty],
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Intrinsic<[llvm_i32_ty], [llvm_x86mmx_ty, llvm_i32_ty],
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[IntrNoMem]>;
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def int_x86_mmx_pinsr_w : GCCBuiltin<"__builtin_ia32_vec_set_v4hi">,
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Intrinsic<[llvm_x86mmx_ty], [llvm_x86mmx_ty,
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Intrinsic<[llvm_x86mmx_ty], [llvm_x86mmx_ty,
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llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
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}
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@ -1,10 +1,10 @@
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//===- X86.td - Target definition file for the Intel X86 ---*- tablegen -*-===//
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//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//
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//===----------------------------------------------------------------------===//
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//
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// This is a target description file for the Intel i386 architecture, refered to
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@ -32,7 +32,7 @@ def FeatureMMX : SubtargetFeature<"mmx","X86SSELevel", "MMX",
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def FeatureSSE1 : SubtargetFeature<"sse", "X86SSELevel", "SSE1",
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"Enable SSE instructions",
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// SSE codegen depends on cmovs, and all
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// SSE1+ processors support them.
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// SSE1+ processors support them.
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[FeatureMMX, FeatureCMOV]>;
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def FeatureSSE2 : SubtargetFeature<"sse2", "X86SSELevel", "SSE2",
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"Enable SSE2 instructions",
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