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Target/X86: Fix assertion failures and warnings caused by r151382 _ftol2 lowering for i386-*-win32 targets. Patch by Joe Groff.

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[Joe Groff] Hi everyone. My previous patch applied as r151382 had a few problems:
Clang raised a warning, and X86 LowerOperation would assert out for
fptoui f64 to i32 because it improperly lowered to an illegal
BUILD_PAIR. Here's a patch that addresses these issues. Let me know if
any other changes are necessary. Thanks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151432 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
NAKAMURA Takumi 2012-02-25 03:37:25 +00:00
parent dfba3ad882
commit 9a68fdc7f8
4 changed files with 34 additions and 12 deletions
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2
lib/Target/X86/X86FloatingPoint.cpp
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@ -1646,8 +1646,6 @@ void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) {
case X86::WIN_FTOL_32:
case X86::WIN_FTOL_64: {
MachineBasicBlock::iterator InsertPt = MI;
// Push the operand into ST0.
MachineOperand &Op = MI->getOperand(0);
assert(Op.isUse() && Op.isReg() &&

27
lib/Target/X86/X86ISelLowering.cpp
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@ -7712,7 +7712,7 @@ SDValue X86TargetLowering::LowerUINT_TO_FP(SDValue Op,
}
std::pair<SDValue,SDValue> X86TargetLowering::
FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG, bool IsSigned) const {
FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG, bool IsSigned, bool IsReplace) const {
DebugLoc DL = Op.getDebugLoc();
EVT DstTy = Op.getValueType();
@ -7796,7 +7796,10 @@ FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG, bool IsSigned) const {
MVT::i32, ftol.getValue(1));
SDValue edx = DAG.getCopyFromReg(eax.getValue(1), DL, X86::EDX,
MVT::i32, eax.getValue(2));
SDValue pair = DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, eax, edx);
SDValue Ops[] = { eax, edx };
SDValue pair = IsReplace
? DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, Ops, 2)
: DAG.getMergeValues(Ops, 2, DL);
return std::make_pair(pair, SDValue());
}
}
@ -7806,7 +7809,8 @@ SDValue X86TargetLowering::LowerFP_TO_SINT(SDValue Op,
if (Op.getValueType().isVector())
return SDValue();
std::pair<SDValue,SDValue> Vals = FP_TO_INTHelper(Op, DAG, true);
std::pair<SDValue,SDValue> Vals = FP_TO_INTHelper(Op, DAG,
/*IsSigned=*/ true, /*IsReplace=*/ false);
SDValue FIST = Vals.first, StackSlot = Vals.second;
// If FP_TO_INTHelper failed, the node is actually supposed to be Legal.
if (FIST.getNode() == 0) return Op;
@ -7823,14 +7827,19 @@ SDValue X86TargetLowering::LowerFP_TO_SINT(SDValue Op,
SDValue X86TargetLowering::LowerFP_TO_UINT(SDValue Op,
SelectionDAG &DAG) const {
std::pair<SDValue,SDValue> Vals = FP_TO_INTHelper(Op, DAG, false);
std::pair<SDValue,SDValue> Vals = FP_TO_INTHelper(Op, DAG,
/*IsSigned=*/ false, /*IsReplace=*/ false);
SDValue FIST = Vals.first, StackSlot = Vals.second;
assert(FIST.getNode() && "Unexpected failure");
// Load the result.
return DAG.getLoad(Op.getValueType(), Op.getDebugLoc(),
FIST, StackSlot, MachinePointerInfo(),
false, false, false, 0);
if (StackSlot.getNode())
// Load the result.
return DAG.getLoad(Op.getValueType(), Op.getDebugLoc(),
FIST, StackSlot, MachinePointerInfo(),
false, false, false, 0);
else
// The node is the result.
return FIST;
}
SDValue X86TargetLowering::LowerFABS(SDValue Op,
@ -10872,7 +10881,7 @@ void X86TargetLowering::ReplaceNodeResults(SDNode *N,
return;
std::pair<SDValue,SDValue> Vals =
FP_TO_INTHelper(SDValue(N, 0), DAG, IsSigned);
FP_TO_INTHelper(SDValue(N, 0), DAG, IsSigned, /*IsReplace=*/ true);
SDValue FIST = Vals.first, StackSlot = Vals.second;
if (FIST.getNode() != 0) {
EVT VT = N->getValueType(0);

3
lib/Target/X86/X86ISelLowering.h
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@ -708,7 +708,8 @@ namespace llvm {
SelectionDAG &DAG) const;
std::pair<SDValue,SDValue> FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG,
bool isSigned) const;
bool isSigned,
bool isReplace) const;
SDValue LowerAsSplatVectorLoad(SDValue SrcOp, EVT VT, DebugLoc dl,
SelectionDAG &DAG) const;

14
test/CodeGen/X86/win_ftol2.ll
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@ -128,3 +128,17 @@ define {double, i64} @double_ui64_4(double %x, double %y) nounwind {
%5 = insertvalue {double, i64} %4, i64 %3, 1
ret {double, i64} %5
}
define i32 @double_ui32_5(double %X) {
; FTOL: @double_ui32_5
; FTOL: calll __ftol2
%tmp.1 = fptoui double %X to i32
ret i32 %tmp.1
}
define i64 @double_ui64_5(double %X) {
; FTOL: @double_ui64_5
; FTOL: calll __ftol2
%tmp.1 = fptoui double %X to i64
ret i64 %tmp.1
}