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[PowerPC] fix potential verification errors

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This patch fixes trivial mishandling of 32-bit/64-bit instructions that may cause verification errors with -verify-machineinstrs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305984 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hiroshi Inoue 2017-06-22 04:33:44 +00:00
parent 367f21dc72
commit 9afae17999
2 changed files with 12 additions and 5 deletions
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2
lib/Target/PowerPC/PPCFrameLowering.cpp
View File

@ -521,7 +521,7 @@ void PPCFrameLowering::replaceFPWithRealFP(MachineFunction &MF) const {
const PPCRegisterInfo *RegInfo = Subtarget.getRegisterInfo();
bool HasBP = RegInfo->hasBasePointer(MF);
unsigned BPReg = HasBP ? (unsigned) RegInfo->getBaseRegister(MF) : FPReg;
unsigned BP8Reg = HasBP ? (unsigned) PPC::X30 : FPReg;
unsigned BP8Reg = HasBP ? (unsigned) PPC::X30 : FP8Reg;
for (MachineFunction::iterator BI = MF.begin(), BE = MF.end();
BI != BE; ++BI)

15
lib/Target/PowerPC/PPCRegisterInfo.cpp
View File

@ -389,9 +389,14 @@ void PPCRegisterInfo::lowerDynamicAlloc(MachineBasicBlock::iterator II) const {
unsigned Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC);
if (MaxAlign < TargetAlign && isInt<16>(FrameSize)) {
BuildMI(MBB, II, dl, TII.get(PPC::ADDI), Reg)
.addReg(PPC::R31)
.addImm(FrameSize);
if (LP64)
BuildMI(MBB, II, dl, TII.get(PPC::ADDI8), Reg)
.addReg(PPC::X31)
.addImm(FrameSize);
else
BuildMI(MBB, II, dl, TII.get(PPC::ADDI), Reg)
.addReg(PPC::R31)
.addImm(FrameSize);
} else if (LP64) {
BuildMI(MBB, II, dl, TII.get(PPC::LD), Reg)
.addImm(0)
@ -478,8 +483,10 @@ void PPCRegisterInfo::lowerDynamicAreaOffset(
const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
unsigned maxCallFrameSize = MFI.getMaxCallFrameSize();
bool is64Bit = TM.isPPC64();
DebugLoc dl = MI.getDebugLoc();
BuildMI(MBB, II, dl, TII.get(PPC::LI), MI.getOperand(0).getReg())
BuildMI(MBB, II, dl, TII.get(is64Bit ? PPC::LI8 : PPC::LI),
MI.getOperand(0).getReg())
.addImm(maxCallFrameSize);
MBB.erase(II);
}