[GlobalISel] Add a class, RegisterBank, to represent register banks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265445 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Quentin Colombet 2016-04-05 19:54:44 +00:00
parent 3a27360c9d
commit 9b710764b9
3 changed files with 108 additions and 0 deletions

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@ -0,0 +1,68 @@
//==-- llvm/CodeGen/GlobalISel/RegisterBank.h - Register Bank ----*- C++ -*-==//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
/// \file This file declares the API of register banks.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_REGBANK_H
#define LLVM_CODEGEN_GLOBALISEL_REGBANK_H
#include "llvm/ADT/BitVector.h"
namespace llvm {
// Forward declarations.
class RegisterBankInfo;
class TargetRegisterClass;
class TargetRegisterInfo;
/// This class implements the register bank concept.
/// Two instances of RegisterBank must have different ID.
/// This property is enforced by the RegisterBankInfo class.
class RegisterBank {
private:
unsigned ID;
const char *Name;
unsigned Size;
BitVector ContainedRegClass;
/// Only the RegisterBankInfo can create RegisterBank.
RegisterBank() = default;
friend RegisterBankInfo;
public:
/// Get the identifier of this register bank.
unsigned getID() const { return ID; }
/// Get a user friendly name of this register bank.
/// Should be used only for debugging purposes.
const char *getName() const { return Name; }
/// Get the maximal size in bits that fits in this register bank.
unsigned getSize() const { return Size; }
/// Check if this register bank is valid. In other words,
/// if it has been properly constructed.
void verify(const TargetRegisterInfo &TRI) const;
/// Check whether this register bank contains \p RC.
/// In other words, check if this register bank fully covers
/// the registers that \p RC contains.
bool contains(const TargetRegisterClass &RC) const;
/// Check whether \p OtherRB is the same as this.
bool operator==(const RegisterBank &OtherRB) const;
bool operator!=(const RegisterBank &OtherRB) const {
return !this->operator==(OtherRB);
}
};
} // End namespace llvm.
#endif

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@ -3,6 +3,7 @@ set(GLOBAL_ISEL_FILES
IRTranslator.cpp
MachineIRBuilder.cpp
RegBankSelect.cpp
RegisterBank.cpp
)
# Add GlobalISel files to the dependencies if the user wants to build it.

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//===- llvm/CodeGen/GlobalISel/RegisterBank.cpp - Register Bank --*- C++ -*-==//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
/// \file
/// This file implements the RegisterBank class.
//===----------------------------------------------------------------------===//
#include "llvm/CodeGen/GlobalISel/RegisterBank.h"
#include "llvm/Target/TargetRegisterInfo.h"
#define DEBUG_TYPE "registerbank"
using namespace llvm;
void RegisterBank::verify(const TargetRegisterInfo &TRI) const {
// Verify that the Size of the register bank is big enough to cover all the
// register classes it covers.
// Verify that the register bank covers all the sub and super classes of the
// classes it covers.
}
bool RegisterBank::contains(const TargetRegisterClass &RC) const {
return ContainedRegClass.test(RC.getID());
}
bool RegisterBank::operator==(const RegisterBank &OtherRB) const {
// There must be only one instance of a given register bank alive
// for the whole compilation.
// The RegisterBankInfo is supposed to enforce that.
assert((OtherRB.getID() != getID() || &OtherRB == this) &&
"ID does not uniquely identify a RegisterBank");
return &OtherRB == this;
}