AMDGPU: Fix crash on i16 constant expression

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288861 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault 2016-12-06 23:18:06 +00:00
parent 0bf16a5969
commit 9bdddbab7d
2 changed files with 31 additions and 2 deletions

View File

@ -146,9 +146,10 @@ public:
Value *AMDGPUCodeGenPrepare::copyFlags(
const BinaryOperator &I, Value *V) const {
assert(isa<BinaryOperator>(V) && "V must be binary operation");
BinaryOperator *BinOp = dyn_cast<BinaryOperator>(V);
if (!BinOp) // Possibly constant expression.
return V;
BinaryOperator *BinOp = cast<BinaryOperator>(V);
if (isa<OverflowingBinaryOperator>(BinOp)) {
BinOp->setHasNoSignedWrap(I.hasNoSignedWrap());
BinOp->setHasNoUnsignedWrap(I.hasNoUnsignedWrap());

View File

@ -533,6 +533,27 @@ define i16 @add_i16(i16 %a, i16 %b) {
ret i16 %r
}
; GCN-LABEL: @constant_add_i16(
; VI: ret i16 3
define i16 @constant_add_i16() {
%r = add i16 1, 2
ret i16 %r
}
; GCN-LABEL: @constant_add_nsw_i16(
; VI: ret i16 3
define i16 @constant_add_nsw_i16() {
%r = add nsw i16 1, 2
ret i16 %r
}
; GCN-LABEL: @constant_add_nuw_i16(
; VI: ret i16 3
define i16 @constant_add_nuw_i16() {
%r = add nsw i16 1, 2
ret i16 %r
}
; GCN-LABEL: @add_nsw_i16(
; SI: %r = add nsw i16 %a, %b
; SI-NEXT: ret i16 %r
@ -806,6 +827,13 @@ define i16 @ashr_exact_i16(i16 %a, i16 %b) {
ret i16 %r
}
; GCN-LABEL: @constant_lshr_exact_i16(
; VI: ret i16 2
define i16 @constant_lshr_exact_i16(i16 %a, i16 %b) {
%r = lshr exact i16 4, 1
ret i16 %r
}
; GCN-LABEL: @and_i16(
; SI: %r = and i16 %a, %b
; SI-NEXT: ret i16 %r