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AMDGPU: Fix crash on i16 constant expression
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288861 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -146,9 +146,10 @@ public:
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Value *AMDGPUCodeGenPrepare::copyFlags(
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const BinaryOperator &I, Value *V) const {
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assert(isa<BinaryOperator>(V) && "V must be binary operation");
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BinaryOperator *BinOp = dyn_cast<BinaryOperator>(V);
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if (!BinOp) // Possibly constant expression.
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return V;
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BinaryOperator *BinOp = cast<BinaryOperator>(V);
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if (isa<OverflowingBinaryOperator>(BinOp)) {
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BinOp->setHasNoSignedWrap(I.hasNoSignedWrap());
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BinOp->setHasNoUnsignedWrap(I.hasNoUnsignedWrap());
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@ -533,6 +533,27 @@ define i16 @add_i16(i16 %a, i16 %b) {
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ret i16 %r
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}
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; GCN-LABEL: @constant_add_i16(
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; VI: ret i16 3
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define i16 @constant_add_i16() {
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%r = add i16 1, 2
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ret i16 %r
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}
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; GCN-LABEL: @constant_add_nsw_i16(
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; VI: ret i16 3
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define i16 @constant_add_nsw_i16() {
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%r = add nsw i16 1, 2
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ret i16 %r
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}
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; GCN-LABEL: @constant_add_nuw_i16(
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; VI: ret i16 3
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define i16 @constant_add_nuw_i16() {
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%r = add nsw i16 1, 2
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ret i16 %r
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}
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; GCN-LABEL: @add_nsw_i16(
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; SI: %r = add nsw i16 %a, %b
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; SI-NEXT: ret i16 %r
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@ -806,6 +827,13 @@ define i16 @ashr_exact_i16(i16 %a, i16 %b) {
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ret i16 %r
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}
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; GCN-LABEL: @constant_lshr_exact_i16(
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; VI: ret i16 2
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define i16 @constant_lshr_exact_i16(i16 %a, i16 %b) {
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%r = lshr exact i16 4, 1
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ret i16 %r
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}
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; GCN-LABEL: @and_i16(
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; SI: %r = and i16 %a, %b
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; SI-NEXT: ret i16 %r
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