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[DebugInfo][X86] Improve X86 Optimize LEAs handling of debug values.
This is a follow up to the fix in r298360 to improve the handling of debug values when redundant LEAs are removed. The fix in r298360 effectively discarded the debug values. This patch now attempts to preserve the debug values by using the DWARF DW_OP_stack_value operation via prependDIExpr. Moved functions appendOffset and prependDIExpr from Local.cpp to DebugInfoMetadata.cpp and made them available as static member functions of DIExpression. Differential Revision: https://reviews.llvm.org/D31604 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301630 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Ng
parent
0542dc78c1
commit
9d0dc96310
@ -56,6 +56,8 @@
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namespace llvm {
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class DIBuilder;
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template <typename T> class Optional;
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/// Holds a subclass of DINode.
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@ -2275,6 +2277,15 @@ public:
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/// Return whether this is a piece of an aggregate variable.
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bool isFragment() const { return getFragmentInfo().hasValue(); }
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/// Append \p Ops with operations to apply the \p Offset.
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static void appendOffset(SmallVectorImpl<uint64_t> &Ops, int64_t Offset);
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/// Prepend \p DIExpr with a deref and offset operation and optionally turn it
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/// into a stack value.
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static DIExpression *prependDIExpr(DIBuilder &Builder, DIExpression *DIExpr,
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bool Deref, int64_t Offset = 0,
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bool StackValue = false);
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};
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/// Global variables.
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@ -15,6 +15,7 @@
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#include "LLVMContextImpl.h"
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#include "MetadataImpl.h"
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#include "llvm/ADT/StringSwitch.h"
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#include "llvm/IR/DIBuilder.h"
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#include "llvm/IR/Function.h"
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using namespace llvm;
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@ -660,6 +661,48 @@ DIExpression::getFragmentInfo(expr_op_iterator Start, expr_op_iterator End) {
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return None;
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}
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void DIExpression::appendOffset(SmallVectorImpl<uint64_t> &Ops,
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int64_t Offset) {
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if (Offset > 0) {
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Ops.push_back(dwarf::DW_OP_plus);
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Ops.push_back(Offset);
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} else if (Offset < 0) {
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Ops.push_back(dwarf::DW_OP_minus);
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Ops.push_back(-Offset);
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}
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}
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DIExpression *
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DIExpression::prependDIExpr(DIBuilder &Builder, DIExpression *DIExpr,
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bool Deref, int64_t Offset,
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bool StackValue) {
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if (!Deref && !Offset && !StackValue)
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return DIExpr;
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SmallVector<uint64_t, 8> Ops;
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appendOffset(Ops, Offset);
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if (Deref)
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Ops.push_back(dwarf::DW_OP_deref);
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if (DIExpr)
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for (auto Op : DIExpr->expr_ops()) {
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// A DW_OP_stack_value comes at the end, but before a DW_OP_LLVM_fragment.
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if (StackValue) {
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if (Op.getOp() == dwarf::DW_OP_stack_value)
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StackValue = false;
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else if (Op.getOp() == dwarf::DW_OP_LLVM_fragment) {
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Ops.push_back(dwarf::DW_OP_stack_value);
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StackValue = false;
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}
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}
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Ops.push_back(Op.getOp());
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for (unsigned I = 0; I < Op.getNumArgs(); ++I)
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Ops.push_back(Op.getArg(I));
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}
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if (StackValue)
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Ops.push_back(dwarf::DW_OP_stack_value);
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return Builder.createExpression(Ops);
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}
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bool DIExpression::isConstant() const {
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// Recognize DW_OP_constu C DW_OP_stack_value (DW_OP_LLVM_fragment Len Ofs)?.
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if (getNumElements() != 3 && getNumElements() != 6)
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@ -27,6 +27,8 @@
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#include "llvm/CodeGen/MachineOperand.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/IR/DebugInfoMetadata.h"
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#include "llvm/IR/DIBuilder.h"
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#include "llvm/IR/Function.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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@ -221,6 +223,8 @@ public:
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StringRef getPassName() const override { return "X86 LEA Optimize"; }
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bool doInitialization(Module &M) override;
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/// \brief Loop over all of the basic blocks, replacing address
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/// calculations in load and store instructions, if it's already
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/// been calculated by LEA. Also, remove redundant LEAs.
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@ -262,6 +266,12 @@ private:
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/// \brief Removes redundant address calculations.
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bool removeRedundantAddrCalc(MemOpMap &LEAs);
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/// Replace debug value MI with a new debug value instruction using register
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/// VReg with an appropriate offset and DIExpression to incorporate the
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/// address displacement AddrDispShift. Return new debug value instruction.
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MachineInstr *replaceDebugValue(MachineInstr &MI, unsigned VReg,
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int64_t AddrDispShift);
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/// \brief Removes LEAs which calculate similar addresses.
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bool removeRedundantLEAs(MemOpMap &LEAs);
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@ -270,6 +280,7 @@ private:
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MachineRegisterInfo *MRI;
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const X86InstrInfo *TII;
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const X86RegisterInfo *TRI;
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Module *TheModule;
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static char ID;
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};
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@ -532,6 +543,26 @@ bool OptimizeLEAPass::removeRedundantAddrCalc(MemOpMap &LEAs) {
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return Changed;
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}
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MachineInstr *OptimizeLEAPass::replaceDebugValue(MachineInstr &MI,
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unsigned VReg,
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int64_t AddrDispShift) {
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DIExpression *Expr = const_cast<DIExpression *>(MI.getDebugExpression());
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if (AddrDispShift != 0) {
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DIBuilder DIB(*TheModule);
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Expr = DIExpression::prependDIExpr(DIB, Expr, false, AddrDispShift, true);
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}
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// Replace DBG_VALUE instruction with modified version.
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MachineBasicBlock *MBB = MI.getParent();
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DebugLoc DL = MI.getDebugLoc();
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bool IsIndirect = MI.isIndirectDebugValue();
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int64_t Offset = IsIndirect ? MI.getOperand(1).getImm() : 0;
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const MDNode *Var = MI.getDebugVariable();
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return BuildMI(*MBB, MBB->erase(&MI), DL, TII->get(TargetOpcode::DBG_VALUE),
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IsIndirect, VReg, Offset, Var, Expr);
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}
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// Try to find similar LEAs in the list and replace one with another.
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bool OptimizeLEAPass::removeRedundantLEAs(MemOpMap &LEAs) {
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bool Changed = false;
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@ -563,13 +594,21 @@ bool OptimizeLEAPass::removeRedundantLEAs(MemOpMap &LEAs) {
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// Loop over all uses of the Last LEA and update their operands. Note
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// that the correctness of this has already been checked in the
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// isReplaceable function.
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unsigned FirstVReg = First.getOperand(0).getReg();
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unsigned LastVReg = Last.getOperand(0).getReg();
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for (auto UI = MRI->use_nodbg_begin(LastVReg),
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UE = MRI->use_nodbg_end();
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for (auto UI = MRI->use_begin(LastVReg), UE = MRI->use_end();
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UI != UE;) {
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MachineOperand &MO = *UI++;
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MachineInstr &MI = *MO.getParent();
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if (MI.isDebugValue()) {
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// Replace DBG_VALUE instruction with modified version using the
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// register from the replacing LEA and the address displacement
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// between the LEA instructions.
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replaceDebugValue(MI, FirstVReg, AddrDispShift);
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continue;
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}
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// Get the number of the first memory operand.
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const MCInstrDesc &Desc = MI.getDesc();
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int MemOpNo =
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@ -577,7 +616,7 @@ bool OptimizeLEAPass::removeRedundantLEAs(MemOpMap &LEAs) {
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X86II::getOperandBias(Desc);
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// Update address base.
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MO.setReg(First.getOperand(0).getReg());
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MO.setReg(FirstVReg);
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// Update address disp.
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MachineOperand &Op = MI.getOperand(MemOpNo + X86::AddrDisp);
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@ -587,11 +626,8 @@ bool OptimizeLEAPass::removeRedundantLEAs(MemOpMap &LEAs) {
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Op.setOffset(Op.getOffset() + AddrDispShift);
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}
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// Mark debug values referring to Last LEA as undefined.
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MRI->markUsesInDebugValueAsUndef(LastVReg);
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// Since we can possibly extend register lifetime, clear kill flags.
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MRI->clearKillFlags(First.getOperand(0).getReg());
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MRI->clearKillFlags(FirstVReg);
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++NumRedundantLEAs;
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DEBUG(dbgs() << "OptimizeLEAs: Remove redundant LEA: "; Last.dump(););
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@ -614,6 +650,11 @@ bool OptimizeLEAPass::removeRedundantLEAs(MemOpMap &LEAs) {
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return Changed;
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}
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bool OptimizeLEAPass::doInitialization(Module &M) {
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TheModule = &M;
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return false;
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}
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bool OptimizeLEAPass::runOnMachineFunction(MachineFunction &MF) {
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bool Changed = false;
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@ -1259,50 +1259,8 @@ void llvm::findDbgValues(SmallVectorImpl<DbgValueInst *> &DbgValues, Value *V) {
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DbgValues.push_back(DVI);
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}
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static void appendOffset(SmallVectorImpl<uint64_t> &Ops, int64_t Offset) {
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if (Offset > 0) {
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Ops.push_back(dwarf::DW_OP_plus);
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Ops.push_back(Offset);
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} else if (Offset < 0) {
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Ops.push_back(dwarf::DW_OP_minus);
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Ops.push_back(-Offset);
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}
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}
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enum { WithStackValue = true };
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/// Prepend \p DIExpr with a deref and offset operation and optionally turn it
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/// into a stack value.
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static DIExpression *prependDIExpr(DIBuilder &Builder, DIExpression *DIExpr,
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bool Deref, int64_t Offset = 0,
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bool StackValue = false) {
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if (!Deref && !Offset && !StackValue)
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return DIExpr;
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SmallVector<uint64_t, 8> Ops;
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appendOffset(Ops, Offset);
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if (Deref)
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Ops.push_back(dwarf::DW_OP_deref);
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if (DIExpr)
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for (auto Op : DIExpr->expr_ops()) {
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// A DW_OP_stack_value comes at the end, but before a DW_OP_LLVM_fragment.
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if (StackValue) {
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if (Op.getOp() == dwarf::DW_OP_stack_value)
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StackValue = false;
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else if (Op.getOp() == dwarf::DW_OP_LLVM_fragment) {
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Ops.push_back(dwarf::DW_OP_stack_value);
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StackValue = false;
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}
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}
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Ops.push_back(Op.getOp());
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for (unsigned I = 0; I < Op.getNumArgs(); ++I)
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Ops.push_back(Op.getArg(I));
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}
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if (StackValue)
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Ops.push_back(dwarf::DW_OP_stack_value);
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return Builder.createExpression(Ops);
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}
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bool llvm::replaceDbgDeclare(Value *Address, Value *NewAddress,
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Instruction *InsertBefore, DIBuilder &Builder,
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bool Deref, int Offset) {
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@ -1314,7 +1272,7 @@ bool llvm::replaceDbgDeclare(Value *Address, Value *NewAddress,
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auto *DIExpr = DDI->getExpression();
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assert(DIVar && "Missing variable");
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DIExpr = prependDIExpr(Builder, DIExpr, Deref, Offset);
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DIExpr = DIExpression::prependDIExpr(Builder, DIExpr, Deref, Offset);
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// Insert llvm.dbg.declare immediately after the original alloca, and remove
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// old llvm.dbg.declare.
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@ -1348,7 +1306,7 @@ static void replaceOneDbgValueForAlloca(DbgValueInst *DVI, Value *NewAddress,
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if (Offset) {
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SmallVector<uint64_t, 4> Ops;
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Ops.push_back(dwarf::DW_OP_deref);
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appendOffset(Ops, Offset);
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DIExpression::appendOffset(Ops, Offset);
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Ops.append(DIExpr->elements_begin() + 1, DIExpr->elements_end());
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DIExpr = Builder.createExpression(Ops);
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}
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@ -1398,8 +1356,9 @@ void llvm::salvageDebugInfo(Instruction &I) {
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auto *DIExpr = DVI->getExpression();
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DIBuilder DIB(M, /*AllowUnresolved*/ false);
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// GEP offsets are i32 and thus always fit into an int64_t.
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DIExpr = prependDIExpr(DIB, DIExpr, NoDeref, Offset.getSExtValue(),
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WithStackValue);
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DIExpr = DIExpression::prependDIExpr(DIB, DIExpr, NoDeref,
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Offset.getSExtValue(),
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WithStackValue);
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DVI->setOperand(0, MDWrap(I.getOperand(0)));
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DVI->setOperand(3, MetadataAsValue::get(I.getContext(), DIExpr));
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DEBUG(dbgs() << "SALVAGE: " << *DVI << '\n');
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@ -1411,7 +1370,7 @@ void llvm::salvageDebugInfo(Instruction &I) {
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// Rewrite the load into DW_OP_deref.
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auto *DIExpr = DVI->getExpression();
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DIBuilder DIB(M, /*AllowUnresolved*/ false);
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DIExpr = prependDIExpr(DIB, DIExpr, WithDeref);
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DIExpr = DIExpression::prependDIExpr(DIB, DIExpr, WithDeref);
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DVI->setOperand(0, MDWrap(I.getOperand(0)));
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DVI->setOperand(3, MetadataAsValue::get(I.getContext(), DIExpr));
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DEBUG(dbgs() << "SALVAGE: " << *DVI << '\n');
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@ -1,7 +1,8 @@
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# RUN: llc -mtriple=x86_64-unknown-unknown -start-after peephole-opt -stop-before detect-dead-lanes -o - %s | FileCheck %s
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# RUN: llc -mtriple=x86_64-unknown-unknown -start-after=peephole-opt -stop-before=detect-dead-lanes -o - %s | FileCheck %s
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# Test that pass optimize LEA can remove a redundant LEA even when it is also
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# used by a DBG_VALUE.
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# Test that the optimize LEA pass can remove a redundant LEA even when it is
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# also used by a DBG_VALUE. Check that the uses of the replaced LEA are updated
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# correctly.
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--- |
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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@ -13,22 +14,22 @@
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@d = common local_unnamed_addr global i32 0, align 4
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@b = common local_unnamed_addr global i32 0, align 4
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define i32 @fn1() local_unnamed_addr !dbg !8 {
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%1 = load %struct.A*, %struct.A** @c, align 8, !dbg !13
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%2 = load i32, i32* @a, align 4, !dbg !13
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%3 = sext i32 %2 to i64, !dbg !13
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%4 = getelementptr inbounds %struct.A, %struct.A* %1, i64 %3, !dbg !13
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%5 = ptrtoint %struct.A* %4 to i64, !dbg !13
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%6 = trunc i64 %5 to i32, !dbg !13
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store i32 %6, i32* @d, align 4, !dbg !13
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%7 = getelementptr inbounds %struct.A, %struct.A* %1, i64 %3, i32 2, !dbg !14
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tail call void @llvm.dbg.value(metadata i32* %7, i64 0, metadata !11, metadata !15), !dbg !16
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br label %8, !dbg !17
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define i32 @fn1() local_unnamed_addr !dbg !9 {
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%1 = load %struct.A*, %struct.A** @c, align 8, !dbg !14
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%2 = load i32, i32* @a, align 4, !dbg !14
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%3 = sext i32 %2 to i64, !dbg !14
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%4 = getelementptr inbounds %struct.A, %struct.A* %1, i64 %3, !dbg !14
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%5 = ptrtoint %struct.A* %4 to i64, !dbg !14
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%6 = trunc i64 %5 to i32, !dbg !14
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store i32 %6, i32* @d, align 4, !dbg !14
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%7 = getelementptr inbounds %struct.A, %struct.A* %1, i64 %3, i32 2, !dbg !15
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tail call void @llvm.dbg.value(metadata i32* %7, i64 0, metadata !12, metadata !16), !dbg !17
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br label %8, !dbg !18
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; <label>:8: ; preds = %8, %0
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%9 = load i32, i32* %7, align 4, !dbg !18
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store i32 %9, i32* @d, align 4, !dbg !18
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br label %8, !dbg !19
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%9 = load i32, i32* %7, align 4, !dbg !19
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store i32 %9, i32* @d, align 4, !dbg !19
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br label %8, !dbg !20
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}
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; Function Attrs: nounwind readnone
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@ -38,6 +39,7 @@
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!5, !6, !7}
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!misc = !{!8}
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!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !3, globals: !2)
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!1 = !DIFile(filename: "test.c", directory: "")
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@ -47,18 +49,19 @@
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!5 = !{i32 2, !"Dwarf Version", i32 4}
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!6 = !{i32 2, !"Debug Info Version", i32 3}
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!7 = !{i32 1, !"PIC Level", i32 2}
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!8 = distinct !DISubprogram(name: "fn1", scope: !1, file: !1, line: 7, type: !9, isLocal: false, isDefinition: true, scopeLine: 7, isOptimized: true, unit: !0, variables: !10)
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!9 = !DISubroutineType(types: !3)
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!10 = !{!11}
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!11 = !DILocalVariable(name: "e", scope: !8, file: !1, line: 8, type: !12)
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!12 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !4, size: 64)
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!13 = !DILocation(line: 9, scope: !8)
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!14 = !DILocation(line: 10, scope: !8)
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!15 = !DIExpression()
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!16 = !DILocation(line: 8, scope: !8)
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!17 = !DILocation(line: 11, scope: !8)
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!18 = !DILocation(line: 13, scope: !8)
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!19 = !DILocation(line: 14, scope: !8)
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!8 = !DIExpression(DW_OP_plus, 8, DW_OP_stack_value)
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!9 = distinct !DISubprogram(name: "fn1", scope: !1, file: !1, line: 7, type: !10, isLocal: false, isDefinition: true, scopeLine: 7, isOptimized: true, unit: !0, variables: !11)
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!10 = !DISubroutineType(types: !3)
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!11 = !{!12}
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!12 = !DILocalVariable(name: "e", scope: !9, file: !1, line: 8, type: !13)
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!13 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !4, size: 64)
|
||||
!14 = !DILocation(line: 9, scope: !9)
|
||||
!15 = !DILocation(line: 10, scope: !9)
|
||||
!16 = !DIExpression()
|
||||
!17 = !DILocation(line: 8, scope: !9)
|
||||
!18 = !DILocation(line: 11, scope: !9)
|
||||
!19 = !DILocation(line: 13, scope: !9)
|
||||
!20 = !DILocation(line: 14, scope: !9)
|
||||
|
||||
...
|
||||
---
|
||||
@ -95,28 +98,28 @@ body: |
|
||||
bb.0 (%ir-block.0):
|
||||
successors: %bb.1(0x80000000)
|
||||
|
||||
; CHECK: %3 = LEA64r %2, 2, %2, 0, _, debug-location !13
|
||||
; CHECK-NEXT: %4 = LEA64r %1, 4, %3, 0, _, debug-location !13
|
||||
; CHECK-NOT: %0 = LEA64r %1, 4, %3, 8, _, debug-location !14
|
||||
; CHECK: DBG_VALUE debug-use _, debug-use _, !11, !15, debug-location !16
|
||||
; CHECK: %3 = LEA64r %2, 2, %2, 0, _, debug-location !14
|
||||
; CHECK-NEXT: %4 = LEA64r %1, 4, %3, 0, _, debug-location !14
|
||||
; CHECK-NOT: %0 = LEA64r %1, 4, %3, 8, _, debug-location !15
|
||||
; CHECK: DBG_VALUE debug-use %4, debug-use _, !12, !8, debug-location !17
|
||||
|
||||
%1 = MOV64rm %rip, 1, _, @c, _, debug-location !13 :: (dereferenceable load 8 from @c)
|
||||
%2 = MOVSX64rm32 %rip, 1, _, @a, _, debug-location !13 :: (dereferenceable load 4 from @a)
|
||||
%3 = LEA64r %2, 2, %2, 0, _, debug-location !13
|
||||
%4 = LEA64r %1, 4, %3, 0, _, debug-location !13
|
||||
%5 = COPY %4.sub_32bit, debug-location !13
|
||||
MOV32mr %rip, 1, _, @d, _, killed %5, debug-location !13 :: (store 4 into @d)
|
||||
%0 = LEA64r %1, 4, %3, 8, _, debug-location !14
|
||||
DBG_VALUE debug-use %0, debug-use _, !11, !15, debug-location !16
|
||||
%1 = MOV64rm %rip, 1, _, @c, _, debug-location !14 :: (dereferenceable load 8 from @c)
|
||||
%2 = MOVSX64rm32 %rip, 1, _, @a, _, debug-location !14 :: (dereferenceable load 4 from @a)
|
||||
%3 = LEA64r %2, 2, %2, 0, _, debug-location !14
|
||||
%4 = LEA64r %1, 4, %3, 0, _, debug-location !14
|
||||
%5 = COPY %4.sub_32bit, debug-location !14
|
||||
MOV32mr %rip, 1, _, @d, _, killed %5, debug-location !14 :: (store 4 into @d)
|
||||
%0 = LEA64r %1, 4, %3, 8, _, debug-location !15
|
||||
DBG_VALUE debug-use %0, debug-use _, !12, !16, debug-location !17
|
||||
|
||||
; CHECK-LABEL: bb.1 (%ir-block.8):
|
||||
; CHECK: %6 = MOV32rm %4, 1, _, 8, _, debug-location !18 :: (load 4 from %ir.7)
|
||||
; CHECK: %6 = MOV32rm %4, 1, _, 8, _, debug-location !19 :: (load 4 from %ir.7)
|
||||
|
||||
bb.1 (%ir-block.8):
|
||||
successors: %bb.1(0x80000000)
|
||||
|
||||
%6 = MOV32rm %0, 1, _, 0, _, debug-location !18 :: (load 4 from %ir.7)
|
||||
MOV32mr %rip, 1, _, @d, _, killed %6, debug-location !18 :: (store 4 into @d)
|
||||
JMP_1 %bb.1, debug-location !19
|
||||
%6 = MOV32rm %0, 1, _, 0, _, debug-location !19 :: (load 4 from %ir.7)
|
||||
MOV32mr %rip, 1, _, @d, _, killed %6, debug-location !19 :: (store 4 into @d)
|
||||
JMP_1 %bb.1, debug-location !20
|
||||
|
||||
...
|
||||
|
||||
Loading…
Reference in New Issue
Block a user