From 9ec8fe77442e3830a99cfa79ca472c994db01430 Mon Sep 17 00:00:00 2001 From: Vedant Kumar Date: Wed, 16 Mar 2016 05:43:03 +0000 Subject: [PATCH] [Bitcode] Add compatibility test for the 3.8 release Fork off compatibility.ll for the 3.8 release. The *.bc file in this commit was produced using a Release build of the release_38 branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263620 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/Bitcode/compatibility-3.8.ll | 1590 ++++++++++++++++++++++++++ test/Bitcode/compatibility-3.8.ll.bc | Bin 0 -> 15072 bytes 2 files changed, 1590 insertions(+) create mode 100644 test/Bitcode/compatibility-3.8.ll create mode 100644 test/Bitcode/compatibility-3.8.ll.bc diff --git a/test/Bitcode/compatibility-3.8.ll b/test/Bitcode/compatibility-3.8.ll new file mode 100644 index 00000000000..79c1ecfac9f --- /dev/null +++ b/test/Bitcode/compatibility-3.8.ll @@ -0,0 +1,1590 @@ +; Bitcode compatibility test for llvm 3.8.0 +; +; N.b: This is 3.8-compatible IR. The CHECK lines occasionally differ from +; the IR used to generate the bitcode, and may need to be updated. + +; RUN: llvm-dis < %s.bc | FileCheck %s + +target datalayout = "E" +; CHECK: target datalayout = "E" + +target triple = "x86_64-apple-macosx10.10.0" +; CHECK: target triple = "x86_64-apple-macosx10.10.0" + +;; Module-level assembly +module asm "beep boop" +; CHECK: module asm "beep boop" + +;; Comdats +$comdat.any = comdat any +; CHECK: $comdat.any = comdat any +$comdat.exactmatch = comdat exactmatch +; CHECK: $comdat.exactmatch = comdat exactmatch +$comdat.largest = comdat largest +; CHECK: $comdat.largest = comdat largest +$comdat.noduplicates = comdat noduplicates +; CHECK: $comdat.noduplicates = comdat noduplicates +$comdat.samesize = comdat samesize +; CHECK: $comdat.samesize = comdat samesize + +;; Constants +@const.true = constant i1 true +; CHECK: @const.true = constant i1 true +@const.false = constant i1 false +; CHECK: @const.false = constant i1 false +@const.int = constant i32 zeroinitializer +; CHECK: @const.int = constant i32 0 +@const.float = constant double 0.0 +; CHECK: @const.float = constant double 0.0 +@const.null = constant i8* null +; CHECK: @const.null = constant i8* null +%const.struct.type = type { i32, i8 } +%const.struct.type.packed = type <{ i32, i8 }> +@const.struct = constant %const.struct.type { i32 -1, i8 undef } +; CHECK: @const.struct = constant %const.struct.type { i32 -1, i8 undef } +@const.struct.packed = constant %const.struct.type.packed <{ i32 -1, i8 1 }> +; CHECK: @const.struct.packed = constant %const.struct.type.packed <{ i32 -1, i8 1 }> + +; CHECK: @constant.array.i8 = constant [3 x i8] c"\00\01\00" +@constant.array.i8 = constant [3 x i8] [i8 -0, i8 1, i8 0] +; CHECK: @constant.array.i16 = constant [3 x i16] [i16 0, i16 1, i16 0] +@constant.array.i16 = constant [3 x i16] [i16 -0, i16 1, i16 0] +; CHECK: @constant.array.i32 = constant [3 x i32] [i32 0, i32 1, i32 0] +@constant.array.i32 = constant [3 x i32] [i32 -0, i32 1, i32 0] +; CHECK: @constant.array.i64 = constant [3 x i64] [i64 0, i64 1, i64 0] +@constant.array.i64 = constant [3 x i64] [i64 -0, i64 1, i64 0] +; CHECK: @constant.array.f16 = constant [3 x half] [half 0xH8000, half 0xH3C00, half 0xH0000] +@constant.array.f16 = constant [3 x half] [half -0.0, half 1.0, half 0.0] +; CHECK: @constant.array.f32 = constant [3 x float] [float -0.000000e+00, float 1.000000e+00, float 0.000000e+00] +@constant.array.f32 = constant [3 x float] [float -0.0, float 1.0, float 0.0] +; CHECK: @constant.array.f64 = constant [3 x double] [double -0.000000e+00, double 1.000000e+00, double 0.000000e+00] +@constant.array.f64 = constant [3 x double] [double -0.0, double 1.0, double 0.0] + +; CHECK: @constant.vector.i8 = constant <3 x i8> +@constant.vector.i8 = constant <3 x i8> +; CHECK: @constant.vector.i16 = constant <3 x i16> +@constant.vector.i16 = constant <3 x i16> +; CHECK: @constant.vector.i32 = constant <3 x i32> +@constant.vector.i32 = constant <3 x i32> +; CHECK: @constant.vector.i64 = constant <3 x i64> +@constant.vector.i64 = constant <3 x i64> +; CHECK: @constant.vector.f16 = constant <3 x half> +@constant.vector.f16 = constant <3 x half> +; CHECK: @constant.vector.f32 = constant <3 x float> +@constant.vector.f32 = constant <3 x float> +; CHECK: @constant.vector.f64 = constant <3 x double> +@constant.vector.f64 = constant <3 x double> + +;; Global Variables +; Format: [@ =] [Linkage] [Visibility] [DLLStorageClass] +; [ThreadLocal] [unnamed_addr] [AddrSpace] [ExternallyInitialized] +; [] +; [, section "name"] [, comdat [($name)]] [, align ] + +; Global Variables -- Simple +@g1 = global i32 0 +; CHECK: @g1 = global i32 0 +@g2 = constant i32 0 +; CHECK: @g2 = constant i32 0 + +; Global Variables -- Linkage +@g.private = private global i32 0 +; CHECK: @g.private = private global i32 0 +@g.internal = internal global i32 0 +; CHECK: @g.internal = internal global i32 0 +@g.available_externally = available_externally global i32 0 +; CHECK: @g.available_externally = available_externally global i32 0 +@g.linkonce = linkonce global i32 0 +; CHECK: @g.linkonce = linkonce global i32 0 +@g.weak = weak global i32 0 +; CHECK: @g.weak = weak global i32 0 +@g.common = common global i32 0 +; CHECK: @g.common = common global i32 0 +@g.appending = appending global [4 x i8] c"test" +; CHECK: @g.appending = appending global [4 x i8] c"test" +@g.extern_weak = extern_weak global i32 +; CHECK: @g.extern_weak = extern_weak global i32 +@g.linkonce_odr = linkonce_odr global i32 0 +; CHECK: @g.linkonce_odr = linkonce_odr global i32 0 +@g.weak_odr = weak_odr global i32 0 +; CHECK: @g.weak_odr = weak_odr global i32 0 +@g.external = external global i32 +; CHECK: @g.external = external global i32 + +; Global Variables -- Visibility +@g.default = default global i32 0 +; CHECK: @g.default = global i32 0 +@g.hidden = hidden global i32 0 +; CHECK: @g.hidden = hidden global i32 0 +@g.protected = protected global i32 0 +; CHECK: @g.protected = protected global i32 0 + +; Global Variables -- DLLStorageClass +@g.dlldefault = default global i32 0 +; CHECK: @g.dlldefault = global i32 0 +@g.dllimport = external dllimport global i32 +; CHECK: @g.dllimport = external dllimport global i32 +@g.dllexport = dllexport global i32 0 +; CHECK: @g.dllexport = dllexport global i32 0 + +; Global Variables -- ThreadLocal +@g.notthreadlocal = global i32 0 +; CHECK: @g.notthreadlocal = global i32 0 +@g.generaldynamic = thread_local global i32 0 +; CHECK: @g.generaldynamic = thread_local global i32 0 +@g.localdynamic = thread_local(localdynamic) global i32 0 +; CHECK: @g.localdynamic = thread_local(localdynamic) global i32 0 +@g.initialexec = thread_local(initialexec) global i32 0 +; CHECK: @g.initialexec = thread_local(initialexec) global i32 0 +@g.localexec = thread_local(localexec) global i32 0 +; CHECK: @g.localexec = thread_local(localexec) global i32 0 + +; Global Variables -- unnamed_addr +@g.unnamed_addr = unnamed_addr global i32 0 +; CHECK: @g.unnamed_addr = unnamed_addr global i32 0 + +; Global Variables -- AddrSpace +@g.addrspace = addrspace(1) global i32 0 +; CHECK: @g.addrspace = addrspace(1) global i32 0 + +; Global Variables -- ExternallyInitialized +@g.externally_initialized = external externally_initialized global i32 +; CHECK: @g.externally_initialized = external externally_initialized global i32 + +; Global Variables -- section +@g.section = global i32 0, section "_DATA" +; CHECK: @g.section = global i32 0, section "_DATA" + +; Global Variables -- comdat +@comdat.any = global i32 0, comdat +; CHECK: @comdat.any = global i32 0, comdat +@comdat.exactmatch = global i32 0, comdat +; CHECK: @comdat.exactmatch = global i32 0, comdat +@comdat.largest = global i32 0, comdat +; CHECK: @comdat.largest = global i32 0, comdat +@comdat.noduplicates = global i32 0, comdat +; CHECK: @comdat.noduplicates = global i32 0, comdat +@comdat.samesize = global i32 0, comdat +; CHECK: @comdat.samesize = global i32 0, comdat + +; Force two globals from different comdats into sections with the same name. +$comdat1 = comdat any +$comdat2 = comdat any +@g.comdat1 = global i32 0, section "SharedSection", comdat($comdat1) +; CHECK: @g.comdat1 = global i32 0, section "SharedSection", comdat($comdat1) +@g.comdat2 = global i32 0, section "SharedSection", comdat($comdat2) +; CHECK: @g.comdat2 = global i32 0, section "SharedSection", comdat($comdat2) + +; Global Variables -- align +@g.align = global i32 0, align 4 +; CHECK: @g.align = global i32 0, align 4 + +; Global Variables -- Intrinsics +%pri.func.data = type { i32, void ()*, i8* } +@g.used1 = global i32 0 +@g.used2 = global i32 0 +@g.used3 = global i8 0 +declare void @g.f1() +@llvm.used = appending global [1 x i32*] [i32* @g.used1], section "llvm.metadata" +; CHECK: @llvm.used = appending global [1 x i32*] [i32* @g.used1], section "llvm.metadata" +@llvm.compiler.used = appending global [1 x i32*] [i32* @g.used2], section "llvm.metadata" +; CHECK: @llvm.compiler.used = appending global [1 x i32*] [i32* @g.used2], section "llvm.metadata" +@llvm.global_ctors = appending global [1 x %pri.func.data] [%pri.func.data { i32 0, void ()* @g.f1, i8* @g.used3 }], section "llvm.metadata" +; CHECK: @llvm.global_ctors = appending global [1 x %pri.func.data] [%pri.func.data { i32 0, void ()* @g.f1, i8* @g.used3 }], section "llvm.metadata" +@llvm.global_dtors = appending global [1 x %pri.func.data] [%pri.func.data { i32 0, void ()* @g.f1, i8* @g.used3 }], section "llvm.metadata" +; CHECK: @llvm.global_dtors = appending global [1 x %pri.func.data] [%pri.func.data { i32 0, void ()* @g.f1, i8* @g.used3 }], section "llvm.metadata" + +;; Aliases +; Format: @ = [Linkage] [Visibility] [DLLStorageClass] [ThreadLocal] +; [unnamed_addr] alias @ + +; Aliases -- Linkage +@a.private = private alias i32, i32* @g.private +; CHECK: @a.private = private alias i32, i32* @g.private +@a.internal = internal alias i32, i32* @g.internal +; CHECK: @a.internal = internal alias i32, i32* @g.internal +@a.linkonce = linkonce alias i32, i32* @g.linkonce +; CHECK: @a.linkonce = linkonce alias i32, i32* @g.linkonce +@a.weak = weak alias i32, i32* @g.weak +; CHECK: @a.weak = weak alias i32, i32* @g.weak +@a.linkonce_odr = linkonce_odr alias i32, i32* @g.linkonce_odr +; CHECK: @a.linkonce_odr = linkonce_odr alias i32, i32* @g.linkonce_odr +@a.weak_odr = weak_odr alias i32, i32* @g.weak_odr +; CHECK: @a.weak_odr = weak_odr alias i32, i32* @g.weak_odr +@a.external = external alias i32, i32* @g1 +; CHECK: @a.external = alias i32, i32* @g1 + +; Aliases -- Visibility +@a.default = default alias i32, i32* @g.default +; CHECK: @a.default = alias i32, i32* @g.default +@a.hidden = hidden alias i32, i32* @g.hidden +; CHECK: @a.hidden = hidden alias i32, i32* @g.hidden +@a.protected = protected alias i32, i32* @g.protected +; CHECK: @a.protected = protected alias i32, i32* @g.protected + +; Aliases -- DLLStorageClass +@a.dlldefault = default alias i32, i32* @g.dlldefault +; CHECK: @a.dlldefault = alias i32, i32* @g.dlldefault +@a.dllimport = dllimport alias i32, i32* @g1 +; CHECK: @a.dllimport = dllimport alias i32, i32* @g1 +@a.dllexport = dllexport alias i32, i32* @g.dllexport +; CHECK: @a.dllexport = dllexport alias i32, i32* @g.dllexport + +; Aliases -- ThreadLocal +@a.notthreadlocal = alias i32, i32* @g.notthreadlocal +; CHECK: @a.notthreadlocal = alias i32, i32* @g.notthreadlocal +@a.generaldynamic = thread_local alias i32, i32* @g.generaldynamic +; CHECK: @a.generaldynamic = thread_local alias i32, i32* @g.generaldynamic +@a.localdynamic = thread_local(localdynamic) alias i32, i32* @g.localdynamic +; CHECK: @a.localdynamic = thread_local(localdynamic) alias i32, i32* @g.localdynamic +@a.initialexec = thread_local(initialexec) alias i32, i32* @g.initialexec +; CHECK: @a.initialexec = thread_local(initialexec) alias i32, i32* @g.initialexec +@a.localexec = thread_local(localexec) alias i32, i32* @g.localexec +; CHECK: @a.localexec = thread_local(localexec) alias i32, i32* @g.localexec + +; Aliases -- unnamed_addr +@a.unnamed_addr = unnamed_addr alias i32, i32* @g.unnamed_addr +; CHECK: @a.unnamed_addr = unnamed_addr alias i32, i32* @g.unnamed_addr + +;; Functions +; Format: define [linkage] [visibility] [DLLStorageClass] +; [cconv] [ret attrs] +; @ ([argument list]) +; [unnamed_addr] [fn Attrs] [section "name"] [comdat [($name)]] +; [align N] [gc] [prefix Constant] [prologue Constant] +; [personality Constant] { ... } + +; Functions -- Simple +declare void @f1 () +; CHECK: declare void @f1() + +define void @f2 () { +; CHECK: define void @f2() +entry: + ret void +} + +; Functions -- linkage +define private void @f.private() { +; CHECK: define private void @f.private() +entry: + ret void +} +define internal void @f.internal() { +; CHECK: define internal void @f.internal() +entry: + ret void +} +define available_externally void @f.available_externally() { +; CHECK: define available_externally void @f.available_externally() +entry: + ret void +} +define linkonce void @f.linkonce() { +; CHECK: define linkonce void @f.linkonce() +entry: + ret void +} +define weak void @f.weak() { +; CHECK: define weak void @f.weak() +entry: + ret void +} +define linkonce_odr void @f.linkonce_odr() { +; CHECK: define linkonce_odr void @f.linkonce_odr() +entry: + ret void +} +define weak_odr void @f.weak_odr() { +; CHECK: define weak_odr void @f.weak_odr() +entry: + ret void +} +declare external void @f.external() +; CHECK: declare void @f.external() +declare extern_weak void @f.extern_weak() +; CHECK: declare extern_weak void @f.extern_weak() + +; Functions -- visibility +declare default void @f.default() +; CHECK: declare void @f.default() +declare hidden void @f.hidden() +; CHECK: declare hidden void @f.hidden() +declare protected void @f.protected() +; CHECK: declare protected void @f.protected() + +; Functions -- DLLStorageClass +declare dllimport void @f.dllimport() +; CHECK: declare dllimport void @f.dllimport() +declare dllexport void @f.dllexport() +; CHECK: declare dllexport void @f.dllexport() + +; Functions -- cconv (Calling conventions) +declare ccc void @f.ccc() +; CHECK: declare void @f.ccc() +declare fastcc void @f.fastcc() +; CHECK: declare fastcc void @f.fastcc() +declare coldcc void @f.coldcc() +; CHECK: declare coldcc void @f.coldcc() +declare cc10 void @f.cc10() +; CHECK: declare ghccc void @f.cc10() +declare ghccc void @f.ghccc() +; CHECK: declare ghccc void @f.ghccc() +declare cc11 void @f.cc11() +; CHECK: declare cc11 void @f.cc11() +declare webkit_jscc void @f.webkit_jscc() +; CHECK: declare webkit_jscc void @f.webkit_jscc() +declare anyregcc void @f.anyregcc() +; CHECK: declare anyregcc void @f.anyregcc() +declare preserve_mostcc void @f.preserve_mostcc() +; CHECK: declare preserve_mostcc void @f.preserve_mostcc() +declare preserve_allcc void @f.preserve_allcc() +; CHECK: declare preserve_allcc void @f.preserve_allcc() +declare cc64 void @f.cc64() +; CHECK: declare x86_stdcallcc void @f.cc64() +declare x86_stdcallcc void @f.x86_stdcallcc() +; CHECK: declare x86_stdcallcc void @f.x86_stdcallcc() +declare cc65 void @f.cc65() +; CHECK: declare x86_fastcallcc void @f.cc65() +declare x86_fastcallcc void @f.x86_fastcallcc() +; CHECK: declare x86_fastcallcc void @f.x86_fastcallcc() +declare cc66 void @f.cc66() +; CHECK: declare arm_apcscc void @f.cc66() +declare arm_apcscc void @f.arm_apcscc() +; CHECK: declare arm_apcscc void @f.arm_apcscc() +declare cc67 void @f.cc67() +; CHECK: declare arm_aapcscc void @f.cc67() +declare arm_aapcscc void @f.arm_aapcscc() +; CHECK: declare arm_aapcscc void @f.arm_aapcscc() +declare cc68 void @f.cc68() +; CHECK: declare arm_aapcs_vfpcc void @f.cc68() +declare arm_aapcs_vfpcc void @f.arm_aapcs_vfpcc() +; CHECK: declare arm_aapcs_vfpcc void @f.arm_aapcs_vfpcc() +declare cc69 void @f.cc69() +; CHECK: declare msp430_intrcc void @f.cc69() +declare msp430_intrcc void @f.msp430_intrcc() +; CHECK: declare msp430_intrcc void @f.msp430_intrcc() +declare cc70 void @f.cc70() +; CHECK: declare x86_thiscallcc void @f.cc70() +declare x86_thiscallcc void @f.x86_thiscallcc() +; CHECK: declare x86_thiscallcc void @f.x86_thiscallcc() +declare cc71 void @f.cc71() +; CHECK: declare ptx_kernel void @f.cc71() +declare ptx_kernel void @f.ptx_kernel() +; CHECK: declare ptx_kernel void @f.ptx_kernel() +declare cc72 void @f.cc72() +; CHECK: declare ptx_device void @f.cc72() +declare ptx_device void @f.ptx_device() +; CHECK: declare ptx_device void @f.ptx_device() +declare cc75 void @f.cc75() +; CHECK: declare spir_func void @f.cc75() +declare spir_func void @f.spir_func() +; CHECK: declare spir_func void @f.spir_func() +declare cc76 void @f.cc76() +; CHECK: declare spir_kernel void @f.cc76() +declare spir_kernel void @f.spir_kernel() +; CHECK: declare spir_kernel void @f.spir_kernel() +declare cc77 void @f.cc77() +; CHECK: declare intel_ocl_bicc void @f.cc77() +declare intel_ocl_bicc void @f.intel_ocl_bicc() +; CHECK: declare intel_ocl_bicc void @f.intel_ocl_bicc() +declare cc78 void @f.cc78() +; CHECK: declare x86_64_sysvcc void @f.cc78() +declare x86_64_sysvcc void @f.x86_64_sysvcc() +; CHECK: declare x86_64_sysvcc void @f.x86_64_sysvcc() +declare cc79 void @f.cc79() +; CHECK: declare x86_64_win64cc void @f.cc79() +declare x86_64_win64cc void @f.x86_64_win64cc() +; CHECK: declare x86_64_win64cc void @f.x86_64_win64cc() +declare cc80 void @f.cc80() +; CHECK: declare x86_vectorcallcc void @f.cc80() +declare x86_vectorcallcc void @f.x86_vectorcallcc() +; CHECK: declare x86_vectorcallcc void @f.x86_vectorcallcc() +declare cc1023 void @f.cc1023() +; CHECK: declare cc1023 void @f.cc1023() + +; Functions -- ret attrs (Return attributes) +declare zeroext i64 @f.zeroext() +; CHECK: declare zeroext i64 @f.zeroext() +declare signext i64 @f.signext() +; CHECK: declare signext i64 @f.signext() +declare inreg i32* @f.inreg() +; CHECK: declare inreg i32* @f.inreg() +declare noalias i32* @f.noalias() +; CHECK: declare noalias i32* @f.noalias() +declare nonnull i32* @f.nonnull() +; CHECK: declare nonnull i32* @f.nonnull() +declare dereferenceable(4) i32* @f.dereferenceable4() +; CHECK: declare dereferenceable(4) i32* @f.dereferenceable4() +declare dereferenceable(8) i32* @f.dereferenceable8() +; CHECK: declare dereferenceable(8) i32* @f.dereferenceable8() +declare dereferenceable(16) i32* @f.dereferenceable16() +; CHECK: declare dereferenceable(16) i32* @f.dereferenceable16() +declare dereferenceable_or_null(4) i32* @f.dereferenceable4_or_null() +; CHECK: declare dereferenceable_or_null(4) i32* @f.dereferenceable4_or_null() +declare dereferenceable_or_null(8) i32* @f.dereferenceable8_or_null() +; CHECK: declare dereferenceable_or_null(8) i32* @f.dereferenceable8_or_null() +declare dereferenceable_or_null(16) i32* @f.dereferenceable16_or_null() +; CHECK: declare dereferenceable_or_null(16) i32* @f.dereferenceable16_or_null() + +; Functions -- Parameter attributes +declare void @f.param.zeroext(i8 zeroext) +; CHECK: declare void @f.param.zeroext(i8 zeroext) +declare void @f.param.signext(i8 signext) +; CHECK: declare void @f.param.signext(i8 signext) +declare void @f.param.inreg(i8 inreg) +; CHECK: declare void @f.param.inreg(i8 inreg) +declare void @f.param.byval({ i8, i8 }* byval) +; CHECK: declare void @f.param.byval({ i8, i8 }* byval) +declare void @f.param.inalloca(i8* inalloca) +; CHECK: declare void @f.param.inalloca(i8* inalloca) +declare void @f.param.sret(i8* sret) +; CHECK: declare void @f.param.sret(i8* sret) +declare void @f.param.noalias(i8* noalias) +; CHECK: declare void @f.param.noalias(i8* noalias) +declare void @f.param.nocapture(i8* nocapture) +; CHECK: declare void @f.param.nocapture(i8* nocapture) +declare void @f.param.nest(i8* nest) +; CHECK: declare void @f.param.nest(i8* nest) +declare i8* @f.param.returned(i8* returned) +; CHECK: declare i8* @f.param.returned(i8* returned) +declare void @f.param.nonnull(i8* nonnull) +; CHECK: declare void @f.param.nonnull(i8* nonnull) +declare void @f.param.dereferenceable(i8* dereferenceable(4)) +; CHECK: declare void @f.param.dereferenceable(i8* dereferenceable(4)) +declare void @f.param.dereferenceable_or_null(i8* dereferenceable_or_null(4)) +; CHECK: declare void @f.param.dereferenceable_or_null(i8* dereferenceable_or_null(4)) + +; Functions -- unnamed_addr +declare void @f.unnamed_addr() unnamed_addr +; CHECK: declare void @f.unnamed_addr() unnamed_addr + +; Functions -- fn Attrs (Function attributes) +declare void @f.alignstack4() alignstack(4) +; CHECK: declare void @f.alignstack4() #0 +declare void @f.alignstack8() alignstack(8) +; CHECK: declare void @f.alignstack8() #1 +declare void @f.alwaysinline() alwaysinline +; CHECK: declare void @f.alwaysinline() #2 +declare void @f.cold() cold +; CHECK: declare void @f.cold() #3 +declare void @f.convergent() convergent +; CHECK: declare void @f.convergent() #4 +declare void @f.inlinehint() inlinehint +; CHECK: declare void @f.inlinehint() #5 +declare void @f.jumptable() unnamed_addr jumptable +; CHECK: declare void @f.jumptable() unnamed_addr #6 +declare void @f.minsize() minsize +; CHECK: declare void @f.minsize() #7 +declare void @f.naked() naked +; CHECK: declare void @f.naked() #8 +declare void @f.nobuiltin() nobuiltin +; CHECK: declare void @f.nobuiltin() #9 +declare void @f.noduplicate() noduplicate +; CHECK: declare void @f.noduplicate() #10 +declare void @f.noimplicitfloat() noimplicitfloat +; CHECK: declare void @f.noimplicitfloat() #11 +declare void @f.noinline() noinline +; CHECK: declare void @f.noinline() #12 +declare void @f.nonlazybind() nonlazybind +; CHECK: declare void @f.nonlazybind() #13 +declare void @f.noredzone() noredzone +; CHECK: declare void @f.noredzone() #14 +declare void @f.noreturn() noreturn +; CHECK: declare void @f.noreturn() #15 +declare void @f.nounwind() nounwind +; CHECK: declare void @f.nounwind() #16 +declare void @f.optnone() noinline optnone +; CHECK: declare void @f.optnone() #17 +declare void @f.optsize() optsize +; CHECK: declare void @f.optsize() #18 +declare void @f.readnone() readnone +; CHECK: declare void @f.readnone() #19 +declare void @f.readonly() readonly +; CHECK: declare void @f.readonly() #20 +declare void @f.returns_twice() returns_twice +; CHECK: declare void @f.returns_twice() #21 +declare void @f.safestack() safestack +; CHECK: declare void @f.safestack() #22 +declare void @f.sanitize_address() sanitize_address +; CHECK: declare void @f.sanitize_address() #23 +declare void @f.sanitize_memory() sanitize_memory +; CHECK: declare void @f.sanitize_memory() #24 +declare void @f.sanitize_thread() sanitize_thread +; CHECK: declare void @f.sanitize_thread() #25 +declare void @f.ssp() ssp +; CHECK: declare void @f.ssp() #26 +declare void @f.sspreq() sspreq +; CHECK: declare void @f.sspreq() #27 +declare void @f.sspstrong() sspstrong +; CHECK: declare void @f.sspstrong() #28 +declare void @f.thunk() "thunk" +; CHECK: declare void @f.thunk() #29 +declare void @f.uwtable() uwtable +; CHECK: declare void @f.uwtable() #30 +declare void @f.kvpair() "cpu"="cortex-a8" +; CHECK:declare void @f.kvpair() #31 +declare void @f.norecurse() norecurse +; CHECK: declare void @f.norecurse() #32 +declare void @f.inaccessiblememonly() inaccessiblememonly +; CHECK: declare void @f.inaccessiblememonly() #33 +declare void @f.inaccessiblemem_or_argmemonly() inaccessiblemem_or_argmemonly +; CHECK: declare void @f.inaccessiblemem_or_argmemonly() #34 + +; Functions -- section +declare void @f.section() section "80" +; CHECK: declare void @f.section() section "80" + +; Functions -- comdat +define void @f.comdat_any() comdat($comdat.any) { +; CHECK: define void @f.comdat_any() comdat($comdat.any) +entry: + ret void +} +define void @f.comdat_exactmatch() comdat($comdat.exactmatch) { +; CHECK: define void @f.comdat_exactmatch() comdat($comdat.exactmatch) +entry: + ret void +} +define void @f.comdat_largest() comdat($comdat.largest) { +; CHECK: define void @f.comdat_largest() comdat($comdat.largest) +entry: + ret void +} +define void @f.comdat_noduplicates() comdat($comdat.noduplicates) { +; CHECK: define void @f.comdat_noduplicates() comdat($comdat.noduplicates) +entry: + ret void +} +define void @f.comdat_samesize() comdat($comdat.samesize) { +; CHECK: define void @f.comdat_samesize() comdat($comdat.samesize) +entry: + ret void +} + +; Functions -- align +declare void @f.align2() align 2 +; CHECK: declare void @f.align2() align 2 +declare void @f.align4() align 4 +; CHECK: declare void @f.align4() align 4 +declare void @f.align8() align 8 +; CHECK: declare void @f.align8() align 8 + +; Functions -- GC +declare void @f.gcshadow() gc "shadow-stack" +; CHECK: declare void @f.gcshadow() gc "shadow-stack" + +; Functions -- Prefix data +declare void @f.prefixi32() prefix i32 1684365668 +; CHECK: declare void @f.prefixi32() prefix i32 1684365668 +declare void @f.prefixarray() prefix [4 x i32] [i32 0, i32 1, i32 2, i32 3] +; CHECK: declare void @f.prefixarray() prefix [4 x i32] [i32 0, i32 1, i32 2, i32 3] + +; Functions -- Prologue data +declare void @f.prologuei32() prologue i32 1684365669 +; CHECK: declare void @f.prologuei32() prologue i32 1684365669 +declare void @f.prologuearray() prologue [4 x i32] [i32 0, i32 1, i32 2, i32 3] +; CHECK: declare void @f.prologuearray() prologue [4 x i32] [i32 0, i32 1, i32 2, i32 3] + +; Functions -- Personality constant +declare void @llvm.donothing() nounwind readnone +; CHECK: declare void @llvm.donothing() #35 +define void @f.no_personality() personality i8 3 { +; CHECK: define void @f.no_personality() personality i8 3 + invoke void @llvm.donothing() to label %normal unwind label %exception +exception: + %cleanup = landingpad i8 cleanup + br label %normal +normal: + ret void +} + +declare i32 @f.personality_handler() +; CHECK: declare i32 @f.personality_handler() +define void @f.personality() personality i32 ()* @f.personality_handler { +; CHECK: define void @f.personality() personality i32 ()* @f.personality_handler + invoke void @llvm.donothing() to label %normal unwind label %exception +exception: + %cleanup = landingpad i32 cleanup + br label %normal +normal: + ret void +} + +;; Atomic Memory Ordering Constraints +define void @atomics(i32* %word) { + %cmpxchg.0 = cmpxchg i32* %word, i32 0, i32 4 monotonic monotonic + ; CHECK: %cmpxchg.0 = cmpxchg i32* %word, i32 0, i32 4 monotonic monotonic + %cmpxchg.1 = cmpxchg i32* %word, i32 0, i32 5 acq_rel monotonic + ; CHECK: %cmpxchg.1 = cmpxchg i32* %word, i32 0, i32 5 acq_rel monotonic + %cmpxchg.2 = cmpxchg i32* %word, i32 0, i32 6 acquire monotonic + ; CHECK: %cmpxchg.2 = cmpxchg i32* %word, i32 0, i32 6 acquire monotonic + %cmpxchg.3 = cmpxchg i32* %word, i32 0, i32 7 release monotonic + ; CHECK: %cmpxchg.3 = cmpxchg i32* %word, i32 0, i32 7 release monotonic + %cmpxchg.4 = cmpxchg i32* %word, i32 0, i32 8 seq_cst monotonic + ; CHECK: %cmpxchg.4 = cmpxchg i32* %word, i32 0, i32 8 seq_cst monotonic + %cmpxchg.5 = cmpxchg weak i32* %word, i32 0, i32 9 seq_cst monotonic + ; CHECK: %cmpxchg.5 = cmpxchg weak i32* %word, i32 0, i32 9 seq_cst monotonic + %cmpxchg.6 = cmpxchg volatile i32* %word, i32 0, i32 10 seq_cst monotonic + ; CHECK: %cmpxchg.6 = cmpxchg volatile i32* %word, i32 0, i32 10 seq_cst monotonic + %cmpxchg.7 = cmpxchg weak volatile i32* %word, i32 0, i32 11 singlethread seq_cst monotonic + ; CHECK: %cmpxchg.7 = cmpxchg weak volatile i32* %word, i32 0, i32 11 singlethread seq_cst monotonic + %atomicrmw.xchg = atomicrmw xchg i32* %word, i32 12 monotonic + ; CHECK: %atomicrmw.xchg = atomicrmw xchg i32* %word, i32 12 monotonic + %atomicrmw.add = atomicrmw add i32* %word, i32 13 monotonic + ; CHECK: %atomicrmw.add = atomicrmw add i32* %word, i32 13 monotonic + %atomicrmw.sub = atomicrmw sub i32* %word, i32 14 monotonic + ; CHECK: %atomicrmw.sub = atomicrmw sub i32* %word, i32 14 monotonic + %atomicrmw.and = atomicrmw and i32* %word, i32 15 monotonic + ; CHECK: %atomicrmw.and = atomicrmw and i32* %word, i32 15 monotonic + %atomicrmw.nand = atomicrmw nand i32* %word, i32 16 monotonic + ; CHECK: %atomicrmw.nand = atomicrmw nand i32* %word, i32 16 monotonic + %atomicrmw.or = atomicrmw or i32* %word, i32 17 monotonic + ; CHECK: %atomicrmw.or = atomicrmw or i32* %word, i32 17 monotonic + %atomicrmw.xor = atomicrmw xor i32* %word, i32 18 monotonic + ; CHECK: %atomicrmw.xor = atomicrmw xor i32* %word, i32 18 monotonic + %atomicrmw.max = atomicrmw max i32* %word, i32 19 monotonic + ; CHECK: %atomicrmw.max = atomicrmw max i32* %word, i32 19 monotonic + %atomicrmw.min = atomicrmw volatile min i32* %word, i32 20 monotonic + ; CHECK: %atomicrmw.min = atomicrmw volatile min i32* %word, i32 20 monotonic + %atomicrmw.umax = atomicrmw umax i32* %word, i32 21 singlethread monotonic + ; CHECK: %atomicrmw.umax = atomicrmw umax i32* %word, i32 21 singlethread monotonic + %atomicrmw.umin = atomicrmw volatile umin i32* %word, i32 22 singlethread monotonic + ; CHECK: %atomicrmw.umin = atomicrmw volatile umin i32* %word, i32 22 singlethread monotonic + fence acquire + ; CHECK: fence acquire + fence release + ; CHECK: fence release + fence acq_rel + ; CHECK: fence acq_rel + fence singlethread seq_cst + ; CHECK: fence singlethread seq_cst + + %ld.1 = load atomic i32, i32* %word monotonic, align 4 + ; CHECK: %ld.1 = load atomic i32, i32* %word monotonic, align 4 + %ld.2 = load atomic volatile i32, i32* %word acquire, align 8 + ; CHECK: %ld.2 = load atomic volatile i32, i32* %word acquire, align 8 + %ld.3 = load atomic volatile i32, i32* %word singlethread seq_cst, align 16 + ; CHECK: %ld.3 = load atomic volatile i32, i32* %word singlethread seq_cst, align 16 + + store atomic i32 23, i32* %word monotonic, align 4 + ; CHECK: store atomic i32 23, i32* %word monotonic, align 4 + store atomic volatile i32 24, i32* %word monotonic, align 4 + ; CHECK: store atomic volatile i32 24, i32* %word monotonic, align 4 + store atomic volatile i32 25, i32* %word singlethread monotonic, align 4 + ; CHECK: store atomic volatile i32 25, i32* %word singlethread monotonic, align 4 + ret void +} + +;; Fast Math Flags +define void @fastmathflags(float %op1, float %op2) { + %f.nnan = fadd nnan float %op1, %op2 + ; CHECK: %f.nnan = fadd nnan float %op1, %op2 + %f.ninf = fadd ninf float %op1, %op2 + ; CHECK: %f.ninf = fadd ninf float %op1, %op2 + %f.nsz = fadd nsz float %op1, %op2 + ; CHECK: %f.nsz = fadd nsz float %op1, %op2 + %f.arcp = fadd arcp float %op1, %op2 + ; CHECK: %f.arcp = fadd arcp float %op1, %op2 + %f.fast = fadd fast float %op1, %op2 + ; CHECK: %f.fast = fadd fast float %op1, %op2 + ret void +} + +; Check various fast math flags and floating-point types on calls. + +declare float @fmf1() +declare double @fmf2() +declare <4 x double> @fmf3() + +; CHECK-LABEL: fastMathFlagsForCalls( +define void @fastMathFlagsForCalls(float %f, double %d1, <4 x double> %d2) { + %call.fast = call fast float @fmf1() + ; CHECK: %call.fast = call fast float @fmf1() + + ; Throw in some other attributes to make sure those stay in the right places. + + %call.nsz.arcp = notail call nsz arcp double @fmf2() + ; CHECK: %call.nsz.arcp = notail call nsz arcp double @fmf2() + + %call.nnan.ninf = tail call nnan ninf fastcc <4 x double> @fmf3() + ; CHECK: %call.nnan.ninf = tail call nnan ninf fastcc <4 x double> @fmf3() + + ret void +} + +;; Type System +%opaquety = type opaque +define void @typesystem() { + %p0 = bitcast i8* null to i32 (i32)* + ; CHECK: %p0 = bitcast i8* null to i32 (i32)* + %p1 = bitcast i8* null to void (i8*)* + ; CHECK: %p1 = bitcast i8* null to void (i8*)* + %p2 = bitcast i8* null to i32 (i8*, ...)* + ; CHECK: %p2 = bitcast i8* null to i32 (i8*, ...)* + %p3 = bitcast i8* null to { i32, i8 } (i8*, ...)* + ; CHECK: %p3 = bitcast i8* null to { i32, i8 } (i8*, ...)* + %p4 = bitcast i8* null to <{ i32, i8 }> (i8*, ...)* + ; CHECK: %p4 = bitcast i8* null to <{ i32, i8 }> (i8*, ...)* + %p5 = bitcast i8* null to <{ i32, i8 }> (<{ i8*, i64 }>*, ...)* + ; CHECK: %p5 = bitcast i8* null to <{ i32, i8 }> (<{ i8*, i64 }>*, ...)* + + %t0 = alloca i1942652 + ; CHECK: %t0 = alloca i1942652 + %t1 = alloca half + ; CHECK: %t1 = alloca half + %t2 = alloca float + ; CHECK: %t2 = alloca float + %t3 = alloca double + ; CHECK: %t3 = alloca double + %t4 = alloca fp128 + ; CHECK: %t4 = alloca fp128 + %t5 = alloca x86_fp80 + ; CHECK: %t5 = alloca x86_fp80 + %t6 = alloca ppc_fp128 + ; CHECK: %t6 = alloca ppc_fp128 + %t7 = alloca x86_mmx + ; CHECK: %t7 = alloca x86_mmx + %t8 = alloca %opaquety* + ; CHECK: %t8 = alloca %opaquety* + + ret void +} + +declare void @llvm.token(token) +; CHECK: declare void @llvm.token(token) + +;; Inline Assembler Expressions +define void @inlineasm(i32 %arg) { + call i32 asm "bswap $0", "=r,r"(i32 %arg) + ; CHECK: call i32 asm "bswap $0", "=r,r"(i32 %arg) + call i32 asm sideeffect "blt $1, $2, $3", "=r,r,rm"(i32 %arg, i32 %arg) + ; CHECK: call i32 asm sideeffect "blt $1, $2, $3", "=r,r,rm"(i32 %arg, i32 %arg) + ret void +} + +;; Instructions + +; Instructions -- Terminators +define void @instructions.terminators(i8 %val) personality i32 -10 { + br i1 false, label %iftrue, label %iffalse + ; CHECK: br i1 false, label %iftrue, label %iffalse + br label %iftrue + ; CHECK: br label %iftrue +iftrue: + ret void + ; CHECK: ret void +iffalse: + + switch i8 %val, label %defaultdest [ + ; CHECK: switch i8 %val, label %defaultdest [ + i8 0, label %defaultdest.0 + ; CHECK: i8 0, label %defaultdest.0 + i8 1, label %defaultdest.1 + ; CHECK: i8 1, label %defaultdest.1 + i8 2, label %defaultdest.2 + ; CHECK: i8 2, label %defaultdest.2 + ] + ; CHECK: ] +defaultdest: + ret void +defaultdest.0: + ret void +defaultdest.1: + ret void +defaultdest.2: + + indirectbr i8* blockaddress(@instructions.terminators, %defaultdest.2), [label %defaultdest.2] + ; CHECK: indirectbr i8* blockaddress(@instructions.terminators, %defaultdest.2), [label %defaultdest.2] + indirectbr i8* blockaddress(@instructions.terminators, %defaultdest.2), [label %defaultdest.2, label %defaultdest.2] + ; CHECK: indirectbr i8* blockaddress(@instructions.terminators, %defaultdest.2), [label %defaultdest.2, label %defaultdest.2] + + invoke fastcc void @f.fastcc() + ; CHECK: invoke fastcc void @f.fastcc() + to label %defaultdest unwind label %exc + ; CHECK: to label %defaultdest unwind label %exc +exc: + %cleanup = landingpad i32 cleanup + + resume i32 undef + ; CHECK: resume i32 undef + unreachable + ; CHECK: unreachable + + ret void +} + +define i32 @instructions.win_eh.1() personality i32 -3 { +entry: + %arg1 = alloca i32 + %arg2 = alloca i32 + invoke void @f.ccc() to label %normal unwind label %catchswitch1 + invoke void @f.ccc() to label %normal unwind label %catchswitch2 + invoke void @f.ccc() to label %normal unwind label %catchswitch3 + +catchswitch1: + %cs1 = catchswitch within none [label %catchpad1] unwind to caller + +catchpad1: + catchpad within %cs1 [] + br label %normal + ; CHECK: catchpad within %cs1 [] + ; CHECK-NEXT: br label %normal + +catchswitch2: + %cs2 = catchswitch within none [label %catchpad2] unwind to caller + +catchpad2: + catchpad within %cs2 [i32* %arg1] + br label %normal + ; CHECK: catchpad within %cs2 [i32* %arg1] + ; CHECK-NEXT: br label %normal + +catchswitch3: + %cs3 = catchswitch within none [label %catchpad3] unwind label %cleanuppad1 + +catchpad3: + catchpad within %cs3 [i32* %arg1, i32* %arg2] + br label %normal + ; CHECK: catchpad within %cs3 [i32* %arg1, i32* %arg2] + ; CHECK-NEXT: br label %normal + +cleanuppad1: + %clean.1 = cleanuppad within none [] + unreachable + ; CHECK: %clean.1 = cleanuppad within none [] + ; CHECK-NEXT: unreachable + +normal: + ret i32 0 +} +; +define i32 @instructions.win_eh.2() personality i32 -4 { +entry: + invoke void @f.ccc() to label %invoke.cont unwind label %catchswitch + +invoke.cont: + invoke void @f.ccc() to label %continue unwind label %cleanup + +cleanup: + %clean = cleanuppad within none [] + ; CHECK: %clean = cleanuppad within none [] + cleanupret from %clean unwind to caller + ; CHECK: cleanupret from %clean unwind to caller + +catchswitch: + %cs = catchswitch within none [label %catchpad] unwind label %terminate + +catchpad: + %catch = catchpad within %cs [] + br label %body + ; CHECK: %catch = catchpad within %cs [] + ; CHECK-NEXT: br label %body + +body: + invoke void @f.ccc() [ "funclet"(token %catch) ] + to label %continue unwind label %terminate.inner + catchret from %catch to label %return + ; CHECK: catchret from %catch to label %return + +return: + ret i32 0 + +terminate.inner: + cleanuppad within %catch [] + unreachable + ; CHECK: cleanuppad within %catch [] + ; CHECK-NEXT: unreachable + +terminate: + cleanuppad within none [] + unreachable + ; CHECK: cleanuppad within none [] + ; CHECK-NEXT: unreachable + +continue: + ret i32 0 +} + +; Instructions -- Binary Operations +define void @instructions.binops(i8 %op1, i8 %op2) { + ; nuw x nsw + add i8 %op1, %op2 + ; CHECK: add i8 %op1, %op2 + add nuw i8 %op1, %op2 + ; CHECK: add nuw i8 %op1, %op2 + add nsw i8 %op1, %op2 + ; CHECK: add nsw i8 %op1, %op2 + add nuw nsw i8 %op1, %op2 + ; CHECK: add nuw nsw i8 %op1, %op2 + sub i8 %op1, %op2 + ; CHECK: sub i8 %op1, %op2 + sub nuw i8 %op1, %op2 + ; CHECK: sub nuw i8 %op1, %op2 + sub nsw i8 %op1, %op2 + ; CHECK: sub nsw i8 %op1, %op2 + sub nuw nsw i8 %op1, %op2 + ; CHECK: sub nuw nsw i8 %op1, %op2 + mul i8 %op1, %op2 + ; CHECK: mul i8 %op1, %op2 + mul nuw i8 %op1, %op2 + ; CHECK: mul nuw i8 %op1, %op2 + mul nsw i8 %op1, %op2 + ; CHECK: mul nsw i8 %op1, %op2 + mul nuw nsw i8 %op1, %op2 + ; CHECK: mul nuw nsw i8 %op1, %op2 + + ; exact + udiv i8 %op1, %op2 + ; CHECK: udiv i8 %op1, %op2 + udiv exact i8 %op1, %op2 + ; CHECK: udiv exact i8 %op1, %op2 + sdiv i8 %op1, %op2 + ; CHECK: sdiv i8 %op1, %op2 + sdiv exact i8 %op1, %op2 + ; CHECK: sdiv exact i8 %op1, %op2 + + ; none + urem i8 %op1, %op2 + ; CHECK: urem i8 %op1, %op2 + srem i8 %op1, %op2 + ; CHECK: srem i8 %op1, %op2 + + ret void +} + +; Instructions -- Bitwise Binary Operations +define void @instructions.bitwise_binops(i8 %op1, i8 %op2) { + ; nuw x nsw + shl i8 %op1, %op2 + ; CHECK: shl i8 %op1, %op2 + shl nuw i8 %op1, %op2 + ; CHECK: shl nuw i8 %op1, %op2 + shl nsw i8 %op1, %op2 + ; CHECK: shl nsw i8 %op1, %op2 + shl nuw nsw i8 %op1, %op2 + ; CHECK: shl nuw nsw i8 %op1, %op2 + + ; exact + lshr i8 %op1, %op2 + ; CHECK: lshr i8 %op1, %op2 + lshr exact i8 %op1, %op2 + ; CHECK: lshr exact i8 %op1, %op2 + ashr i8 %op1, %op2 + ; CHECK: ashr i8 %op1, %op2 + ashr exact i8 %op1, %op2 + ; CHECK: ashr exact i8 %op1, %op2 + + ; none + and i8 %op1, %op2 + ; CHECK: and i8 %op1, %op2 + or i8 %op1, %op2 + ; CHECK: or i8 %op1, %op2 + xor i8 %op1, %op2 + ; CHECK: xor i8 %op1, %op2 + + ret void +} + +; Instructions -- Vector Operations +define void @instructions.vectorops(<4 x float> %vec, <4 x float> %vec2) { + extractelement <4 x float> %vec, i8 0 + ; CHECK: extractelement <4 x float> %vec, i8 0 + insertelement <4 x float> %vec, float 3.500000e+00, i8 0 + ; CHECK: insertelement <4 x float> %vec, float 3.500000e+00, i8 0 + shufflevector <4 x float> %vec, <4 x float> %vec2, <2 x i32> zeroinitializer + ; CHECK: shufflevector <4 x float> %vec, <4 x float> %vec2, <2 x i32> zeroinitializer + + ret void +} + +; Instructions -- Aggregate Operations +define void @instructions.aggregateops({ i8, i32 } %up, <{ i8, i32 }> %p, + [3 x i8] %arr, { i8, { i32 }} %n, + <2 x i8*> %pvec, <2 x i64> %offsets) { + extractvalue { i8, i32 } %up, 0 + ; CHECK: extractvalue { i8, i32 } %up, 0 + extractvalue <{ i8, i32 }> %p, 1 + ; CHECK: extractvalue <{ i8, i32 }> %p, 1 + extractvalue [3 x i8] %arr, 2 + ; CHECK: extractvalue [3 x i8] %arr, 2 + extractvalue { i8, { i32 } } %n, 1, 0 + ; CHECK: extractvalue { i8, { i32 } } %n, 1, 0 + + insertvalue { i8, i32 } %up, i8 1, 0 + ; CHECK: insertvalue { i8, i32 } %up, i8 1, 0 + insertvalue <{ i8, i32 }> %p, i32 2, 1 + ; CHECK: insertvalue <{ i8, i32 }> %p, i32 2, 1 + insertvalue [3 x i8] %arr, i8 0, 0 + ; CHECK: insertvalue [3 x i8] %arr, i8 0, 0 + insertvalue { i8, { i32 } } %n, i32 0, 1, 0 + ; CHECK: insertvalue { i8, { i32 } } %n, i32 0, 1, 0 + + %up.ptr = alloca { i8, i32 } + %p.ptr = alloca <{ i8, i32 }> + %arr.ptr = alloca [3 x i8] + %n.ptr = alloca { i8, { i32 } } + + getelementptr { i8, i32 }, { i8, i32 }* %up.ptr, i8 0 + ; CHECK: getelementptr { i8, i32 }, { i8, i32 }* %up.ptr, i8 0 + getelementptr <{ i8, i32 }>, <{ i8, i32 }>* %p.ptr, i8 1 + ; CHECK: getelementptr <{ i8, i32 }>, <{ i8, i32 }>* %p.ptr, i8 1 + getelementptr [3 x i8], [3 x i8]* %arr.ptr, i8 2 + ; CHECK: getelementptr [3 x i8], [3 x i8]* %arr.ptr, i8 2 + getelementptr { i8, { i32 } }, { i8, { i32 } }* %n.ptr, i32 0, i32 1 + ; CHECK: getelementptr { i8, { i32 } }, { i8, { i32 } }* %n.ptr, i32 0, i32 1 + getelementptr inbounds { i8, { i32 } }, { i8, { i32 } }* %n.ptr, i32 1, i32 0 + ; CHECK: getelementptr inbounds { i8, { i32 } }, { i8, { i32 } }* %n.ptr, i32 1, i32 0 + getelementptr i8, <2 x i8*> %pvec, <2 x i64> %offsets + ; CHECK: getelementptr i8, <2 x i8*> %pvec, <2 x i64> %offsets + + ret void +} + +; Instructions -- Memory Access and Addressing Operations +!7 = !{i32 1} +!8 = !{} +!9 = !{i64 4} +define void @instructions.memops(i32** %base) { + alloca i32, i8 4, align 4 + ; CHECK: alloca i32, i8 4, align 4 + alloca inalloca i32, i8 4, align 4 + ; CHECK: alloca inalloca i32, i8 4, align 4 + + load i32*, i32** %base, align 8, !invariant.load !7, !nontemporal !8, !nonnull !7, !dereferenceable !9, !dereferenceable_or_null !9 + ; CHECK: load i32*, i32** %base, align 8, !invariant.load !7, !nontemporal !8, !nonnull !7, !dereferenceable !9, !dereferenceable_or_null !9 + load volatile i32*, i32** %base, align 8, !invariant.load !7, !nontemporal !8, !nonnull !7, !dereferenceable !9, !dereferenceable_or_null !9 + ; CHECK: load volatile i32*, i32** %base, align 8, !invariant.load !7, !nontemporal !8, !nonnull !7, !dereferenceable !9, !dereferenceable_or_null !9 + + store i32* null, i32** %base, align 4, !nontemporal !8 + ; CHECK: store i32* null, i32** %base, align 4, !nontemporal !8 + store volatile i32* null, i32** %base, align 4, !nontemporal !8 + ; CHECK: store volatile i32* null, i32** %base, align 4, !nontemporal !8 + + ret void +} + +; Instructions -- Conversion Operations +define void @instructions.conversions() { + trunc i32 -1 to i1 + ; CHECK: trunc i32 -1 to i1 + zext i32 -1 to i64 + ; CHECK: zext i32 -1 to i64 + sext i32 -1 to i64 + ; CHECK: sext i32 -1 to i64 + fptrunc float undef to half + ; CHECK: fptrunc float undef to half + fpext half undef to float + ; CHECK: fpext half undef to float + fptoui float undef to i32 + ; CHECK: fptoui float undef to i32 + fptosi float undef to i32 + ; CHECK: fptosi float undef to i32 + uitofp i32 1 to float + ; CHECK: uitofp i32 1 to float + sitofp i32 -1 to float + ; CHECK: sitofp i32 -1 to float + ptrtoint i8* null to i64 + ; CHECK: ptrtoint i8* null to i64 + inttoptr i64 0 to i8* + ; CHECK: inttoptr i64 0 to i8* + bitcast i32 0 to i32 + ; CHECK: bitcast i32 0 to i32 + addrspacecast i32* null to i32 addrspace(1)* + ; CHECK: addrspacecast i32* null to i32 addrspace(1)* + + ret void +} + +; Instructions -- Other Operations +define void @instructions.other(i32 %op1, i32 %op2, half %fop1, half %fop2) { +entry: + icmp eq i32 %op1, %op2 + ; CHECK: icmp eq i32 %op1, %op2 + icmp ne i32 %op1, %op2 + ; CHECK: icmp ne i32 %op1, %op2 + icmp ugt i32 %op1, %op2 + ; CHECK: icmp ugt i32 %op1, %op2 + icmp uge i32 %op1, %op2 + ; CHECK: icmp uge i32 %op1, %op2 + icmp ult i32 %op1, %op2 + ; CHECK: icmp ult i32 %op1, %op2 + icmp ule i32 %op1, %op2 + ; CHECK: icmp ule i32 %op1, %op2 + icmp sgt i32 %op1, %op2 + ; CHECK: icmp sgt i32 %op1, %op2 + icmp sge i32 %op1, %op2 + ; CHECK: icmp sge i32 %op1, %op2 + icmp slt i32 %op1, %op2 + ; CHECK: icmp slt i32 %op1, %op2 + icmp sle i32 %op1, %op2 + ; CHECK: icmp sle i32 %op1, %op2 + + fcmp false half %fop1, %fop2 + ; CHECK: fcmp false half %fop1, %fop2 + fcmp oeq half %fop1, %fop2 + ; CHECK: fcmp oeq half %fop1, %fop2 + fcmp ogt half %fop1, %fop2 + ; CHECK: fcmp ogt half %fop1, %fop2 + fcmp oge half %fop1, %fop2 + ; CHECK: fcmp oge half %fop1, %fop2 + fcmp olt half %fop1, %fop2 + ; CHECK: fcmp olt half %fop1, %fop2 + fcmp ole half %fop1, %fop2 + ; CHECK: fcmp ole half %fop1, %fop2 + fcmp one half %fop1, %fop2 + ; CHECK: fcmp one half %fop1, %fop2 + fcmp ord half %fop1, %fop2 + ; CHECK: fcmp ord half %fop1, %fop2 + fcmp ueq half %fop1, %fop2 + ; CHECK: fcmp ueq half %fop1, %fop2 + fcmp ugt half %fop1, %fop2 + ; CHECK: fcmp ugt half %fop1, %fop2 + fcmp uge half %fop1, %fop2 + ; CHECK: fcmp uge half %fop1, %fop2 + fcmp ult half %fop1, %fop2 + ; CHECK: fcmp ult half %fop1, %fop2 + fcmp ule half %fop1, %fop2 + ; CHECK: fcmp ule half %fop1, %fop2 + fcmp une half %fop1, %fop2 + ; CHECK: fcmp une half %fop1, %fop2 + fcmp uno half %fop1, %fop2 + ; CHECK: fcmp uno half %fop1, %fop2 + fcmp true half %fop1, %fop2 + ; CHECK: fcmp true half %fop1, %fop2 + + br label %exit +L1: + %v1 = add i32 %op1, %op2 + br label %exit +L2: + %v2 = add i32 %op1, %op2 + br label %exit +exit: + phi i32 [ %v1, %L1 ], [ %v2, %L2 ], [ %op1, %entry ] + ; CHECK: phi i32 [ %v1, %L1 ], [ %v2, %L2 ], [ %op1, %entry ] + + select i1 true, i32 0, i32 1 + ; CHECK: select i1 true, i32 0, i32 1 + select <2 x i1> , <2 x i8> , <2 x i8> + ; CHECK: select <2 x i1> , <2 x i8> , <2 x i8> + + call void @f.nobuiltin() builtin + ; CHECK: call void @f.nobuiltin() #39 + + call fastcc noalias i32* @f.noalias() noinline + ; CHECK: call fastcc noalias i32* @f.noalias() #12 + tail call ghccc nonnull i32* @f.nonnull() minsize + ; CHECK: tail call ghccc nonnull i32* @f.nonnull() #7 + + ret void +} + +define void @instructions.call_musttail(i8* inalloca %val) { + musttail call void @f.param.inalloca(i8* inalloca %val) + ; CHECK: musttail call void @f.param.inalloca(i8* inalloca %val) + + ret void +} + +define void @instructions.call_notail() { + notail call void @f1() + ; CHECK: notail call void @f1() + + ret void +} + +define void @instructions.landingpad() personality i32 -2 { + invoke void @llvm.donothing() to label %proceed unwind label %catch1 + invoke void @llvm.donothing() to label %proceed unwind label %catch2 + invoke void @llvm.donothing() to label %proceed unwind label %catch3 + invoke void @llvm.donothing() to label %proceed unwind label %catch4 + +catch1: + landingpad i32 + ; CHECK: landingpad i32 + cleanup + ; CHECK: cleanup + br label %proceed + +catch2: + landingpad i32 + ; CHECK: landingpad i32 + cleanup + ; CHECK: cleanup + catch i32* null + ; CHECK: catch i32* null + br label %proceed + +catch3: + landingpad i32 + ; CHECK: landingpad i32 + cleanup + ; CHECK: cleanup + catch i32* null + ; CHECK: catch i32* null + catch i32* null + ; CHECK: catch i32* null + br label %proceed + +catch4: + landingpad i32 + ; CHECK: landingpad i32 + filter [2 x i32] zeroinitializer + ; CHECK: filter [2 x i32] zeroinitializer + br label %proceed + +proceed: + ret void +} + +;; Intrinsic Functions + +; Intrinsic Functions -- Variable Argument Handling +declare void @llvm.va_start(i8*) +declare void @llvm.va_copy(i8*, i8*) +declare void @llvm.va_end(i8*) +define void @instructions.va_arg(i8* %v, ...) { + %ap = alloca i8* + %ap2 = bitcast i8** %ap to i8* + + call void @llvm.va_start(i8* %ap2) + ; CHECK: call void @llvm.va_start(i8* %ap2) + + va_arg i8* %ap2, i32 + ; CHECK: va_arg i8* %ap2, i32 + + call void @llvm.va_copy(i8* %v, i8* %ap2) + ; CHECK: call void @llvm.va_copy(i8* %v, i8* %ap2) + + call void @llvm.va_end(i8* %ap2) + ; CHECK: call void @llvm.va_end(i8* %ap2) + + ret void +} + +; Intrinsic Functions -- Accurate Garbage Collection +declare void @llvm.gcroot(i8**, i8*) +declare i8* @llvm.gcread(i8*, i8**) +declare void @llvm.gcwrite(i8*, i8*, i8**) +define void @intrinsics.gc() gc "shadow-stack" { + %ptrloc = alloca i8* + call void @llvm.gcroot(i8** %ptrloc, i8* null) + ; CHECK: call void @llvm.gcroot(i8** %ptrloc, i8* null) + + call i8* @llvm.gcread(i8* null, i8** %ptrloc) + ; CHECK: call i8* @llvm.gcread(i8* null, i8** %ptrloc) + + %ref = alloca i8 + call void @llvm.gcwrite(i8* %ref, i8* null, i8** %ptrloc) + ; CHECK: call void @llvm.gcwrite(i8* %ref, i8* null, i8** %ptrloc) + + ret void +} + +; Intrinsic Functions -- Code Generation +declare i8* @llvm.returnaddress(i32) +declare i8* @llvm.frameaddress(i32) +declare i32 @llvm.read_register.i32(metadata) +declare i64 @llvm.read_register.i64(metadata) +declare void @llvm.write_register.i32(metadata, i32) +declare void @llvm.write_register.i64(metadata, i64) +declare i8* @llvm.stacksave() +declare void @llvm.stackrestore(i8*) +declare void @llvm.prefetch(i8*, i32, i32, i32) +declare void @llvm.pcmarker(i32) +declare i64 @llvm.readcyclecounter() +declare void @llvm.clear_cache(i8*, i8*) +declare void @llvm.instrprof_increment(i8*, i64, i32, i32) + +!10 = !{!"rax"} +define void @intrinsics.codegen() { + call i8* @llvm.returnaddress(i32 1) + ; CHECK: call i8* @llvm.returnaddress(i32 1) + call i8* @llvm.frameaddress(i32 1) + ; CHECK: call i8* @llvm.frameaddress(i32 1) + + call i32 @llvm.read_register.i32(metadata !10) + ; CHECK: call i32 @llvm.read_register.i32(metadata !10) + call i64 @llvm.read_register.i64(metadata !10) + ; CHECK: call i64 @llvm.read_register.i64(metadata !10) + call void @llvm.write_register.i32(metadata !10, i32 0) + ; CHECK: call void @llvm.write_register.i32(metadata !10, i32 0) + call void @llvm.write_register.i64(metadata !10, i64 0) + ; CHECK: call void @llvm.write_register.i64(metadata !10, i64 0) + + %stack = call i8* @llvm.stacksave() + ; CHECK: %stack = call i8* @llvm.stacksave() + call void @llvm.stackrestore(i8* %stack) + ; CHECK: call void @llvm.stackrestore(i8* %stack) + + call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0) + ; CHECK: call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0) + + call void @llvm.pcmarker(i32 1) + ; CHECK: call void @llvm.pcmarker(i32 1) + + call i64 @llvm.readcyclecounter() + ; CHECK: call i64 @llvm.readcyclecounter() + + call void @llvm.clear_cache(i8* null, i8* null) + ; CHECK: call void @llvm.clear_cache(i8* null, i8* null) + + call void @llvm.instrprof_increment(i8* null, i64 0, i32 0, i32 0) + ; CHECK: call void @llvm.instrprof_increment(i8* null, i64 0, i32 0, i32 0) + + ret void +} + +declare void @llvm.localescape(...) +declare i8* @llvm.localrecover(i8* %func, i8* %fp, i32 %idx) +define void @intrinsics.localescape() { + %static.alloca = alloca i32 + call void (...) @llvm.localescape(i32* %static.alloca) + ; CHECK: call void (...) @llvm.localescape(i32* %static.alloca) + + call void @intrinsics.localrecover() + + ret void +} +define void @intrinsics.localrecover() { + %func = bitcast void ()* @intrinsics.localescape to i8* + %fp = call i8* @llvm.frameaddress(i32 1) + call i8* @llvm.localrecover(i8* %func, i8* %fp, i32 0) + ; CHECK: call i8* @llvm.localrecover(i8* %func, i8* %fp, i32 0) + + ret void +} + +; We need this function to provide `uses' for some metadata tests. +define void @misc.metadata() { + call void @f1(), !srcloc !11 + call void @f1(), !srcloc !12 + call void @f1(), !srcloc !13 + call void @f1(), !srcloc !14 + ret void +} + +declare void @op_bundle_callee_0() +declare void @op_bundle_callee_1(i32,i32) + +define void @call_with_operand_bundle0(i32* %ptr) { +; CHECK-LABEL: call_with_operand_bundle0( + entry: + %l = load i32, i32* %ptr + %x = add i32 42, 1 + call void @op_bundle_callee_0() [ "foo"(i32 42, i64 100, i32 %x), "bar"(float 0.000000e+00, i64 100, i32 %l) ] +; CHECK: call void @op_bundle_callee_0() [ "foo"(i32 42, i64 100, i32 %x), "bar"(float 0.000000e+00, i64 100, i32 %l) ] + ret void +} + +define void @call_with_operand_bundle1(i32* %ptr) { +; CHECK-LABEL: call_with_operand_bundle1( + entry: + %l = load i32, i32* %ptr + %x = add i32 42, 1 + + call void @op_bundle_callee_0() + call void @op_bundle_callee_0() [ "foo"() ] + call void @op_bundle_callee_0() [ "foo"(i32 42, i64 100, i32 %x), "bar"(float 0.000000e+00, i64 100, i32 %l) ] +; CHECK: @op_bundle_callee_0(){{$}} +; CHECK-NEXT: call void @op_bundle_callee_0() [ "foo"() ] +; CHECK-NEXT: call void @op_bundle_callee_0() [ "foo"(i32 42, i64 100, i32 %x), "bar"(float 0.000000e+00, i64 100, i32 %l) ] + ret void +} + +define void @call_with_operand_bundle2(i32* %ptr) { +; CHECK-LABEL: call_with_operand_bundle2( + entry: + call void @op_bundle_callee_0() [ "foo"() ] +; CHECK: call void @op_bundle_callee_0() [ "foo"() ] + ret void +} + +define void @call_with_operand_bundle3(i32* %ptr) { +; CHECK-LABEL: call_with_operand_bundle3( + entry: + %l = load i32, i32* %ptr + %x = add i32 42, 1 + call void @op_bundle_callee_0() [ "foo"(i32 42, i64 100, i32 %x), "foo"(i32 42, float 0.000000e+00, i32 %l) ] +; CHECK: call void @op_bundle_callee_0() [ "foo"(i32 42, i64 100, i32 %x), "foo"(i32 42, float 0.000000e+00, i32 %l) ] + ret void +} + +define void @call_with_operand_bundle4(i32* %ptr) { +; CHECK-LABEL: call_with_operand_bundle4( + entry: + %l = load i32, i32* %ptr + %x = add i32 42, 1 + call void @op_bundle_callee_1(i32 10, i32 %x) [ "foo"(i32 42, i64 100, i32 %x), "foo"(i32 42, float 0.000000e+00, i32 %l) ] +; CHECK: call void @op_bundle_callee_1(i32 10, i32 %x) [ "foo"(i32 42, i64 100, i32 %x), "foo"(i32 42, float 0.000000e+00, i32 %l) ] + ret void +} + +; Invoke versions of the above tests: + + +define void @invoke_with_operand_bundle0(i32* %ptr) personality i8 3 { +; CHECK-LABEL: @invoke_with_operand_bundle0( + entry: + %l = load i32, i32* %ptr + %x = add i32 42, 1 + invoke void @op_bundle_callee_0() [ "foo"(i32 42, i64 100, i32 %x), "bar"(float 0.000000e+00, i64 100, i32 %l) ] to label %normal unwind label %exception +; CHECK: invoke void @op_bundle_callee_0() [ "foo"(i32 42, i64 100, i32 %x), "bar"(float 0.000000e+00, i64 100, i32 %l) ] + +exception: + %cleanup = landingpad i8 cleanup + br label %normal +normal: + ret void +} + +define void @invoke_with_operand_bundle1(i32* %ptr) personality i8 3 { +; CHECK-LABEL: @invoke_with_operand_bundle1( + entry: + %l = load i32, i32* %ptr + %x = add i32 42, 1 + + invoke void @op_bundle_callee_0() to label %normal unwind label %exception +; CHECK: invoke void @op_bundle_callee_0(){{$}} + +exception: + %cleanup = landingpad i8 cleanup + br label %normal + +normal: + invoke void @op_bundle_callee_0() [ "foo"() ] to label %normal1 unwind label %exception1 +; CHECK: invoke void @op_bundle_callee_0() [ "foo"() ] + +exception1: + %cleanup1 = landingpad i8 cleanup + br label %normal1 + +normal1: + invoke void @op_bundle_callee_0() [ "foo"(i32 42, i64 100, i32 %x), "foo"(i32 42, float 0.000000e+00, i32 %l) ] to label %normal2 unwind label %exception2 +; CHECK: invoke void @op_bundle_callee_0() [ "foo"(i32 42, i64 100, i32 %x), "foo"(i32 42, float 0.000000e+00, i32 %l) ] + +exception2: + %cleanup2 = landingpad i8 cleanup + br label %normal2 + +normal2: + ret void +} + +define void @invoke_with_operand_bundle2(i32* %ptr) personality i8 3 { +; CHECK-LABEL: @invoke_with_operand_bundle2( + entry: + invoke void @op_bundle_callee_0() [ "foo"() ] to label %normal unwind label %exception +; CHECK: invoke void @op_bundle_callee_0() [ "foo"() ] + +exception: + %cleanup = landingpad i8 cleanup + br label %normal +normal: + ret void +} + +define void @invoke_with_operand_bundle3(i32* %ptr) personality i8 3 { +; CHECK-LABEL: @invoke_with_operand_bundle3( + entry: + %l = load i32, i32* %ptr + %x = add i32 42, 1 + invoke void @op_bundle_callee_0() [ "foo"(i32 42, i64 100, i32 %x), "foo"(i32 42, float 0.000000e+00, i32 %l) ] to label %normal unwind label %exception +; CHECK: invoke void @op_bundle_callee_0() [ "foo"(i32 42, i64 100, i32 %x), "foo"(i32 42, float 0.000000e+00, i32 %l) ] + +exception: + %cleanup = landingpad i8 cleanup + br label %normal +normal: + ret void +} + +define void @invoke_with_operand_bundle4(i32* %ptr) personality i8 3 { +; CHECK-LABEL: @invoke_with_operand_bundle4( + entry: + %l = load i32, i32* %ptr + %x = add i32 42, 1 + invoke void @op_bundle_callee_1(i32 10, i32 %x) [ "foo"(i32 42, i64 100, i32 %x), "foo"(i32 42, float 0.000000e+00, i32 %l) ] + to label %normal unwind label %exception +; CHECK: invoke void @op_bundle_callee_1(i32 10, i32 %x) [ "foo"(i32 42, i64 100, i32 %x), "foo"(i32 42, float 0.000000e+00, i32 %l) ] + +exception: + %cleanup = landingpad i8 cleanup + br label %normal +normal: + ret void +} + + +; CHECK: attributes #0 = { alignstack=4 } +; CHECK: attributes #1 = { alignstack=8 } +; CHECK: attributes #2 = { alwaysinline } +; CHECK: attributes #3 = { cold } +; CHECK: attributes #4 = { convergent } +; CHECK: attributes #5 = { inlinehint } +; CHECK: attributes #6 = { jumptable } +; CHECK: attributes #7 = { minsize } +; CHECK: attributes #8 = { naked } +; CHECK: attributes #9 = { nobuiltin } +; CHECK: attributes #10 = { noduplicate } +; CHECK: attributes #11 = { noimplicitfloat } +; CHECK: attributes #12 = { noinline } +; CHECK: attributes #13 = { nonlazybind } +; CHECK: attributes #14 = { noredzone } +; CHECK: attributes #15 = { noreturn } +; CHECK: attributes #16 = { nounwind } +; CHECK: attributes #17 = { noinline optnone } +; CHECK: attributes #18 = { optsize } +; CHECK: attributes #19 = { readnone } +; CHECK: attributes #20 = { readonly } +; CHECK: attributes #21 = { returns_twice } +; CHECK: attributes #22 = { safestack } +; CHECK: attributes #23 = { sanitize_address } +; CHECK: attributes #24 = { sanitize_memory } +; CHECK: attributes #25 = { sanitize_thread } +; CHECK: attributes #26 = { ssp } +; CHECK: attributes #27 = { sspreq } +; CHECK: attributes #28 = { sspstrong } +; CHECK: attributes #29 = { "thunk" } +; CHECK: attributes #30 = { uwtable } +; CHECK: attributes #31 = { "cpu"="cortex-a8" } +; CHECK: attributes #32 = { norecurse } +; CHECK: attributes #33 = { inaccessiblememonly } +; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly } +; CHECK: attributes #35 = { nounwind readnone } +; CHECK: attributes #36 = { argmemonly nounwind readonly } +; CHECK: attributes #37 = { argmemonly nounwind } +; CHECK: attributes #38 = { nounwind readonly } +; CHECK: attributes #39 = { builtin } + +;; Metadata + +; Metadata -- Module flags +!llvm.module.flags = !{!0, !1, !2, !4, !5, !6} +; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6} + +!0 = !{i32 1, !"mod1", i32 0} +; CHECK: !0 = !{i32 1, !"mod1", i32 0} +!1 = !{i32 2, !"mod2", i32 0} +; CHECK: !1 = !{i32 2, !"mod2", i32 0} +!2 = !{i32 3, !"mod3", !3} +; CHECK: !2 = !{i32 3, !"mod3", !3} +!3 = !{!"mod6", !0} +; CHECK: !3 = !{!"mod6", !0} +!4 = !{i32 4, !"mod4", i32 0} +; CHECK: !4 = !{i32 4, !"mod4", i32 0} +!5 = !{i32 5, !"mod5", !0} +; CHECK: !5 = !{i32 5, !"mod5", !0} +!6 = !{i32 6, !"mod6", !0} +; CHECK: !6 = !{i32 6, !"mod6", !0} + +; Metadata -- Check `distinct' +!11 = distinct !{} +; CHECK: !11 = distinct !{} +!12 = distinct !{} +; CHECK: !12 = distinct !{} +!13 = !{!11} +; CHECK: !13 = !{!11} +!14 = !{!12} +; CHECK: !14 = !{!12} diff --git a/test/Bitcode/compatibility-3.8.ll.bc b/test/Bitcode/compatibility-3.8.ll.bc new file mode 100644 index 0000000000000000000000000000000000000000..3894b37890f3f8eb3cf1ea5f1bbec265b4d73901 GIT binary patch literal 15072 zcmeHtdt6gj_U}H)Avur`PDr#t9-aVNw6Pu_3KY~65-`@NL8#T%855w?wqoO>R{O9g z4<0I15XWNebg){-PCIw-*>>8o381Bl7Lm5JI!>sJKWFN6u-Xotv3l1&Cqd}+{_dSW z?&tn<_Xke)UVHELU3=}d)?Q~P7yWlB5EL!^`|m?Yju4S=_FtR^gb1LOD%sRIOO9Rs z+x3}KEJOw-A-xizeJX?$9tKIEt$}~JJEhUoNzRec89CbspK?M36_-SADdm|0N&YrP zKB>;oW>dPkQ5l|EYlD_C7uLRx;xh6Ftf~feYKPra za7gtC9d+waOCLw0h80W{%JxQA5#(dsiZm5tm6n^`$TW_N-%L`ye4jmyYms$UmlBd` z{B+ueY6G&@BGC$IKgk_%ua`LbIF4}0;%n2;@1uQM^pUJIiho3Eia-b5`z8J_xW$A^ z7Qgu(ss~s(Of9mG>g0djhNADRjjs9**USz2_}ahWnw;z7T(~j|mAAUD+=AK*=u?NZ z{|8J&bbRgKaYc@zr_+u>T$MUjFl|AB80_O}1GpB$A9U-yxHcYDNKGz; zUy1g`-NZzc7hjt>glhyWZMn#hu4H;dhTIp9{UL_Z?EzV7v^afVG#M{Wx5w8`7pL!^ zPOlWFyDFKB;&dK_bcw`ZCG(|7M9S&(YLPft$y^Qro#(nmApcSK{*dG=&82cI+AQS_ zUiEEI^%Yvdd@YV=l+!KiMJDO0L3@lp`+aX-w>c+hj`vBEV3+eki}FVMl0;EEK>ip} z{sD(KAaX{rTqXBUk!MRZiiA~cWY8(umoYNO=MKIN!^d#(s7IEf73Ze5e8JUT@G;7XWGSoHc_WE98+Fo=?~rLc znay+ybVW}jA7}N8p)1}-ec{LtLRVHZ?T0SaL~=E&Z-%Z!8}(P1CD(Xzo9Q5Q#Y`lh zVfB5`HQq-3)6o``zks4N9(yxmYhm?tRivayrtwL@8xh*Xz(0IuBvVmLc@?Qi-RpzL zCExA_ZLF=KPT?cx(ZS;hCJwD39h}6BEbMH)fk<4Mnq6=FzDHZsHn5=2%$WRqtV;7r z;mglGwmHrD&D~e^H|4ap)bHVmDFZw)txL`2403c1!^N&4TN0Q2bX@hj! z;YKOhn_kE2Zonf?n^DJ7MtImu;IVWqJeF^V2Yq-ODeKLsWym;|V^h$ChTS`#c$K=Q z_>KA|(Tt2#cS1QA{rPs@a?ki|WXOdEMx`qYn@{QDfDnp)H;`2(AC%aMH7*hq` zaFW@x+jRegZf0LB-EfYTn6{(MuSMzim{37+8Bx&iM)I4E2>hZyh};8F`ZX?|TU(G#Gw-?iWGYznb9LI_^4}>l)=PRHl*Q#m{qvpx z5wRoxGRJYeY_5I{r)RjTX$`yE^Ai#hD0^uf@L!%DN$x{+46>61;d#sBC+3VZ`CFp4 z%S#@MAiR^8Cei!GsM4&5qF&n7ku%%B^)E>ccmJ&6L^j$qUrPTa5AB>!(tp*Tk#gE} zXBmm!=y^PjB+30x=}dIBnyf!Y)pew;(3uc4QX)vOk+NnkuIB0G^3|058JE}Ps(DVA z8F@DQeRFPuIlJ2%zg;@h*Ph*N&h<%W)JgBFbITr0xVSs9Q=f1p5Z$Lw80b$p=}fxf zv=!Jc4XXaesrtE?l|j|tIn}o)=4ylL60N#nS6yc(PJVUO`kHl2jjKhT)m-CRUbDKn zW^H%PYF!igVHnPwP&da@7UpkKOMm@U@|cg;c~tRMnW%h8A;nr#Yvg-LM_6<-Yg5 zxo<7+b0=Qiop_-o@uWMc&7IH&PiGY`cePgSl&_`atJl{&yWG2>rN*VJd8&H@Q>~1f zlu=IWR+EU7B@(F0IU8}MK{XoGJwqa!j3v-ZCL8is=ro8P*GZ!7)fohOGhjp9ifj#X z#dnkFYPFF-ADHGLziTm&68cDFsF_Znj{`tjyBceqAFXBB8Y5Eo(SYdAR~mkP_7O}A>lZ7$Wy3X3F2X=hx>3HA&O6|W3Ey{ zU4q%7s}2&@B+Lu<@z8AbsGLK8h=0p2Y8g71}l+80V5s@(W38+M3iDp zGTSEkB~^FSakpg8l)g>=>bx~ryihT}nj`2zX!81x6T%&^fQCm^h{2q3adc+N5i8aa zVh46gkt5vFebYrCYq+J{a2b{qZechf=@AGRju&+b!eh8Fe*umUhNodTF5D2{7-)$z zF&u1VsD!}o0Ia8B;4ZlTaysMhWh*svtxL~ zgj$ZyJ#tQXYrq6{;H;EELLve!-8WajnBh%AD9Q~tz?j35SLZzgaADcZNi&dyBgBCs zT&vgsW3B->N2ulKYzH`FsKpNS16Hw38pVYAlp8Dr74{zRo!0;^3~o*;LXt2z zz@@?JLg27EEst74OdOr&C=Qi`TI_&2fZs$RQxldG4z5>WfM5o~z)pCl7nS25sT`pXKO76H^Y)>zUy0T= z+&RCj(;GG1g5XdTai^vGrWM>LT$CG@g13fCb>4wdJePz!Lc$C;{S6sf|5jna>LrNnE;_W?+@W|@M(T^*uJnZF<}dW zF1#0aMnYg5(ZZo4#n9hHRrxN~7n(tjtNzA_)#ILUD990o$8**nS6WXN5X> z{eoGD7$NQVqovgoBzH$z99l<&h&qxUj}v=m90J0Zd=AGMY~01bzI0G$(ZDG=kw zYF`sOYT`l(h3+Wf-;%)4II7e8y z8qI@UZT3=r8OYgXB7?hN@?}PXWbkI-hw)e{JiZh&g#ivF57Oq;q6UJ2LtL)rGoS-c zu@f9ZYiJ@{ifCcVa@+w^@J>;9%6`C*;3;sU;=oh@Q>>47 z5)9&*6XSTqY&sxg(Eif5AYQcTo`OD2V^v9qO}}NUW;jYQEUN$G?BuSCcl3H zT`9wpqT-$a>n_B+TDDTZlSGfE9flvoe{ zq4A>?x~Q^dhT5I~+TZF|RKu8^r)4Jnbfxv6jV6oqXTK{fJmg&diqpf?MQu8ob@1hA zsaCBa-6hkNP5CP*Pqd$OPyR)8;JE2t<&)-y-=ak*-cxDzPb)1u^u(ISo=thP?4C90 zWs2NgyGoTOzO-o20gw%c-Asy4=;%+V&=NCh&Dp;8x_n-~VZD4!^D5RKWm23=L9}L=6nRG|uMSVh_KC#W2RKae_g?DwhA3QA0gNs6+G`DL|yUrnhcDXzY zZV=$f*SH#LTn_oVH2J!r2w?j(U$cy=S*64G3mclt61s?Zf>x0>&J#hcrey>~-H%_>LD(>fe;8bQ}M-YZ`8=zOTVDZ-3`A9?iX zujK(6LCkmq`tf_2B5HLStWo~VVpp?y28h~f&gpLV1QIUxCyrHqNvpm=$jOMjz;vpm z*fn9E+)kg?I-vr^$^8F*tn2@m`oSlwhHN*=kf)aJa$CFNm4&D)meQ$6;ccnH;Gz_S zv3HH6@RCK@x|GXbD!FE>JqOc-;$)EUn)4$b`Tr@8YT%|JO$L0lQShH?S49-X78H%G zDjIjZC@ErLa>2rhRSPE{UwCgsF`NjOWK=|yjv*!NO1@+_PZTgfs+|y}V+GREJr2Tx zNmOCfScgC=f89Y8G9-+uh*~6)R{Yu#A!Eogne0)5r|aT$zZ`?|*$T({9f%4vyRR*g z3Z1&eB>pVaEsnsS)w;#Pq!YTua-lzNu~q1gTO7$C=#N``KZDG&Hd+}+S=e$$8)$Gl zP?PLL90d%UWU_HUhR?!rRDlDXlU0u^2Ri4UF^$)PMbo!3JTlU@C9qO6sHSW06kS^UfrGe^N6Is)L?r6C7+4MUDSmnfFrne>} zR5vP&A*NG{+^ZC+lIu&`oI^*S3fJDQ3fJCyK3sd(9j^U;L%81&KOHu*(u43xMAcjWm$`15)>zc z&^_=8IB%E+E{;?F?Lc7Q=kbfbe%EyQV*J{#ZN3H63zDcz^-F_yx3HSskwU{KH1uQJ ze#N)h$R*;43jNKO5zXk?Ah-OjP30l1=Un}R?@aT{xHw>PoKir-kSrYmA#U-4k@q_WX3st*e|hf zYI8o5GGDSW|G@X)vT`K1jPI1jcS_$qQx)-IcB^y-PsDW)@$l>vo?U^n@^Aby{MU`& zK?K!0kfx0-bs&b4RqAOH3y;qR*hADPZn=OBSsY-`6Ji4Pg>pN&mi?q#eqdFDA72_A zQnu0ZL!?C2q$AaLM>Okxy_)&*xpsZRb#;v^;hYXdCHpeuL+MYl6u~}9Q=9w6+o4~x z^h=Ht5_5#%!EU96u%9y0Jp<=vw}$I$<)=9b{Ry|*^Myq8-2YW0%sWKJDEMO&L9Wi-{{0+EH{WDv@O znueS!tPL-@WSRtJsy*U<<9!D4spOL^h+hw8`I>eOKVBrI18FU*B+^$iq~GAqSj%eN z>8n}Nls>mbnMlv(Q&Z#?CgB8htzlC6eThDN_KpXP@5ETX@p)+-vbE`#bfzYJJBF38 zku~M|CRg9ne#)Pku&v70w(3`&v)O8?;n4<6iDCO{LX``%LzUiY1BV)&=MNylQuuu2 z7C|jBZ0`;OOD%jJMVz&%D^5$i%pZ>eVO!`;%E=(%y6ng67SKZzvz7|vfykc((GZ4Z@ON9k7k z{IRLB*HcTkBok$0)r;FZTVAQSx@w}m+dS5!O`G(ams8taj1=aNh+)tY{ZBlfO_71m znWg^Pe&Cyxwuj4ADz&TkPO!@EpL2NZBU_f}a2Q1YD<1Hsg=HJ|qrK^c$ipo65Px_P z!=N(CGW|ol@(adWq{OEV_O*2euEgiqb--^|W7iallR@ZSsD*i9y9J*_dm`oR%Pw+H zWDWa;i}bH(kCnqCIpR?C79BdI-jYQ6Z5>m^;1y(q;AIpdnlBp@znaT*JKT}Jq_<@5 z^*i7v2>EXxuWpO4dW5lSgt&&|&N>5~S3SjUyp>r{F~y#TKMah0t6rhxv`dcgrWrsv zYH(#2=+#Z-pGo9&0T6Z=XyZNump4Wa97KKM>$|_wau{n&3^}9D+%H5TTEa?(XngZ?5WXQFWQ~yJzUH#$lKkjzF zM0HJ)tld`lv&7|neI2qv^MbK-YmVls}-DTPY zB!Qj^pBi$Gpl>`JjD~wV1tB4JQR(tjA$EDRYq(f}R69&c0Md1tmqv%k&i74vl3=@H znd`C|nnDCE(vXP*nvn3}cdHs#USkT~;UcRcOcyP4>k&lfM;$om{3B5Zp-7H3B+3PM zqF7#A2Tlr>x?08am5KU_?wXe14jr;rTU9=`)Q->F*IHCUvVc_sxeUS{WhpXvO>i(V1Ff=v&4&@|bP2e3#&&bJOp2Wq^Q|yA@`?{< zdw{jN2->(fnSYNRVEmzcz!B5WL#hR=+%tUU3{lkYX_YHf{THoTl~F1r3_sAS)v zlEIiDbN6v!uXMhSsUZ$&H}lz2xSXM6Dg6p}f?;)N>F;zaPK#rM1dJ7yl{=W9&;h$G z;Thfbj(a-->GCy@>4`RU)L^%2m^6@Hlpkvy>)MB7mp$3`) zzOeGS)9R#iwpTs&ihT3lO}`los;;)Et~gW!j4Bw6zR(ig=ZNlQqPv62t`=pdL)pP7 z{lV+^tvr`;_26187!)THjzyx4>%hkAbTnu_kg&Z|RL@8fCF>A=bN8@}>p7})AFhle zH=WN=E)3sKVt!(7E}kz~{#1L3rKpqG3)_n<6rZeX&SiWa>awcV$@tV#3EY!4dzbiK zFje3!IyiWIUUB&;N#K!_l7QfmP8fhMY{PN$Cwc4A8AOxboaU-`z1)a~G(WA@@iniL z~>p%nj zX|;lsdz!rug`{M$lyQKQ)k43-j6s5khE0oUP?J&;oKwC!2d798#G7FmH z6v~gapC9C0OAeuAyqE>gle6(XNbh9>FWifi{VE`&%HgjJoeZo=SXVpPkgW_cwNxPC zowoM_4xFtEu?5@MNS%E+N{*k_)&KEcVLSW3uvhr~K|_kRf{p)wYm1N3*j}(LdP18= z;3W0O_5wB;vX{kSdztc6_OgmW=(k{`3srP-xo2+zW9b~Q=5VzQyAz|*_z#%+FO3rC zx5U|lC3PQUOIj_yV2Pz%-4rzTkjAEE>b3#P%-1f-EV_+F5AXF$hT0F(pIx#vJtZ?% z{V7}et)Uj#d^_dVQw!5KT5Kh~sGU}CD}SG`_DdC|#-rcLn5q~1JZ7MXtD<+N6GOOvC~+d3ROiMjoEYp>h5R(f(G`!Bn`-dM1m)z44)er(Up zj{eW?OQdiAn0S6)#F$$eb*%b<4mdKH#r|ac^T&u*tM4NK{#{87Z}~31MSDzdm9yD9 zoHDj*t5MNI%X@4SHIb@J)U;qJ&!$6m@KA#NG#az<(#;t4ocU5ir!VeV{*YnJrMYm5 z#oE>DCI!*VPmIW{oW&{|<79bNw~^XE6kBTSn6}e{e{)Hk9*`E14p7y1xkFv-dB1|JGMSPwMMmRCwx{>KB-H&Nw{*=4o=a zl-WtT09D*m57RRA{`{pr$1J=#Pa5VU!)-RFv3yBU|17m$T~u(hE@hs_ae$c9U;HUa zDx625HrEF_EBlx@2~%d}M4j!cDH~Gsq|HyEKghHcjvX_TPM?MHJU1RZoDb!V+&C(ma?@D zax+-SKvwU;w4&Rdg+ta%b&=HYohMFUh)#KauzGD&D-)N#{AvHMJF1NMH>tkt`hlrj zCR2Y6!Owt81e-x#K2o92F3D6kPMTD;V5vqu&0jjHp+DYYw)is~(SF7=C9LmysexkR zeo-{!v7f7WM0X0&>kg`O@K^^Ffx(+%^-yCG6?Dw4aFZLhuL1VrWzeVTr zL(QV?th#V?x2fudYyX^;SeuGYB~#;)?1uC^20ms`+UVRx%5+{S+yab@9bRAFusETBMgaeZ<54 zBjy%;^?~Mx=p%;e*R?ad9cm}#IU=`U^%x0Hth#5w;@d4>EN(^nc(p8fo@F5A?aJ7Z z0bpa%S7XPuYByf8bTs5dJKq3>%;iit!`s~ZQBZr!W88d>>Hr1D$xEtk(~Sd0zsJ`1 z0y^DFH~v{}J#$@Nl4ba?>`8h7N2iH-m^AO zyV5_9b%vXvNJbic+!I{MP;57&*`~g|)dzT_4>mu`VLzRvE~1-U z%Zv2h2Zp!^MnM}oL{mEGs9vMPfoIPdqE&U$H^b+fqX{%umxi3;#M4^5$-8e7KWKI$ z!>K3r=dR_(sEN~qSY}J5bPG1~yS7Me6=^MKW{=I%i?(c#8?nM7ZuXFtrmyAA3(6&} zh7YQ2AO1bhLK@r0+hO5{Z^;K2{sjG<8Br`h%Wz7#Cp+4!9d^K@OyvBOd0giAoR(-_ z*8BS@5S>Hr@WR588|r@Z1#VKoM0Dz#hdbBaJY%+SnSwr7?W*7w4k>%A)Q)NN?WG$fQTE~$*5aI~Yoi4>J<)<@9IrP1Vh{ZzB_5e)^PID4x@{W^s3y(# z$15Lp`iqBRXrk^{>PGX@rr4sN}tI%Ij!ZP1NwP?PU{%G|GwXPB_E85$Jbmx(%gj;X$|O>u!$45 z>BP#XFM*37g~Yn<6NoruRK^dRQmJQ3K62prvw2z+!wZ34c0!AT@F2B~(LD~!QKuIb zrToxTMft9!f?3U+p!S-g3}7RQw!HbqC8ve+@)*hbeC57+SsEO>C1v{4j=vC}LWm!) z_7BeXxvd)Y_q8v6wUWy;mkePax-l1-!4T4(@=xmU4F_Mj^-|upbgQV-nQ+WpzU%GE z$8G(y&V752rI+5aNnno!+H;=R8auAXT5O4g)NdR3?l+m+jq}h!9WR`*#TNCVHXQw= zMW{DpXV`}avYS4VJMb!C>J7{MYbo`#T6xws_5q02)CsrlSdgtdrz`hAAnf8S8vIs$ zmLh3`FJHbkH`RKGi6*Rd8)Oz(CUxCV%iE5BiJB_os-{x+t^8SGzryqC`Iq1TX!&Yv z1+cvGUcJ!uOAD7)|d{o``wZ0oS;9?ML$?EQrJ106rSvhhq)m9=9$Q-9rB zI37)zdwd99Jr(*$zd3ESe?~iDQ+cUvlOS^tPW*)y+w@6@IA$_hNHOy6U&*DL9}smu z9JiLd&Pj)a1CYK;-?tOwZ9TUG%X{_6Z?U}ZRT{SRi|f!p(Mz*)Yy(*NL)RZ2aDZqZZPW2-1n%R9soWpTd(vbl5NY;IkgUwbTQ9HWl2WbSlv#gM=l zUNosYE8lz`UGY_gYZaeMZ2mTeV27eJiBMZHF|XV@|E0FX~-X^a^-YS z`99+Q{@EmJoNsP^0xcZccEduJ&*%X^1{klwGEf|w-e(H!y^v3~oqqz7h;28l#RJCb zIePrHTq?B)#~zJ-46Clbd(5rlU%h~%BSd$~lO%7>G!7rZ%|A=6zHPBa*nG~k>a9j0 zwYqytf6S@;rCT-gHYd_?Ba#qhAbV>$wN1?XV=QX^d+To>E=47Rqi!|&4`xdoLE;q1 zx{R20Ryp=HF?U2;-jFW^O&lAe*IWxlqRz@)r%H$Xtffav`6_kQPpbLS)%O0B(-y-A zDTWt#%F}27!OmDHO}ehObO_Q4o7V$=iA6X;4giXD1sEnYqJ*K1ih&D{ex)L+|^@K_gHJ0?;$|UwNUd5EESXB z^#xlII47Mt&kJ9lR+yQs(h3!NL)Z!S53N1_+j81{G(#OSY5^m7GJ$^qa8fC$?+Fv6|jGI=>y-KUog#|7Z26l2xk3|a#|bd3CI$vW+j&Ffp_H} Gm;VXdp{!s4 literal 0 HcmV?d00001