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Constify the machine instruction passed into the

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"is{Trivially,Really}ReMaterializable" methods.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51001 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2008-05-12 20:54:26 +00:00
parent c2616e43fd
commit 9f8fea3531
3 changed files with 5 additions and 4 deletions
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4
include/llvm/Target/TargetInstrInfo.h
View File

@ -67,7 +67,7 @@ public:
/// isTriviallyReMaterializable - Return true if the instruction is trivially
/// rematerializable, meaning it has no side effects and requires no operands
/// that aren't always available.
bool isTriviallyReMaterializable(MachineInstr *MI) const {
bool isTriviallyReMaterializable(const MachineInstr *MI) const {
return MI->getDesc().isRematerializable() &&
isReallyTriviallyReMaterializable(MI);
}
@ -81,7 +81,7 @@ protected:
/// return false if the instruction has any side effects other than
/// producing a value, or if it requres any address registers that are not
/// always available.
virtual bool isReallyTriviallyReMaterializable(MachineInstr *MI) const {
virtual bool isReallyTriviallyReMaterializable(const MachineInstr *MI) const {
return true;
}

3
lib/Target/X86/X86InstrInfo.cpp
View File

@ -760,7 +760,8 @@ static inline bool isGVStub(GlobalValue *GV, X86TargetMachine &TM) {
return TM.getSubtarget<X86Subtarget>().GVRequiresExtraLoad(GV, TM, false);
}
bool X86InstrInfo::isReallyTriviallyReMaterializable(MachineInstr *MI) const {
bool
X86InstrInfo::isReallyTriviallyReMaterializable(const MachineInstr *MI) const {
switch (MI->getOpcode()) {
default: break;
case X86::MOV8rm:

2
lib/Target/X86/X86InstrInfo.h
View File

@ -260,7 +260,7 @@ public:
unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
bool isReallyTriviallyReMaterializable(MachineInstr *MI) const;
bool isReallyTriviallyReMaterializable(const MachineInstr *MI) const;
void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
unsigned DestReg, const MachineInstr *Orig) const;