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let us get some do what I meant not what I said stuff checked in. You would think the alpha backend would be 64bit clean

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25040 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Lenharth 2005-12-29 01:06:12 +00:00
parent aa6ed8c7cc
commit a117b187f7
1 changed files with 2 additions and 2 deletions
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4
lib/Target/Alpha/AlphaInstrInfo.td
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@ -44,12 +44,12 @@ def invX : SDNodeXForm<imm, [{
def immUExt8 : PatLeaf<(imm), [{
// immUExt8 predicate - True if the immediate fits in a 8-bit zero extended
// field. Used by instructions like 'addi'.
return (unsigned long)N->getValue() == (unsigned char)N->getValue();
return (uint64_t)N->getValue() == (uint8_t)N->getValue();
}]>;
def immUExt8inv : PatLeaf<(imm), [{
// immUExt8inv predicate - True if the inverted immediate fits in a 8-bit zero extended
// field. Used by instructions like 'ornoti'.
return (unsigned long)~N->getValue() == (unsigned char)~N->getValue();
return (uint64_t)~N->getValue() == (uint8_t)~N->getValue();
}], invX>;
def immSExt16 : PatLeaf<(imm), [{
// immSExt16 predicate - True if the immediate fits in a 16-bit sign extended