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ExecutionDepsFix - Fix bug in clearance calculation

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The clearance calculation did not take into account registers defined as outputs or clobbers in inline assembly machine instructions because these register defs are implicit.

Differential Revision: http://reviews.llvm.org/D22580



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276266 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Marina Yatsina 2016-07-21 12:37:07 +00:00
parent 367e93b45c
commit a264c851a4
2 changed files with 10 additions and 2 deletions
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2
lib/CodeGen/ExecutionDepsFix.cpp
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@ -520,8 +520,6 @@ void ExeDepsFix::processDefs(MachineInstr *MI, bool Kill) {
MachineOperand &MO = MI->getOperand(i);
if (!MO.isReg())
continue;
if (MO.isImplicit())
break;
if (MO.isUse())
continue;
for (int rx : regIndices(MO.getReg())) {

10
test/CodeGen/X86/break-false-dep.ll
View File

@ -199,3 +199,13 @@ for.end16: ; preds = %for.inc14
;AVX-NEXT: vmulsd {{.*}}, [[XMM0]], [[XMM0]]
;AVX-NEXT: vmovsd [[XMM0]],
}
define double @inlineasmdep(i64 %arg) {
top:
tail call void asm sideeffect "", "~{xmm0},~{dirflag},~{fpsr},~{flags}"()
%tmp1 = sitofp i64 %arg to double
ret double %tmp1
;AVX-LABEL:@inlineasmdep
;AVX: vxorps [[XMM0:%xmm[0-9]+]], [[XMM0]], [[XMM0]]
;AVX-NEXT: vcvtsi2sdq {{.*}}, [[XMM0]], {{%xmm[0-9]+}}
}