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https://github.com/RPCSX/llvm.git
synced 2024-12-02 00:36:36 +00:00
Convert many of the virtual TargetInstrInfo methods used as helper
functions in SparcV9InstrSelection and SparcV9PreSelection into regular old global functions. As it happens, none of them really have anything to do with TargetInstrInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15278 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Brian Gaeke
parent
1b4aeb5cec
commit
a376ee2d13
@ -41,8 +41,7 @@ InsertCodeToLoadConstant(Function *F,
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MachineCodeForInstruction &mcfi = MachineCodeForInstruction::get(vmInstr);
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TmpInstruction* tmpReg = new TmpInstruction(mcfi, opValue);
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target.getInstrInfo()->CreateCodeToLoadConst(target, F, opValue, tmpReg,
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loadConstVec, mcfi);
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CreateCodeToLoadConst(target, F, opValue, tmpReg, loadConstVec, mcfi);
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// Record the mapping from the tmp VM instruction to machine instruction.
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// Do this for all machine instructions that were not mapped to any
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@ -96,8 +95,7 @@ ChooseRegOrImmed(Value* val,
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// TargetInstrInfo::ConvertConstantToIntType() does the right conversions:
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bool isValidConstant;
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uint64_t valueToUse =
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target.getInstrInfo()->ConvertConstantToIntType(target, val, val->getType(),
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isValidConstant);
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ConvertConstantToIntType(target, val, val->getType(), isValidConstant);
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if (! isValidConstant)
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return MachineOperand::MO_VirtualRegister;
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@ -45,10 +45,10 @@ static const uint32_t MAXSIMM = (1 << 12) - 1; // set bits in simm13 field of OR
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//---------------------------------------------------------------------------
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uint64_t
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SparcV9InstrInfo::ConvertConstantToIntType(const TargetMachine &target,
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ConvertConstantToIntType(const TargetMachine &target,
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const Value *V,
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const Type *destType,
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bool &isValidConstant) const
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bool &isValidConstant)
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{
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isValidConstant = false;
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uint64_t C = 0;
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@ -426,10 +426,7 @@ SparcV9InstrInfo::SparcV9InstrInfo()
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InitializeMaxConstantsTable();
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}
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bool
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SparcV9InstrInfo::ConstantMayNotFitInImmedField(const Constant* CV,
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const Instruction* I) const
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{
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bool ConstantMayNotFitInImmedField(const Constant* CV, const Instruction* I) {
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if (I->getOpcode() >= MaxConstantsTable.size()) // user-defined op (or bug!)
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return true;
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@ -457,12 +454,12 @@ SparcV9InstrInfo::ConstantMayNotFitInImmedField(const Constant* CV,
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// Any stack space required is allocated via MachineFunction.
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//
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void
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SparcV9InstrInfo::CreateCodeToLoadConst(const TargetMachine& target,
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CreateCodeToLoadConst(const TargetMachine& target,
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Function* F,
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Value* val,
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Instruction* dest,
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std::vector<MachineInstr*>& mvec,
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MachineCodeForInstruction& mcfi) const
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MachineCodeForInstruction& mcfi)
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{
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assert(isa<Constant>(val) &&
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"I only know about constant values and global addresses");
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@ -541,7 +538,6 @@ SparcV9InstrInfo::CreateCodeToLoadConst(const TargetMachine& target,
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}
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}
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// Create an instruction sequence to copy an integer register `val'
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// to a floating point register `dest' by copying to memory and back.
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// val must be an integral type. dest must be a Float or Double.
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@ -550,12 +546,12 @@ SparcV9InstrInfo::CreateCodeToLoadConst(const TargetMachine& target,
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// Any stack space required is allocated via MachineFunction.
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//
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void
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SparcV9InstrInfo::CreateCodeToCopyIntToFloat(const TargetMachine& target,
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CreateCodeToCopyIntToFloat(const TargetMachine& target,
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Function* F,
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Value* val,
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Instruction* dest,
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std::vector<MachineInstr*>& mvec,
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MachineCodeForInstruction& mcfi) const
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MachineCodeForInstruction& mcfi)
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{
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assert((val->getType()->isIntegral() || isa<PointerType>(val->getType()))
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&& "Source type must be integral (integer or bool) or pointer");
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@ -611,12 +607,12 @@ SparcV9InstrInfo::CreateCodeToCopyIntToFloat(const TargetMachine& target,
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// Temporary stack space required is allocated via MachineFunction.
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//
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void
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SparcV9InstrInfo::CreateCodeToCopyFloatToInt(const TargetMachine& target,
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CreateCodeToCopyFloatToInt(const TargetMachine& target,
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Function* F,
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Value* val,
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Instruction* dest,
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std::vector<MachineInstr*>& mvec,
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MachineCodeForInstruction& mcfi) const
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MachineCodeForInstruction& mcfi)
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{
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const Type* opTy = val->getType();
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const Type* destTy = dest->getType();
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@ -662,12 +658,12 @@ SparcV9InstrInfo::CreateCodeToCopyFloatToInt(const TargetMachine& target,
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// Any stack space required is allocated via MachineFunction.
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//
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void
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SparcV9InstrInfo::CreateCopyInstructionsByType(const TargetMachine& target,
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CreateCopyInstructionsByType(const TargetMachine& target,
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Function *F,
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Value* src,
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Instruction* dest,
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std::vector<MachineInstr*>& mvec,
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MachineCodeForInstruction& mcfi) const
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MachineCodeForInstruction& mcfi)
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{
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bool loadConstantToReg = false;
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@ -697,8 +693,7 @@ SparcV9InstrInfo::CreateCopyInstructionsByType(const TargetMachine& target,
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if (loadConstantToReg) {
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// `src' is constant and cannot fit in immed field for the ADD
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// Insert instructions to "load" the constant into a register
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target.getInstrInfo()->CreateCodeToLoadConst(target, F, src, dest,
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mvec, mcfi);
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CreateCodeToLoadConst(target, F, src, dest, mvec, mcfi);
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} else {
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// Create a reg-to-reg copy instruction for the given type:
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// -- For FP values, create a FMOVS or FMOVD instruction
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@ -756,14 +751,14 @@ CreateBitExtensionInstructions(bool signExtend,
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// Any stack space required is allocated via MachineFunction.
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//
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void
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SparcV9InstrInfo::CreateSignExtensionInstructions(
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CreateSignExtensionInstructions(
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const TargetMachine& target,
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Function* F,
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Value* srcVal,
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Value* destVal,
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unsigned int numLowBits,
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std::vector<MachineInstr*>& mvec,
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MachineCodeForInstruction& mcfi) const
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MachineCodeForInstruction& mcfi)
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{
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CreateBitExtensionInstructions(/*signExtend*/ true, target, F, srcVal,
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destVal, numLowBits, mvec, mcfi);
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@ -778,14 +773,14 @@ SparcV9InstrInfo::CreateSignExtensionInstructions(
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// Any stack space required is allocated via MachineFunction.
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//
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void
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SparcV9InstrInfo::CreateZeroExtensionInstructions(
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CreateZeroExtensionInstructions(
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const TargetMachine& target,
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Function* F,
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Value* srcVal,
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Value* destVal,
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unsigned int numLowBits,
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std::vector<MachineInstr*>& mvec,
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MachineCodeForInstruction& mcfi) const
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MachineCodeForInstruction& mcfi)
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{
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CreateBitExtensionInstructions(/*signExtend*/ false, target, F, srcVal,
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destVal, numLowBits, mvec, mcfi);
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@ -592,14 +592,13 @@ CreateCodeToConvertFloatToInt(const TargetMachine& target,
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castDestType));
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// Create the fpreg-to-intreg copy code
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target.getInstrInfo()->CreateCodeToCopyFloatToInt(target, F, destForCast,
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fpToIntCopyDest, mvec, mcfi);
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CreateCodeToCopyFloatToInt(target, F, destForCast, fpToIntCopyDest, mvec,
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mcfi);
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// Create the uint64_t to uint32_t conversion, if needed
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if (destI->getType() == Type::UIntTy)
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target.getInstrInfo()->
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CreateZeroExtensionInstructions(target, F, fpToIntCopyDest, destI,
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/*numLowBits*/ 32, mvec, mcfi);
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CreateZeroExtensionInstructions(target, F, fpToIntCopyDest, destI,
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/*numLowBits*/ 32, mvec, mcfi);
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}
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@ -793,9 +792,8 @@ CreateShiftInstructions(const TargetMachine& target,
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if (shiftDest != destVal) {
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// extend the sign-bit of the result into all upper bits of dest
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assert(8*opSize <= 32 && "Unexpected type size > 4 and < IntRegSize?");
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target.getInstrInfo()->
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CreateSignExtensionInstructions(target, F, shiftDest, destVal,
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8*opSize, mvec, mcfi);
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CreateSignExtensionInstructions(target, F, shiftDest, destVal, 8*opSize,
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mvec, mcfi);
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}
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}
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@ -826,8 +824,9 @@ CreateMulConstInstruction(const TargetMachine &target, Function* F,
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if (resultType->isInteger() || isa<PointerType>(resultType)) {
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bool isValidConst;
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int64_t C = (int64_t) target.getInstrInfo()->ConvertConstantToIntType(target,
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constOp, constOp->getType(), isValidConst);
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int64_t C = (int64_t) ConvertConstantToIntType(target, constOp,
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constOp->getType(),
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isValidConst);
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if (isValidConst) {
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unsigned pow;
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bool needNeg = false;
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@ -897,7 +896,7 @@ CreateCheapestMulConstInstruction(const TargetMachine &target,
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Constant* P = ConstantExpr::get(Instruction::Mul,
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cast<Constant>(lval),
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cast<Constant>(rval));
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target.getInstrInfo()->CreateCodeToLoadConst(target,F,P,destVal,mvec,mcfi);
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CreateCodeToLoadConst (target, F, P, destVal, mvec, mcfi);
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}
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else if (isa<Constant>(rval)) // rval is constant, but not lval
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CreateMulConstInstruction(target, F, lval, rval, destVal, mvec, mcfi);
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@ -980,8 +979,9 @@ CreateDivConstInstruction(TargetMachine &target,
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if (resultType->isInteger()) {
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unsigned pow;
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bool isValidConst;
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int64_t C = (int64_t) target.getInstrInfo()->ConvertConstantToIntType(target,
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constOp, constOp->getType(), isValidConst);
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int64_t C = (int64_t) ConvertConstantToIntType(target, constOp,
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constOp->getType(),
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isValidConst);
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if (isValidConst) {
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bool needNeg = false;
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if (C < 0) {
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@ -1089,7 +1089,7 @@ CreateCodeForVariableSizeAlloca(const TargetMachine& target,
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// compile time if the total size is a known constant.
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if (isa<Constant>(numElementsVal)) {
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bool isValid;
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int64_t numElem = (int64_t) target.getInstrInfo()->
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int64_t numElem = (int64_t)
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ConvertConstantToIntType(target, numElementsVal,
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numElementsVal->getType(), isValid);
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assert(isValid && "Unexpectedly large array dimension in alloca!");
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@ -1567,7 +1567,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
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retValToUse = new TmpInstruction(mcfi, retVal);
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// sign-extend retVal and put the result in the temporary reg.
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target.getInstrInfo()->CreateSignExtensionInstructions
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CreateSignExtensionInstructions
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(target, returnInstr->getParent()->getParent(),
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retVal, retValToUse, 8*retSize, mvec, mcfi);
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}
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@ -1637,7 +1637,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
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if ((constVal->getType()->isInteger()
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|| isa<PointerType>(constVal->getType()))
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&& target.getInstrInfo()->ConvertConstantToIntType(target,
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&& ConvertConstantToIntType(target,
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constVal, constVal->getType(), isValidConst) == 0
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&& isValidConst)
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{
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@ -1889,15 +1889,15 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
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? new TmpInstruction(mcfi, destType, opVal)
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: destI);
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target.getInstrInfo()->CreateSignExtensionInstructions
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CreateSignExtensionInstructions
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(target, currentFunc,opVal,signExtDest,extSourceInBits,mvec,mcfi);
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if (signAndZeroExtend)
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target.getInstrInfo()->CreateZeroExtensionInstructions
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CreateZeroExtensionInstructions
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(target, currentFunc, signExtDest, destI, 8*destSize, mvec, mcfi);
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}
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else if (zeroExtendOnly) {
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target.getInstrInfo()->CreateZeroExtensionInstructions
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CreateZeroExtensionInstructions
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(target, currentFunc, opVal, destI, extSourceInBits, mvec, mcfi);
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}
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else
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@ -1955,7 +1955,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
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MachineCodeForInstruction::get(dest);
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srcForCast = new TmpInstruction(destMCFI, tmpTypeToUse, dest);
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target.getInstrInfo()->CreateCodeToCopyIntToFloat(target,
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CreateCodeToCopyIntToFloat(target,
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dest->getParent()->getParent(),
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leftVal, cast<Instruction>(srcForCast),
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mvec, destMCFI);
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@ -2067,13 +2067,11 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
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MachineCodeForInstruction& mcfi=MachineCodeForInstruction::get(divI);
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divOp1ToUse = new TmpInstruction(mcfi, divOp1);
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divOp2ToUse = new TmpInstruction(mcfi, divOp2);
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target.getInstrInfo()->
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CreateSignExtensionInstructions(target,
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CreateSignExtensionInstructions(target,
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divI->getParent()->getParent(),
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divOp1, divOp1ToUse,
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8*opSize, mvec, mcfi);
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target.getInstrInfo()->
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CreateSignExtensionInstructions(target,
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CreateSignExtensionInstructions(target,
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divI->getParent()->getParent(),
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divOp2, divOp2ToUse,
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8*opSize, mvec, mcfi);
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@ -2109,8 +2107,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
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unsigned opSize=target.getTargetData().getTypeSize(divOp2->getType());
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if (opSize < 8) {
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divOpToUse = new TmpInstruction(mcfi, divOp2);
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target.getInstrInfo()->
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CreateSignExtensionInstructions(target,
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CreateSignExtensionInstructions(target,
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remI->getParent()->getParent(),
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divOp2, divOpToUse,
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8*opSize, mvec, mcfi);
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@ -2251,7 +2248,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
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if ((constVal->getType()->isInteger()
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|| isa<PointerType>(constVal->getType()))
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&& target.getInstrInfo()->ConvertConstantToIntType(target,
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&& ConvertConstantToIntType(target,
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constVal, constVal->getType(), isValidConst) == 0
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&& isValidConst)
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{
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@ -2328,10 +2325,10 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
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rightOpToUse = new TmpInstruction(mcfi, rightVal);
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// sign-extend each operand and put the result in the temporary reg.
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target.getInstrInfo()->CreateSignExtensionInstructions
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CreateSignExtensionInstructions
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(target, setCCInstr->getParent()->getParent(),
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leftVal, leftOpToUse, 8*opSize, mvec, mcfi);
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target.getInstrInfo()->CreateSignExtensionInstructions
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CreateSignExtensionInstructions
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(target, setCCInstr->getParent()->getParent(),
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rightVal, rightOpToUse, 8*opSize, mvec, mcfi);
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}
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@ -2506,7 +2503,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
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TmpInstruction* argExtend = new TmpInstruction(mcfi, argVal);
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// sign-extend argVal and put the result in the temporary reg.
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target.getInstrInfo()->CreateSignExtensionInstructions
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CreateSignExtensionInstructions
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(target, currentFunc, argVal, argExtend,
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8*argSize, mvec, mcfi);
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@ -2826,8 +2823,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
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else {
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std::vector<MachineInstr*> minstrVec;
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Instruction* instr = subtreeRoot->getInstruction();
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target.getInstrInfo()->
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CreateCopyInstructionsByType(target,
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CreateCopyInstructionsByType(target,
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instr->getParent()->getParent(),
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instr->getOperand(forwardOperandNum),
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instr, minstrVec,
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@ -16,6 +16,7 @@
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//===----------------------------------------------------------------------===//
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#include "SparcV9Internals.h"
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#include "SparcV9InstrSelectionSupport.h"
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#include "llvm/Constants.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/iMemory.h"
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@ -180,7 +181,7 @@ PreSelection::visitOneOperand(Instruction &I, Value* Op, unsigned opNum,
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// load address of constant into a register, then load the constant
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// this is now done during instruction selection
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// the constant will live in the MachineConstantPool later on
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} else if (instrInfo.ConstantMayNotFitInImmedField(CV, &I)) {
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} else if (ConstantMayNotFitInImmedField(CV, &I)) {
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// put the constant into a virtual register using a cast
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CastInst* castI = new CastInst(CV, CV->getType(), "copyConst",
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&insertBefore);
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