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Reorganize interference code to check LastSplitPoint first.

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The last split point can be anywhere in the block, so it interferes with the
strictly monotonic requirements of advanceTo().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125132 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2011-02-08 23:02:58 +00:00
parent b4cc031a3e
commit a50c539b7a
1 changed files with 43 additions and 29 deletions
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70
lib/CodeGen/RegAllocGreedy.cpp
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@ -449,6 +449,40 @@ float RAGreedy::calcInterferenceInfo(LiveInterval &VirtReg, unsigned PhysReg) {
if (!IntI.valid()) if (!IntI.valid())
continue; continue;
// Determine which blocks have interference live in or after the last split
// point.
for (unsigned i = 0, e = LiveBlocks.size(); i != e; ++i) {
BlockInfo &BI = LiveBlocks[i];
SpillPlacement::BlockConstraint &BC = SpillConstraints[i];
SlotIndex Start, Stop;
tie(Start, Stop) = Indexes->getMBBRange(BI.MBB);
// Skip interference-free blocks.
if (IntI.start() >= Stop)
continue;
// Is the interference live-in?
if (BI.LiveIn) {
IntI.advanceTo(Start);
if (!IntI.valid())
break;
if (IntI.start() <= Start)
BC.Entry = SpillPlacement::MustSpill;
}
// Is the interference overlapping the last split point?
if (BI.LiveOut) {
if (IntI.stop() < BI.LastSplitPoint)
IntI.advanceTo(BI.LastSplitPoint.getPrevSlot());
if (!IntI.valid())
break;
if (IntI.start() < Stop)
BC.Exit = SpillPlacement::MustSpill;
}
}
// Rewind iterator and check other interferences.
IntI.find(VirtReg.beginIndex());
for (unsigned i = 0, e = LiveBlocks.size(); i != e; ++i) { for (unsigned i = 0, e = LiveBlocks.size(); i != e; ++i) {
BlockInfo &BI = LiveBlocks[i]; BlockInfo &BI = LiveBlocks[i];
SpillPlacement::BlockConstraint &BC = SpillConstraints[i]; SpillPlacement::BlockConstraint &BC = SpillConstraints[i];
@ -462,26 +496,16 @@ float RAGreedy::calcInterferenceInfo(LiveInterval &VirtReg, unsigned PhysReg) {
// Handle transparent blocks with interference separately. // Handle transparent blocks with interference separately.
// Transparent blocks never incur any fixed cost. // Transparent blocks never incur any fixed cost.
if (BI.LiveThrough && !BI.Uses) { if (BI.LiveThrough && !BI.Uses) {
// Check if interference is live-in - force spill.
if (BC.Entry != SpillPlacement::MustSpill) {
BC.Entry = SpillPlacement::PrefSpill;
IntI.advanceTo(Start); IntI.advanceTo(Start);
if (IntI.valid() && IntI.start() <= Start)
BC.Entry = SpillPlacement::MustSpill;
}
// Check if interference is live-out - force spill.
if (BC.Exit != SpillPlacement::MustSpill) {
BC.Exit = SpillPlacement::PrefSpill;
// Any interference overlapping [LastSplitPoint;Stop) forces a spill.
IntI.advanceTo(BI.LastSplitPoint.getPrevSlot());
if (IntI.valid() && IntI.start() < Stop)
BC.Exit = SpillPlacement::MustSpill;
}
// Nothing more to do for this transparent block.
if (!IntI.valid()) if (!IntI.valid())
break; break;
if (IntI.start() >= Stop)
continue;
if (BC.Entry != SpillPlacement::MustSpill)
BC.Entry = SpillPlacement::PrefSpill;
if (BC.Exit != SpillPlacement::MustSpill)
BC.Exit = SpillPlacement::PrefSpill;
continue; continue;
} }
@ -494,12 +518,8 @@ float RAGreedy::calcInterferenceInfo(LiveInterval &VirtReg, unsigned PhysReg) {
IntI.advanceTo(Start); IntI.advanceTo(Start);
if (!IntI.valid()) if (!IntI.valid())
break; break;
// Interference is live-in - force spill.
if (IntI.start() <= Start)
BC.Entry = SpillPlacement::MustSpill;
// Not live in, but before the first use. // Not live in, but before the first use.
else if (IntI.start() < BI.FirstUse) if (IntI.start() < BI.FirstUse)
BC.Entry = SpillPlacement::PrefSpill; BC.Entry = SpillPlacement::PrefSpill;
} }
@ -534,12 +554,6 @@ float RAGreedy::calcInterferenceInfo(LiveInterval &VirtReg, unsigned PhysReg) {
if (IntI.start() < Stop) if (IntI.start() < Stop)
BC.Exit = SpillPlacement::PrefSpill; BC.Exit = SpillPlacement::PrefSpill;
} }
// Is the interference overlapping the last split point?
IntI.advanceTo(BI.LastSplitPoint.getPrevSlot());
if (!IntI.valid())
break;
if (IntI.start() < Stop)
BC.Exit = SpillPlacement::MustSpill;
} }
} }
} }