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constant propagate a method away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95408 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -7025,16 +7025,12 @@ SDValue X86TargetLowering::LowerTRAMPOLINE(SDValue Op,
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const Value *TrmpAddr = cast<SrcValueSDNode>(Op.getOperand(4))->getValue();
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const X86InstrInfo *TII =
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((X86TargetMachine&)getTargetMachine()).getInstrInfo();
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if (Subtarget->is64Bit()) {
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SDValue OutChains[6];
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// Large code-model.
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const unsigned char JMP64r = TII->getBaseOpcodeForOpcode(X86::JMP64r);
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const unsigned char MOV64ri = TII->getBaseOpcodeForOpcode(X86::MOV64ri);
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const unsigned char JMP64r = 0xFF; // 64-bit jmp through register opcode.
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const unsigned char MOV64ri = 0xB8; // X86::MOV64ri opcode.
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const unsigned char N86R10 = RegInfo->getX86RegNum(X86::R10);
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const unsigned char N86R11 = RegInfo->getX86RegNum(X86::R11);
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@ -7129,7 +7125,8 @@ SDValue X86TargetLowering::LowerTRAMPOLINE(SDValue Op,
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DAG.getConstant(10, MVT::i32));
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Disp = DAG.getNode(ISD::SUB, dl, MVT::i32, FPtr, Addr);
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const unsigned char MOV32ri = TII->getBaseOpcodeForOpcode(X86::MOV32ri);
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// This is storing the opcode for MOV32ri.
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const unsigned char MOV32ri = 0xB8; // X86::MOV32ri's opcode byte.
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const unsigned char N86Reg = RegInfo->getX86RegNum(NestReg);
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OutChains[0] = DAG.getStore(Root, dl,
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DAG.getConstant(MOV32ri|N86Reg, MVT::i8),
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@ -7139,7 +7136,7 @@ SDValue X86TargetLowering::LowerTRAMPOLINE(SDValue Op,
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DAG.getConstant(1, MVT::i32));
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OutChains[1] = DAG.getStore(Root, dl, Nest, Addr, TrmpAddr, 1, false, 1);
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const unsigned char JMP = TII->getBaseOpcodeForOpcode(X86::JMP);
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const unsigned char JMP = 0xE9; // jmp <32bit dst> opcode.
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Addr = DAG.getNode(ISD::ADD, dl, MVT::i32, Trmp,
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DAG.getConstant(5, MVT::i32));
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OutChains[2] = DAG.getStore(Root, dl, DAG.getConstant(JMP, MVT::i8), Addr,
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@ -643,9 +643,6 @@ public:
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static unsigned char getBaseOpcodeFor(unsigned TSFlags) {
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return TSFlags >> X86II::OpcodeShift;
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}
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unsigned char getBaseOpcodeForOpcode(unsigned Opcode) const {
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return getBaseOpcodeFor(get(Opcode).TSFlags);
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}
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static bool isX86_64NonExtLowByteReg(unsigned reg) {
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return (reg == X86::SPL || reg == X86::BPL ||
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