From a7710edd98d71a81c43f8e3889cf0c790885d1b8 Mon Sep 17 00:00:00 2001
From: Owen Anderson <resistor@mac.com>
Date: Tue, 30 Aug 2011 22:10:03 +0000
Subject: [PATCH] Fix encoding of PC-relative Thumb1 LDR's when using immediate
offsets instead of labels.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138835 91177308-0d34-0410-b5e6-96231b3b80d8
---
lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp | 5 ++++-
test/MC/ARM/basic-thumb-instructions.s | 5 ++++-
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp b/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
index b798a3c226d..ab2162cbebb 100644
--- a/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
+++ b/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
@@ -930,7 +930,10 @@ getAddrModeISOpValue(const MCInst &MI, unsigned OpIdx,
uint32_t ARMMCCodeEmitter::
getAddrModePCOpValue(const MCInst &MI, unsigned OpIdx,
SmallVectorImpl<MCFixup> &Fixups) const {
- return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_thumb_cp, Fixups);
+ const MCOperand MO = MI.getOperand(OpIdx);
+ if (MO.isExpr())
+ return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_thumb_cp, Fixups);
+ return (MO.getImm() >> 2);
}
/// getAddrMode5OpValue - Return encoding info for 'reg +/- imm10' operand.
diff --git a/test/MC/ARM/basic-thumb-instructions.s b/test/MC/ARM/basic-thumb-instructions.s
index 0e9eebdb110..54d353e0c3c 100644
--- a/test/MC/ARM/basic-thumb-instructions.s
+++ b/test/MC/ARM/basic-thumb-instructions.s
@@ -224,10 +224,13 @@ _func:
@ LDR (literal)
@------------------------------------------------------------------------------
ldr r1, _foo
+ ldr r3, #604
+ ldr r3, #368
@ CHECK: ldr r1, _foo @ encoding: [A,0x49]
@ fixup A - offset: 0, value: _foo, kind: fixup_arm_thumb_cp
-
+@ CHECK: ldr r3, #604 @ encoding: [0x97,0x4b]
+@ CHECK: ldr r3, #368 @ encoding: [0x5c,0x4b]
@------------------------------------------------------------------------------
@ LDR (register)