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Use the SubclassData field to hold ExtType, isTrunc, and MemIndexedMode
information. This eliminates the need for the Flags field in MemSDNode, so this makes LoadSDNode and StoreSDNode smaller. Also, it makes FoldingSetNodeIDs for loads and stores two AddIntegers smaller. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63577 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
parent
f75e5b4d8c
commit
a7ce741ff0
@ -1596,10 +1596,6 @@ private:
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//! SVOffset - Memory location offset. Note that base is defined in MemSDNode
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int SVOffset;
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/// Flags - the low bit indicates whether this is a volatile reference;
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/// the remainder is a log2 encoding of the alignment in bytes.
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unsigned Flags;
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public:
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MemSDNode(unsigned Opc, SDVTList VTs, MVT MemoryVT,
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const Value *srcValue, int SVOff,
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@ -1618,9 +1614,17 @@ public:
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unsigned alignment, bool isvolatile);
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/// Returns alignment and volatility of the memory access
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unsigned getAlignment() const { return (1u << (Flags >> 1)) >> 1; }
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bool isVolatile() const { return Flags & 1; }
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unsigned getAlignment() const { return (1u << (SubclassData >> 6)) >> 1; }
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bool isVolatile() const { return (SubclassData >> 5) & 1; }
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/// getRawSubclassData - Return the SubclassData value, which contains an
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/// encoding of the alignment and volatile information, as well as bits
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/// used by subclasses. This function should only be used to compute a
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/// FoldingSetNodeID value.
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unsigned getRawSubclassData() const {
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return SubclassData;
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}
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/// Returns the SrcValue and offset that describes the location of the access
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const Value *getSrcValue() const { return SrcValue; }
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int getSrcValueOffset() const { return SVOffset; }
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@ -1637,10 +1641,6 @@ public:
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return getOperand(getOpcode() == ISD::STORE ? 2 : 1);
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}
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/// getRawFlags - Represent the flags as a bunch of bits.
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///
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unsigned getRawFlags() const { return Flags; }
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// Methods to support isa and dyn_cast
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static bool classof(const MemSDNode *) { return true; }
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static bool classof(const SDNode *N) {
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@ -2354,9 +2354,10 @@ public:
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SDVTList VTs, ISD::MemIndexedMode AM, MVT VT,
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const Value *SV, int SVO, unsigned Align, bool Vol)
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: MemSDNode(NodeTy, VTs, VT, SV, SVO, Align, Vol) {
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SubclassData = AM;
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InitOperands(Ops, Operands, numOperands);
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assert(Align != 0 && "Loads and stores should have non-zero aligment");
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SubclassData |= AM << 2;
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assert(getAddressingMode() == AM && "MemIndexedMode encoding error!");
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InitOperands(Ops, Operands, numOperands);
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assert((getOffset().getOpcode() == ISD::UNDEF || isIndexed()) &&
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"Only indexed loads and stores have a non-undef offset operand");
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}
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@ -2364,9 +2365,10 @@ public:
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unsigned numOperands, SDVTList VTs, ISD::MemIndexedMode AM,
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MVT VT, const Value *SV, int SVO, unsigned Align, bool Vol)
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: MemSDNode(NodeTy, dl, VTs, VT, SV, SVO, Align, Vol) {
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SubclassData = AM;
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InitOperands(Ops, Operands, numOperands);
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assert(Align != 0 && "Loads and stores should have non-zero aligment");
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SubclassData |= AM << 2;
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assert(getAddressingMode() == AM && "MemIndexedMode encoding error!");
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InitOperands(Ops, Operands, numOperands);
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assert((getOffset().getOpcode() == ISD::UNDEF || isIndexed()) &&
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"Only indexed loads and stores have a non-undef offset operand");
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}
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@ -2378,7 +2380,7 @@ public:
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/// getAddressingMode - Return the addressing mode for this load or store:
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/// unindexed, pre-inc, pre-dec, post-inc, or post-dec.
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ISD::MemIndexedMode getAddressingMode() const {
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return ISD::MemIndexedMode(SubclassData & 7);
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return ISD::MemIndexedMode((SubclassData >> 2) & 7);
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}
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/// isIndexed - Return true if this is a pre/post inc/dec load/store.
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@ -2404,21 +2406,23 @@ protected:
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const Value *SV, int O=0, unsigned Align=0, bool Vol=false)
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: LSBaseSDNode(ISD::LOAD, ChainPtrOff, 3,
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VTs, AM, LVT, SV, O, Align, Vol) {
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SubclassData |= (unsigned short)ETy << 3;
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SubclassData |= (unsigned short)ETy;
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assert(getExtensionType() == ETy && "LoadExtType encoding error!");
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}
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LoadSDNode(SDValue *ChainPtrOff, DebugLoc dl, SDVTList VTs,
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ISD::MemIndexedMode AM, ISD::LoadExtType ETy, MVT LVT,
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const Value *SV, int O=0, unsigned Align=0, bool Vol=false)
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: LSBaseSDNode(ISD::LOAD, dl, ChainPtrOff, 3,
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VTs, AM, LVT, SV, O, Align, Vol) {
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SubclassData |= (unsigned short)ETy << 3;
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SubclassData |= (unsigned short)ETy;
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assert(getExtensionType() == ETy && "LoadExtType encoding error!");
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}
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public:
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/// getExtensionType - Return whether this is a plain node,
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/// or one of the varieties of value-extending loads.
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ISD::LoadExtType getExtensionType() const {
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return ISD::LoadExtType((SubclassData >> 3) & 3);
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return ISD::LoadExtType(SubclassData & 3);
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}
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const SDValue &getBasePtr() const { return getOperand(1); }
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@ -2440,21 +2444,23 @@ protected:
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const Value *SV, int O=0, unsigned Align=0, bool Vol=false)
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: LSBaseSDNode(ISD::STORE, ChainValuePtrOff, 4,
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VTs, AM, SVT, SV, O, Align, Vol) {
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SubclassData |= (unsigned short)isTrunc << 3;
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SubclassData |= (unsigned short)isTrunc;
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assert(isTruncatingStore() == isTrunc && "isTrunc encoding error!");
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}
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StoreSDNode(SDValue *ChainValuePtrOff, DebugLoc dl, SDVTList VTs,
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ISD::MemIndexedMode AM, bool isTrunc, MVT SVT,
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const Value *SV, int O=0, unsigned Align=0, bool Vol=false)
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: LSBaseSDNode(ISD::STORE, dl, ChainValuePtrOff, 4,
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VTs, AM, SVT, SV, O, Align, Vol) {
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SubclassData |= (unsigned short)isTrunc << 3;
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SubclassData |= (unsigned short)isTrunc;
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assert(isTruncatingStore() == isTrunc && "isTrunc encoding error!");
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}
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public:
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/// isTruncatingStore - Return true if the op does a truncation before store.
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/// For integers this is the same as doing a TRUNCATE and storing the result.
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/// For floats, it is the same as doing an FP_ROUND and storing the result.
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bool isTruncatingStore() const { return (SubclassData >> 3) & 1; }
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bool isTruncatingStore() const { return SubclassData & 1; }
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const SDValue &getValue() const { return getOperand(1); }
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const SDValue &getBasePtr() const { return getOperand(2); }
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@ -429,18 +429,14 @@ static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
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}
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case ISD::LOAD: {
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const LoadSDNode *LD = cast<LoadSDNode>(N);
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ID.AddInteger(LD->getAddressingMode());
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ID.AddInteger(LD->getExtensionType());
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ID.AddInteger(LD->getMemoryVT().getRawBits());
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ID.AddInteger(LD->getRawFlags());
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ID.AddInteger(LD->getRawSubclassData());
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break;
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}
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case ISD::STORE: {
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const StoreSDNode *ST = cast<StoreSDNode>(N);
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ID.AddInteger(ST->getAddressingMode());
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ID.AddInteger(ST->isTruncatingStore());
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ID.AddInteger(ST->getMemoryVT().getRawBits());
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ID.AddInteger(ST->getRawFlags());
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ID.AddInteger(ST->getRawSubclassData());
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break;
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}
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case ISD::ATOMIC_CMP_SWAP:
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@ -456,7 +452,8 @@ static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
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case ISD::ATOMIC_LOAD_UMIN:
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case ISD::ATOMIC_LOAD_UMAX: {
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const AtomicSDNode *AT = cast<AtomicSDNode>(N);
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ID.AddInteger(AT->getRawFlags());
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ID.AddInteger(AT->getMemoryVT().getRawBits());
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ID.AddInteger(AT->getRawSubclassData());
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break;
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}
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} // end switch (N->getOpcode())
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@ -476,11 +473,20 @@ static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
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}
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/// encodeMemSDNodeFlags - Generic routine for computing a value for use in
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/// the CSE map that carries both alignment and volatility information.
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/// the CSE map that carries alignment, volatility, indexing mode, and
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/// extension/truncation information.
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///
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static inline unsigned
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encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) {
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return isVolatile | ((Log2_32(Alignment) + 1) << 1);
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encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM,
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bool isVolatile, unsigned Alignment) {
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assert((ConvType & 3) == ConvType &&
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"ConvType may not require more than 2 bits!");
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assert((AM & 7) == AM &&
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"AM may not require more than 3 bits!");
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return ConvType |
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(AM << 2) |
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(isVolatile << 5) |
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((Log2_32(Alignment) + 1) << 6);
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}
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//===----------------------------------------------------------------------===//
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@ -853,7 +859,6 @@ SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, MVT VT) {
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} else {
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NegOne = getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
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}
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return getNode(ISD::XOR, DL, VT, Val, NegOne);
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}
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@ -3417,6 +3422,7 @@ SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT,
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SDVTList VTs = getVTList(VT, MVT::Other);
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FoldingSetNodeID ID;
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ID.AddInteger(MemVT.getRawBits());
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SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
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AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
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void* IP = 0;
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@ -3445,6 +3451,7 @@ SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
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SDVTList VTs = getVTList(VT, MVT::Other);
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FoldingSetNodeID ID;
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ID.AddInteger(MemVT.getRawBits());
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SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
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AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
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void* IP = 0;
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@ -3483,6 +3490,7 @@ SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT,
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SDVTList VTs = getVTList(VT, MVT::Other);
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FoldingSetNodeID ID;
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ID.AddInteger(MemVT.getRawBits());
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SDValue Ops[] = {Chain, Ptr, Val};
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AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
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void* IP = 0;
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@ -3521,6 +3529,7 @@ SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
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SDVTList VTs = getVTList(VT, MVT::Other);
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FoldingSetNodeID ID;
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ID.AddInteger(MemVT.getRawBits());
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SDValue Ops[] = {Chain, Ptr, Val};
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AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
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void* IP = 0;
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@ -3727,10 +3736,8 @@ SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
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SDValue Ops[] = { Chain, Ptr, Offset };
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FoldingSetNodeID ID;
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AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
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ID.AddInteger(AM);
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ID.AddInteger(ExtType);
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ID.AddInteger(EVT.getRawBits());
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ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
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ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, isVolatile, Alignment));
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void *IP = 0;
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if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
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return SDValue(E, 0);
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@ -3778,10 +3785,8 @@ SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
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SDValue Ops[] = { Chain, Ptr, Offset };
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FoldingSetNodeID ID;
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AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
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ID.AddInteger(AM);
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ID.AddInteger(ExtType);
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ID.AddInteger(EVT.getRawBits());
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ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
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ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, isVolatile, Alignment));
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void *IP = 0;
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if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
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return SDValue(E, 0);
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@ -3868,10 +3873,9 @@ SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val,
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SDValue Ops[] = { Chain, Val, Ptr, Undef };
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FoldingSetNodeID ID;
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AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
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ID.AddInteger(ISD::UNINDEXED);
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ID.AddInteger(false);
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ID.AddInteger(VT.getRawBits());
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ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
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ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED,
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isVolatile, Alignment));
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void *IP = 0;
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if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
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return SDValue(E, 0);
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@ -3896,10 +3900,9 @@ SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
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SDValue Ops[] = { Chain, Val, Ptr, Undef };
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FoldingSetNodeID ID;
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AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
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ID.AddInteger(ISD::UNINDEXED);
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ID.AddInteger(false);
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ID.AddInteger(VT.getRawBits());
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ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
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ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED,
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isVolatile, Alignment));
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void *IP = 0;
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if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
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return SDValue(E, 0);
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@ -3932,10 +3935,9 @@ SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val,
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SDValue Ops[] = { Chain, Val, Ptr, Undef };
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FoldingSetNodeID ID;
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AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
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ID.AddInteger(ISD::UNINDEXED);
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ID.AddInteger(1);
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ID.AddInteger(SVT.getRawBits());
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ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
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ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED,
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isVolatile, Alignment));
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void *IP = 0;
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if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
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return SDValue(E, 0);
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@ -3968,10 +3970,9 @@ SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
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SDValue Ops[] = { Chain, Val, Ptr, Undef };
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FoldingSetNodeID ID;
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AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
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ID.AddInteger(ISD::UNINDEXED);
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ID.AddInteger(1);
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ID.AddInteger(SVT.getRawBits());
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ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
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ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED,
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isVolatile, Alignment));
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void *IP = 0;
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if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
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return SDValue(E, 0);
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@ -3993,10 +3994,8 @@ SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base,
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SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
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FoldingSetNodeID ID;
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AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
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ID.AddInteger(AM);
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ID.AddInteger(ST->isTruncatingStore());
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ID.AddInteger(ST->getMemoryVT().getRawBits());
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ID.AddInteger(ST->getRawFlags());
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ID.AddInteger(ST->getRawSubclassData());
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void *IP = 0;
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if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
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return SDValue(E, 0);
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@ -4020,10 +4019,8 @@ SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
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SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
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FoldingSetNodeID ID;
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AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
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ID.AddInteger(AM);
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ID.AddInteger(ST->isTruncatingStore());
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ID.AddInteger(ST->getMemoryVT().getRawBits());
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ID.AddInteger(ST->getRawFlags());
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ID.AddInteger(ST->getRawSubclassData());
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void *IP = 0;
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if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
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return SDValue(E, 0);
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@ -5339,9 +5336,8 @@ GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
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MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt,
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const Value *srcValue, int SVO,
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unsigned alignment, bool vol)
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: SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
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Flags(encodeMemSDNodeFlags(vol, alignment)) {
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: SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
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SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
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assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
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assert(getAlignment() == alignment && "Alignment representation error!");
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assert(isVolatile() == vol && "Volatile representation error!");
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@ -5351,8 +5347,8 @@ MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops,
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unsigned NumOps, MVT memvt, const Value *srcValue,
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int SVO, unsigned alignment, bool vol)
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: SDNode(Opc, VTs, Ops, NumOps),
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MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
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Flags(vol | ((Log2_32(alignment) + 1) << 1)) {
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MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
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SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
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assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
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assert(getAlignment() == alignment && "Alignment representation error!");
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assert(isVolatile() == vol && "Volatile representation error!");
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@ -5361,9 +5357,8 @@ MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops,
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MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT memvt,
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const Value *srcValue, int SVO,
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unsigned alignment, bool vol)
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: SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
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Flags(encodeMemSDNodeFlags(vol, alignment)) {
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: SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
|
||||
SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
|
||||
assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
|
||||
assert(getAlignment() == alignment && "Alignment representation error!");
|
||||
assert(isVolatile() == vol && "Volatile representation error!");
|
||||
@ -5374,8 +5369,8 @@ MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
|
||||
unsigned NumOps, MVT memvt, const Value *srcValue,
|
||||
int SVO, unsigned alignment, bool vol)
|
||||
: SDNode(Opc, dl, VTs, Ops, NumOps),
|
||||
MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
|
||||
Flags(vol | ((Log2_32(alignment) + 1) << 1)) {
|
||||
MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
|
||||
SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
|
||||
assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
|
||||
assert(getAlignment() == alignment && "Alignment representation error!");
|
||||
assert(isVolatile() == vol && "Volatile representation error!");
|
||||
|
||||
Loading…
Reference in New Issue
Block a user