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[MachineIRBuilder] Rework buildInstr API to maximize code reuse.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263264 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Quentin Colombet 2016-03-11 17:27:58 +00:00
parent acd8367766
commit a801132f2a
2 changed files with 34 additions and 24 deletions
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12
include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
View File

@ -85,7 +85,7 @@ public:
/// Set the debug location to \p DL for all the next build instructions.
void setDebugLoc(const DebugLoc &DL) { this->DL = DL; }
/// Build and insert \p Res<def> = \p Opcode [\p Ty] \p Op0, \p Op1.
/// Build and insert <empty> = \p Opcode [\p Ty] <empty>.
/// \p Ty is the type of the instruction if \p Opcode describes
/// a generic machine instruction. \p Ty must be nullptr if \p Opcode
/// does not describe a generic instruction.
@ -96,6 +96,14 @@ public:
/// \pre Ty == nullptr or isPreISelGenericOpcode(Opcode)
///
/// \return The newly created instruction.
MachineInstr *buildInstr(unsigned Opcode, Type *Ty);
/// Build and insert \p Res<def> = \p Opcode [\p Ty] \p Op0, \p Op1.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre Ty == nullptr or isPreISelGenericOpcode(Opcode)
///
/// \return The newly created instruction.
MachineInstr *buildInstr(unsigned Opcode, Type *Ty, unsigned Res,
unsigned Op0, unsigned Op1);
@ -117,7 +125,7 @@ public:
/// \return The newly created instruction.
MachineInstr *buildInstr(unsigned Opcode, unsigned Res, unsigned Op0);
/// Build and insert = \p Opcode.
/// Build and insert <empty> = \p Opcode <empty>.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre not isPreISelGenericOpcode(\p Opcode)

46
lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
View File

@ -53,16 +53,11 @@ MachineBasicBlock::iterator MachineIRBuilder::getInsertPt() {
return Before ? getMBB().begin() : getMBB().end();
}
MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, unsigned Res,
unsigned Op0, unsigned Op1) {
return buildInstr(Opcode, nullptr, Res, Op0, Op1);
}
MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, Type *Ty,
unsigned Res, unsigned Op0,
unsigned Op1) {
MachineInstr *NewMI =
BuildMI(getMF(), DL, getTII().get(Opcode), Res).addReg(Op0).addReg(Op1);
//------------------------------------------------------------------------------
// Build instruction variants.
//------------------------------------------------------------------------------
MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, Type *Ty) {
MachineInstr *NewMI = BuildMI(getMF(), DL, getTII().get(Opcode));
if (Ty) {
assert(isPreISelGenericOpcode(Opcode) &&
"Only generic instruction can have a type");
@ -75,21 +70,28 @@ MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, Type *Ty,
}
MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, unsigned Res,
unsigned Op0) {
assert(!isPreISelGenericOpcode(Opcode) &&
"Generic instruction must have a type");
unsigned Op0, unsigned Op1) {
return buildInstr(Opcode, nullptr, Res, Op0, Op1);
}
MachineInstr *NewMI =
BuildMI(getMF(), DL, getTII().get(Opcode), Res).addReg(Op0);
getMBB().insert(getInsertPt(), NewMI);
MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, Type *Ty,
unsigned Res, unsigned Op0,
unsigned Op1) {
MachineInstr *NewMI = buildInstr(Opcode, Ty);
MachineInstrBuilder(getMF(), NewMI)
.addReg(Res, RegState::Define)
.addReg(Op0)
.addReg(Op1);
return NewMI;
}
MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, unsigned Res,
unsigned Op0) {
MachineInstr *NewMI = buildInstr(Opcode, nullptr);
MachineInstrBuilder(getMF(), NewMI).addReg(Res, RegState::Define).addReg(Op0);
return NewMI;
}
MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode) {
assert(!isPreISelGenericOpcode(Opcode) &&
"Generic instruction must have a type");
MachineInstr *NewMI = BuildMI(getMF(), DL, getTII().get(Opcode));
getMBB().insert(getInsertPt(), NewMI);
return NewMI;
return buildInstr(Opcode, nullptr);
}