From a819fad86534f6d47808be88cd6a22648f9782ac Mon Sep 17 00:00:00 2001
From: Matthias Braun <matze@braunis.de>
Date: Fri, 7 Jul 2017 03:02:17 +0000
Subject: [PATCH] LiveRegUnits: Rename accumulateBackward()->accumulate()

Contrary to the stepForward()/stepBackward() method accumulate() doesn't
have a direction as defs, uses and clobbers all have the same effect.

Also improve the documentation comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307351 91177308-0d34-0410-b5e6-96231b3b80d8
---
 include/llvm/CodeGen/LiveRegUnits.h              | 8 ++++----
 lib/CodeGen/LiveRegUnits.cpp                     | 2 +-
 lib/CodeGen/RegisterScavenging.cpp               | 2 +-
 lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp | 2 +-
 4 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/include/llvm/CodeGen/LiveRegUnits.h b/include/llvm/CodeGen/LiveRegUnits.h
index fa1ec867ea3..3703c276f71 100644
--- a/include/llvm/CodeGen/LiveRegUnits.h
+++ b/include/llvm/CodeGen/LiveRegUnits.h
@@ -95,10 +95,10 @@ public:
   /// Updates liveness when stepping backwards over the instruction \p MI.
   void stepBackward(const MachineInstr &MI);
 
-  /// Mark all register units live during instruction \p MI.
-  /// This can be used to accumulate live/unoccupied registers over a range of
-  /// instructions.
-  void accumulateBackward(const MachineInstr &MI);
+  /// Adds all register units used, defined or clobbered in \p MI.
+  /// This is useful when walking over a range of instruction to find registers
+  /// unused over the whole range.
+  void accumulate(const MachineInstr &MI);
 
   /// Adds registers living out of block \p MBB.
   /// Live out registers are the union of the live-in registers of the successor
diff --git a/lib/CodeGen/LiveRegUnits.cpp b/lib/CodeGen/LiveRegUnits.cpp
index 3746b74e052..f9ba4ffa652 100644
--- a/lib/CodeGen/LiveRegUnits.cpp
+++ b/lib/CodeGen/LiveRegUnits.cpp
@@ -67,7 +67,7 @@ void LiveRegUnits::stepBackward(const MachineInstr &MI) {
   }
 }
 
-void LiveRegUnits::accumulateBackward(const MachineInstr &MI) {
+void LiveRegUnits::accumulate(const MachineInstr &MI) {
   // Add defs, uses and regmask clobbers to the set.
   for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
     if (O->isReg()) {
diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp
index 83d65a56fec..7856eaa0a36 100644
--- a/lib/CodeGen/RegisterScavenging.cpp
+++ b/lib/CodeGen/RegisterScavenging.cpp
@@ -388,7 +388,7 @@ findSurvivorBackwards(const MachineRegisterInfo &MRI,
   for (MachineBasicBlock::iterator I = From;; --I) {
     const MachineInstr &MI = *I;
 
-    Used.accumulateBackward(MI);
+    Used.accumulate(MI);
 
     if (I == To) {
       // See if one of the registers in RC wasn't used so far.
diff --git a/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp b/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
index 4a7e0b2b803..db1fbe069f4 100644
--- a/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
+++ b/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
@@ -509,7 +509,7 @@ int AArch64A57FPLoadBalancing::scavengeRegister(Chain *G, Color C,
   assert(ChainBegin != ChainEnd && "Chain should contain instructions");
   do {
     --I;
-    Units.accumulateBackward(*I);
+    Units.accumulate(*I);
   } while (I != ChainBegin);
 
   // Make sure we allocate in-order, to get the cheapest registers first.