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Enable FISTTP* instructions when AVX is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147758 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -439,31 +439,31 @@ def IST_FP64m : FPI<0xDF, MRM7m, (outs), (ins i64mem:$dst), "fistp{ll}\t$dst">;
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// FISTTP requires SSE3 even though it's a FPStack op.
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def ISTT_Fp16m32 : FpI_<(outs), (ins i16mem:$op, RFP32:$src), OneArgFP,
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[(X86fp_to_i16mem RFP32:$src, addr:$op)]>,
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Requires<[HasSSE3]>;
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Requires<[HasSSE3orAVX]>;
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def ISTT_Fp32m32 : FpI_<(outs), (ins i32mem:$op, RFP32:$src), OneArgFP,
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[(X86fp_to_i32mem RFP32:$src, addr:$op)]>,
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Requires<[HasSSE3]>;
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Requires<[HasSSE3orAVX]>;
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def ISTT_Fp64m32 : FpI_<(outs), (ins i64mem:$op, RFP32:$src), OneArgFP,
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[(X86fp_to_i64mem RFP32:$src, addr:$op)]>,
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Requires<[HasSSE3]>;
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Requires<[HasSSE3orAVX]>;
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def ISTT_Fp16m64 : FpI_<(outs), (ins i16mem:$op, RFP64:$src), OneArgFP,
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[(X86fp_to_i16mem RFP64:$src, addr:$op)]>,
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Requires<[HasSSE3]>;
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Requires<[HasSSE3orAVX]>;
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def ISTT_Fp32m64 : FpI_<(outs), (ins i32mem:$op, RFP64:$src), OneArgFP,
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[(X86fp_to_i32mem RFP64:$src, addr:$op)]>,
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Requires<[HasSSE3]>;
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Requires<[HasSSE3orAVX]>;
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def ISTT_Fp64m64 : FpI_<(outs), (ins i64mem:$op, RFP64:$src), OneArgFP,
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[(X86fp_to_i64mem RFP64:$src, addr:$op)]>,
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Requires<[HasSSE3]>;
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Requires<[HasSSE3orAVX]>;
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def ISTT_Fp16m80 : FpI_<(outs), (ins i16mem:$op, RFP80:$src), OneArgFP,
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[(X86fp_to_i16mem RFP80:$src, addr:$op)]>,
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Requires<[HasSSE3]>;
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Requires<[HasSSE3orAVX]>;
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def ISTT_Fp32m80 : FpI_<(outs), (ins i32mem:$op, RFP80:$src), OneArgFP,
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[(X86fp_to_i32mem RFP80:$src, addr:$op)]>,
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Requires<[HasSSE3]>;
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Requires<[HasSSE3orAVX]>;
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def ISTT_Fp64m80 : FpI_<(outs), (ins i64mem:$op, RFP80:$src), OneArgFP,
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[(X86fp_to_i64mem RFP80:$src, addr:$op)]>,
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Requires<[HasSSE3]>;
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Requires<[HasSSE3orAVX]>;
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let mayStore = 1 in {
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def ISTT_FP16m : FPI<0xDF, MRM1m, (outs), (ins i16mem:$dst), "fisttp{s}\t$dst">;
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