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Add AVX 256-bit MOVMSK forms
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108184 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1598,6 +1598,12 @@ let isAsmParserOnly = 1 in {
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defm VMOVMSKPD : sse12_extr_sign_mask<VR128, int_x86_sse2_movmsk_pd,
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"movmskpd", SSEPackedDouble>, OpSize,
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VEX;
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// FIXME: merge with multiclass above when the intrinsics come.
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def VMOVMSKPSYrr : PI<0x50, MRMSrcReg, (outs GR32:$dst), (ins VR256:$src),
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"movmskps\t{$src, $dst|$dst, $src}", [], SSEPackedSingle>, VEX;
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def VMOVMSKPDYrr : PI<0x50, MRMSrcReg, (outs GR32:$dst), (ins VR256:$src),
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"movmskpd\t{$src, $dst|$dst, $src}", [], SSEPackedDouble>, OpSize,
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VEX;
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}
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//===----------------------------------------------------------------------===//
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@ -12398,4 +12398,11 @@
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// CHECK: encoding: [0xc5,0xfc,0x2b,0x08]
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vmovntps %ymm1, (%eax)
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// CHECK: vmovmskps %xmm2, %eax
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// CHECK: encoding: [0xc5,0xf8,0x50,0xc2]
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vmovmskps %xmm2, %eax
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// CHECK: vmovmskpd %xmm2, %eax
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// CHECK: encoding: [0xc5,0xf9,0x50,0xc2]
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vmovmskpd %xmm2, %eax
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@ -2472,3 +2472,11 @@ pshufb CPI1_0(%rip), %xmm1
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// CHECK: encoding: [0xc5,0x7c,0x2b,0x18]
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vmovntps %ymm11, (%rax)
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// CHECK: vmovmskps %xmm12, %eax
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// CHECK: encoding: [0xc4,0xc1,0x78,0x50,0xc4]
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vmovmskps %xmm12, %eax
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// CHECK: vmovmskpd %xmm12, %eax
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// CHECK: encoding: [0xc4,0xc1,0x79,0x50,0xc4]
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vmovmskpd %xmm12, %eax
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