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Rename variables to conform to llvm coding standards.
Differential Revision: http://reviews.llvm.org/D6062 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221204 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -210,61 +210,61 @@ static inline uint64_t ror(uint64_t elt, unsigned size) {
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/// as the immediate operand of a logical instruction for the given register
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/// size. If so, return true with "encoding" set to the encoded value in
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/// the form N:immr:imms.
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static inline bool processLogicalImmediate(uint64_t imm, unsigned regSize,
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uint64_t &encoding) {
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if (imm == 0ULL || imm == ~0ULL ||
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(regSize != 64 && (imm >> regSize != 0 || imm == ~0U)))
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static inline bool processLogicalImmediate(uint64_t Imm, unsigned RegSize,
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uint64_t &Encoding) {
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if (Imm == 0ULL || Imm == ~0ULL ||
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(RegSize != 64 && (Imm >> RegSize != 0 || Imm == ~0U)))
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return false;
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// First, determine the element size.
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unsigned size = regSize;
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unsigned Size = RegSize;
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do {
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size /= 2;
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uint64_t mask = (1ULL << size) - 1;
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Size /= 2;
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uint64_t Mask = (1ULL << Size) - 1;
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if ((imm & mask) != ((imm >> size) & mask)) {
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size *= 2;
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if ((Imm & Mask) != ((Imm >> Size) & Mask)) {
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Size *= 2;
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break;
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}
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} while (size > 2);
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} while (Size > 2);
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// Second, determine the rotation to make the element be: 0^m 1^n.
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uint32_t cto, i;
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uint64_t mask = ((uint64_t)-1LL) >> (64 - size);
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imm &= mask;
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uint32_t CTO, I;
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uint64_t Mask = ((uint64_t)-1LL) >> (64 - Size);
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Imm &= Mask;
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if (isShiftedMask_64(imm)) {
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i = countTrailingZeros(imm);
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cto = CountTrailingOnes_64(imm >> i);
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if (isShiftedMask_64(Imm)) {
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I = countTrailingZeros(Imm);
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CTO = CountTrailingOnes_64(Imm >> I);
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} else {
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imm |= ~mask;
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if (!isShiftedMask_64(~imm))
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Imm |= ~Mask;
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if (!isShiftedMask_64(~Imm))
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return false;
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unsigned clo = CountLeadingOnes_64(imm);
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i = 64 - clo;
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cto = clo + CountTrailingOnes_64(imm) - (64 - size);
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unsigned CLO = CountLeadingOnes_64(Imm);
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I = 64 - CLO;
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CTO = CLO + CountTrailingOnes_64(Imm) - (64 - Size);
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}
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// Encode in immr the number of RORs it would take to get *from* 0^m 1^n
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// Encode in Immr the number of RORs it would take to get *from* 0^m 1^n
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// to our target value, where i is the number of RORs to go the opposite
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// direction.
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assert(size > i && "i should be smaller than element size");
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unsigned immr = (size - i) & (size - 1);
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assert(Size > I && "I should be smaller than element Size");
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unsigned Immr = (Size - I) & (Size - 1);
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// If size has a 1 in the n'th bit, create a value that has zeroes in
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// bits [0, n] and ones above that.
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uint64_t nimms = ~(size-1) << 1;
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uint64_t NImms = ~(Size-1) << 1;
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// Or the CTO value into the low bits, which must be below the Nth bit
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// bit mentioned above.
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nimms |= (cto-1);
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NImms |= (CTO-1);
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// Extract the seventh bit and toggle it to create the N field.
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unsigned N = ((nimms >> 6) & 1) ^ 1;
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unsigned N = ((NImms >> 6) & 1) ^ 1;
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encoding = (N << 12) | (immr << 6) | (nimms & 0x3f);
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Encoding = (N << 12) | (Immr << 6) | (NImms & 0x3f);
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return true;
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}
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