RPCSX/llvm
1
0
Fork 0
mirror of https://github.com/RPCSX/llvm.git synced 2024-11-25 04:39:44 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Factor out a bit of code that appears in several places into a

Browse Source 
utility function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69937 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2009-04-23 23:13:24 +00:00
parent 5e5558bc66
commit ad62f53795
3 changed files with 16 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
View File

@ -1020,6 +1020,17 @@ void SelectionDAGLowering::visitRet(ReturnInst &I) {
&NewValues[0], NewValues.size()));
}
/// CopyToExportRegsIfNeeded - If the given value has virtual registers
/// created for it, emit nodes to copy the value into the virtual
/// registers.
void SelectionDAGLowering::CopyToExportRegsIfNeeded(Value *V) {
if (!V->use_empty()) {
DenseMap<const Value *, unsigned>::iterator VMI = FuncInfo.ValueMap.find(V);
if (VMI != FuncInfo.ValueMap.end())
CopyValueToVirtualRegister(V, VMI->second);
}
}
/// ExportFromCurrentBlock - If this condition isn't known to be exported from
/// the current basic block, add it to ValueMap now so that we'll get a
/// CopyTo/FromReg.
@ -1572,11 +1583,7 @@ void SelectionDAGLowering::visitInvoke(InvokeInst &I) {
// If the value of the invoke is used outside of its defining block, make it
// available as a virtual register.
if (!I.use_empty()) {
DenseMap<const Value*, unsigned>::iterator VMI = FuncInfo.ValueMap.find(&I);
if (VMI != FuncInfo.ValueMap.end())
CopyValueToVirtualRegister(&I, VMI->second);
}
CopyToExportRegsIfNeeded(&I);
// Update successor info
CurMBB->addSuccessor(Return);
@ -5924,10 +5931,7 @@ LowerArguments(BasicBlock *LLVMBB) {
SDL->getCurDebugLoc()));
// If this argument is live outside of the entry block, insert a copy from
// whereever we got it to the vreg that other BB's will reference it as.
DenseMap<const Value*, unsigned>::iterator VMI=FuncInfo->ValueMap.find(AI);
if (VMI != FuncInfo->ValueMap.end()) {
SDL->CopyValueToVirtualRegister(AI, VMI->second);
}
SDL->CopyToExportRegsIfNeeded(AI);
}
a += NumValues;
}

1
lib/CodeGen/SelectionDAG/SelectionDAGBuild.h
View File

@ -422,6 +422,7 @@ public:
MachineBasicBlock *CurBB);
bool ShouldEmitAsBranches(const std::vector<CaseBlock> &Cases);
bool isExportableFromCurrentBlock(Value *V, const BasicBlock *FromBB);
void CopyToExportRegsIfNeeded(Value *V);
void ExportFromCurrentBlock(Value *V);
void LowerCallTo(CallSite CS, SDValue Callee, bool IsTailCall,
MachineBasicBlock *LandingPad = NULL);

7
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
View File

@ -476,11 +476,8 @@ void SelectionDAGISel::SelectBasicBlock(BasicBlock *LLVMBB,
// Ensure that all instructions which are used outside of their defining
// blocks are available as virtual registers. Invoke is handled elsewhere.
for (BasicBlock::iterator I = Begin; I != End; ++I)
if (!I->use_empty() && !isa<PHINode>(I) && !isa<InvokeInst>(I)) {
DenseMap<const Value*,unsigned>::iterator VMI =FuncInfo->ValueMap.find(I);
if (VMI != FuncInfo->ValueMap.end())
SDL->CopyValueToVirtualRegister(I, VMI->second);
}
if (!isa<PHINode>(I) && !isa<InvokeInst>(I))
SDL->CopyToExportRegsIfNeeded(I);
// Handle PHI nodes in successor blocks.
if (End == LLVMBB->end()) {