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Add a note about EFLAGS optimization.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66508 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2009-03-09 23:47:02 +00:00
parent 412a446974
commit ad93e1e5fc
1 changed files with 15 additions and 0 deletions
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15
lib/Target/X86/README.txt
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@ -1819,6 +1819,21 @@ LBB1_1: ## bb1
//===---------------------------------------------------------------------===//
Test instructions can be eliminated by using EFLAGS values from arithmetic
instructions. This is currently not done for and, or, xor, neg, shl, sra,
srl, shld, shrd, atomic ops, and others. It is also currently not done for
read-modify-write instructions.
The shift operators have the complication that when the shift count is
zero, EFLAGS is not set, so they can only subsume a test instruction if
the shift count is known to be non-zero.
In read-modify-write instructions, the root node in the isel match is
the store, and isel has no way for the use of the EFLAGS result of the
arithmetic to be remapped to the new node.
//===---------------------------------------------------------------------===//
test/CodeGen/X86/2009-03-07-FPConstSelect.ll compiles to:
_f: