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Move subreg lowering pass to be right after regalloc, per feedback.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40548 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Christopher Lamb 2007-07-27 07:36:14 +00:00
parent 3e22947d9a
commit ada779fb11
1 changed files with 10 additions and 4 deletions
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14
lib/CodeGen/LLVMTargetMachine.cpp
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@ -72,6 +72,11 @@ LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
PM.add(createLowerSubregsPass());
if (PrintMachineCode) // Print the subreg lowered code
PM.add(createMachineFunctionPrinterPass(cerr));
// Run post-ra passes.
if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
@ -96,8 +101,6 @@ LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
if (addPreEmitPass(PM, Fast) && PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
PM.add(createLowerSubregsPass());
switch (FileType) {
default:
@ -178,6 +181,11 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
if (PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
PM.add(createLowerSubregsPass());
if (PrintMachineCode) // Print the subreg lowered code
PM.add(createMachineFunctionPrinterPass(cerr));
// Run post-ra passes.
if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
@ -199,8 +207,6 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
if (addPreEmitPass(PM, Fast) && PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
PM.add(createLowerSubregsPass());
addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE);