[llvm_void_ty] is no longer needed for result types,

just use an empty result list.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99346 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2010-03-23 23:46:07 +00:00
parent c75c5fa125
commit ae8f4c4f86
6 changed files with 81 additions and 81 deletions

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@ -176,19 +176,19 @@ class GCCBuiltin<string name> {
//===--------------- Variable Argument Handling Intrinsics ----------------===//
//
def int_vastart : Intrinsic<[llvm_void_ty], [llvm_ptr_ty], [], "llvm.va_start">;
def int_vacopy : Intrinsic<[llvm_void_ty], [llvm_ptr_ty, llvm_ptr_ty], [],
def int_vastart : Intrinsic<[], [llvm_ptr_ty], [], "llvm.va_start">;
def int_vacopy : Intrinsic<[], [llvm_ptr_ty, llvm_ptr_ty], [],
"llvm.va_copy">;
def int_vaend : Intrinsic<[llvm_void_ty], [llvm_ptr_ty], [], "llvm.va_end">;
def int_vaend : Intrinsic<[], [llvm_ptr_ty], [], "llvm.va_end">;
//===------------------- Garbage Collection Intrinsics --------------------===//
//
def int_gcroot : Intrinsic<[llvm_void_ty],
def int_gcroot : Intrinsic<[],
[llvm_ptrptr_ty, llvm_ptr_ty]>;
def int_gcread : Intrinsic<[llvm_ptr_ty],
[llvm_ptr_ty, llvm_ptrptr_ty],
[IntrReadArgMem]>;
def int_gcwrite : Intrinsic<[llvm_void_ty],
def int_gcwrite : Intrinsic<[],
[llvm_ptr_ty, llvm_ptr_ty, llvm_ptrptr_ty],
[IntrWriteArgMem, NoCapture<1>, NoCapture<2>]>;
@ -201,37 +201,37 @@ def int_frameaddress : Intrinsic<[llvm_ptr_ty], [llvm_i32_ty], [IntrNoMem]>;
// model their dependencies on allocas.
def int_stacksave : Intrinsic<[llvm_ptr_ty]>,
GCCBuiltin<"__builtin_stack_save">;
def int_stackrestore : Intrinsic<[llvm_void_ty], [llvm_ptr_ty]>,
def int_stackrestore : Intrinsic<[], [llvm_ptr_ty]>,
GCCBuiltin<"__builtin_stack_restore">;
// IntrWriteArgMem is more pessimistic than strictly necessary for prefetch,
// however it does conveniently prevent the prefetch from being reordered
// with respect to nearby accesses to the same memory.
def int_prefetch : Intrinsic<[llvm_void_ty],
def int_prefetch : Intrinsic<[],
[llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty],
[IntrWriteArgMem, NoCapture<0>]>;
def int_pcmarker : Intrinsic<[llvm_void_ty], [llvm_i32_ty]>;
def int_pcmarker : Intrinsic<[], [llvm_i32_ty]>;
def int_readcyclecounter : Intrinsic<[llvm_i64_ty]>;
// Stack Protector Intrinsic - The stackprotector intrinsic writes the stack
// guard to the correct place on the stack frame.
def int_stackprotector : Intrinsic<[llvm_void_ty],
def int_stackprotector : Intrinsic<[],
[llvm_ptr_ty, llvm_ptrptr_ty],
[IntrWriteMem]>;
//===------------------- Standard C Library Intrinsics --------------------===//
//
def int_memcpy : Intrinsic<[llvm_void_ty],
def int_memcpy : Intrinsic<[],
[llvm_ptr_ty, llvm_ptr_ty, llvm_anyint_ty,
llvm_i32_ty],
[IntrWriteArgMem, NoCapture<0>, NoCapture<1>]>;
def int_memmove : Intrinsic<[llvm_void_ty],
def int_memmove : Intrinsic<[],
[llvm_ptr_ty, llvm_ptr_ty, llvm_anyint_ty,
llvm_i32_ty],
[IntrWriteArgMem, NoCapture<0>, NoCapture<1>]>;
def int_memset : Intrinsic<[llvm_void_ty],
def int_memset : Intrinsic<[],
[llvm_ptr_ty, llvm_i8_ty, llvm_anyint_ty,
llvm_i32_ty],
[IntrWriteArgMem, NoCapture<0>]>;
@ -255,9 +255,9 @@ let Properties = [IntrReadMem] in {
// NOTE: these are internal interfaces.
def int_setjmp : Intrinsic<[llvm_i32_ty], [llvm_ptr_ty]>;
def int_longjmp : Intrinsic<[llvm_void_ty], [llvm_ptr_ty, llvm_i32_ty]>;
def int_longjmp : Intrinsic<[], [llvm_ptr_ty, llvm_i32_ty]>;
def int_sigsetjmp : Intrinsic<[llvm_i32_ty] , [llvm_ptr_ty, llvm_i32_ty]>;
def int_siglongjmp : Intrinsic<[llvm_void_ty], [llvm_ptr_ty, llvm_i32_ty]>;
def int_siglongjmp : Intrinsic<[], [llvm_ptr_ty, llvm_i32_ty]>;
// Internal interface for object size checking
def int_objectsize : Intrinsic<[llvm_anyint_ty], [llvm_ptr_ty, llvm_i1_ty],
@ -282,9 +282,9 @@ let Properties = [IntrNoMem] in {
// optimizers can change them aggressively. Special handling needed in a few
// places.
let Properties = [IntrNoMem] in {
def int_dbg_declare : Intrinsic<[llvm_void_ty],
def int_dbg_declare : Intrinsic<[],
[llvm_metadata_ty, llvm_metadata_ty]>;
def int_dbg_value : Intrinsic<[llvm_void_ty],
def int_dbg_value : Intrinsic<[],
[llvm_metadata_ty, llvm_i64_ty,
llvm_metadata_ty]>;
}
@ -297,24 +297,24 @@ def int_eh_selector : Intrinsic<[llvm_i32_ty],
def int_eh_typeid_for : Intrinsic<[llvm_i32_ty], [llvm_ptr_ty]>;
def int_eh_return_i32 : Intrinsic<[llvm_void_ty], [llvm_i32_ty, llvm_ptr_ty]>;
def int_eh_return_i64 : Intrinsic<[llvm_void_ty], [llvm_i64_ty, llvm_ptr_ty]>;
def int_eh_return_i32 : Intrinsic<[], [llvm_i32_ty, llvm_ptr_ty]>;
def int_eh_return_i64 : Intrinsic<[], [llvm_i64_ty, llvm_ptr_ty]>;
def int_eh_unwind_init: Intrinsic<[llvm_void_ty]>,
def int_eh_unwind_init: Intrinsic<[]>,
GCCBuiltin<"__builtin_unwind_init">;
def int_eh_dwarf_cfa : Intrinsic<[llvm_ptr_ty], [llvm_i32_ty]>;
let Properties = [IntrNoMem] in {
def int_eh_sjlj_setjmp : Intrinsic<[llvm_i32_ty], [llvm_ptr_ty]>;
def int_eh_sjlj_longjmp : Intrinsic<[llvm_void_ty], [llvm_ptr_ty]>;
def int_eh_sjlj_longjmp : Intrinsic<[], [llvm_ptr_ty]>;
def int_eh_sjlj_lsda : Intrinsic<[llvm_ptr_ty]>;
def int_eh_sjlj_callsite: Intrinsic<[llvm_void_ty], [llvm_i32_ty]>;
def int_eh_sjlj_callsite: Intrinsic<[], [llvm_i32_ty]>;
}
//===---------------- Generic Variable Attribute Intrinsics----------------===//
//
def int_var_annotation : Intrinsic<[llvm_void_ty],
def int_var_annotation : Intrinsic<[],
[llvm_ptr_ty, llvm_ptr_ty,
llvm_ptr_ty, llvm_i32_ty],
[], "llvm.var.annotation">;
@ -361,7 +361,7 @@ def int_umul_with_overflow : Intrinsic<[llvm_anyint_ty, llvm_i1_ty],
//===------------------------- Atomic Intrinsics --------------------------===//
//
def int_memory_barrier : Intrinsic<[llvm_void_ty],
def int_memory_barrier : Intrinsic<[],
[llvm_i1_ty, llvm_i1_ty,
llvm_i1_ty, llvm_i1_ty, llvm_i1_ty], []>,
GCCBuiltin<"__builtin_llvm_memory_barrier">;
@ -429,16 +429,16 @@ def int_atomic_load_umax : Intrinsic<[llvm_anyint_ty],
//===------------------------- Memory Use Markers -------------------------===//
//
def int_lifetime_start : Intrinsic<[llvm_void_ty],
def int_lifetime_start : Intrinsic<[],
[llvm_i64_ty, llvm_ptr_ty],
[IntrWriteArgMem, NoCapture<1>]>;
def int_lifetime_end : Intrinsic<[llvm_void_ty],
def int_lifetime_end : Intrinsic<[],
[llvm_i64_ty, llvm_ptr_ty],
[IntrWriteArgMem, NoCapture<1>]>;
def int_invariant_start : Intrinsic<[llvm_descriptor_ty],
[llvm_i64_ty, llvm_ptr_ty],
[IntrReadArgMem, NoCapture<1>]>;
def int_invariant_end : Intrinsic<[llvm_void_ty],
def int_invariant_end : Intrinsic<[],
[llvm_descriptor_ty, llvm_i64_ty,
llvm_ptr_ty],
[IntrWriteArgMem, NoCapture<2>]>;
@ -447,7 +447,7 @@ def int_invariant_end : Intrinsic<[llvm_void_ty],
//
def int_flt_rounds : Intrinsic<[llvm_i32_ty]>,
GCCBuiltin<"__builtin_flt_rounds">;
def int_trap : Intrinsic<[llvm_void_ty]>,
def int_trap : Intrinsic<[]>,
GCCBuiltin<"__builtin_trap">;
// Intrisics to support half precision floating point format

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@ -344,31 +344,31 @@ let TargetPrefix = "arm" in {
[IntrReadArgMem]>;
// Interleaving vector stores from N-element structures.
def int_arm_neon_vst1 : Intrinsic<[llvm_void_ty],
def int_arm_neon_vst1 : Intrinsic<[],
[llvm_ptr_ty, llvm_anyvector_ty],
[IntrWriteArgMem]>;
def int_arm_neon_vst2 : Intrinsic<[llvm_void_ty],
def int_arm_neon_vst2 : Intrinsic<[],
[llvm_ptr_ty, llvm_anyvector_ty,
LLVMMatchType<0>], [IntrWriteArgMem]>;
def int_arm_neon_vst3 : Intrinsic<[llvm_void_ty],
def int_arm_neon_vst3 : Intrinsic<[],
[llvm_ptr_ty, llvm_anyvector_ty,
LLVMMatchType<0>, LLVMMatchType<0>],
[IntrWriteArgMem]>;
def int_arm_neon_vst4 : Intrinsic<[llvm_void_ty],
def int_arm_neon_vst4 : Intrinsic<[],
[llvm_ptr_ty, llvm_anyvector_ty,
LLVMMatchType<0>, LLVMMatchType<0>,
LLVMMatchType<0>], [IntrWriteArgMem]>;
// Vector store N-element structure from one lane.
def int_arm_neon_vst2lane : Intrinsic<[llvm_void_ty],
def int_arm_neon_vst2lane : Intrinsic<[],
[llvm_ptr_ty, llvm_anyvector_ty,
LLVMMatchType<0>, llvm_i32_ty],
[IntrWriteArgMem]>;
def int_arm_neon_vst3lane : Intrinsic<[llvm_void_ty],
def int_arm_neon_vst3lane : Intrinsic<[],
[llvm_ptr_ty, llvm_anyvector_ty,
LLVMMatchType<0>, LLVMMatchType<0>,
llvm_i32_ty], [IntrWriteArgMem]>;
def int_arm_neon_vst4lane : Intrinsic<[llvm_void_ty],
def int_arm_neon_vst4lane : Intrinsic<[],
[llvm_ptr_ty, llvm_anyvector_ty,
LLVMMatchType<0>, LLVMMatchType<0>,
LLVMMatchType<0>, llvm_i32_ty],

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@ -18,17 +18,17 @@
// Non-altivec intrinsics.
let TargetPrefix = "ppc" in { // All intrinsics start with "llvm.ppc.".
// dcba/dcbf/dcbi/dcbst/dcbt/dcbz/dcbzl(PPC970) instructions.
def int_ppc_dcba : Intrinsic<[llvm_void_ty], [llvm_ptr_ty], [IntrWriteMem]>;
def int_ppc_dcbf : Intrinsic<[llvm_void_ty], [llvm_ptr_ty], [IntrWriteMem]>;
def int_ppc_dcbi : Intrinsic<[llvm_void_ty], [llvm_ptr_ty], [IntrWriteMem]>;
def int_ppc_dcbst : Intrinsic<[llvm_void_ty], [llvm_ptr_ty], [IntrWriteMem]>;
def int_ppc_dcbt : Intrinsic<[llvm_void_ty], [llvm_ptr_ty], [IntrWriteMem]>;
def int_ppc_dcbtst: Intrinsic<[llvm_void_ty], [llvm_ptr_ty], [IntrWriteMem]>;
def int_ppc_dcbz : Intrinsic<[llvm_void_ty], [llvm_ptr_ty], [IntrWriteMem]>;
def int_ppc_dcbzl : Intrinsic<[llvm_void_ty], [llvm_ptr_ty], [IntrWriteMem]>;
def int_ppc_dcba : Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>;
def int_ppc_dcbf : Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>;
def int_ppc_dcbi : Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>;
def int_ppc_dcbst : Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>;
def int_ppc_dcbt : Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>;
def int_ppc_dcbtst: Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>;
def int_ppc_dcbz : Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>;
def int_ppc_dcbzl : Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>;
// sync instruction
def int_ppc_sync : Intrinsic<[llvm_void_ty], [], [IntrWriteMem]>;
def int_ppc_sync : Intrinsic<[], [], [IntrWriteMem]>;
}
@ -86,23 +86,23 @@ class PowerPC_Vec_WWW_Intrinsic<string GCCIntSuffix>
let TargetPrefix = "ppc" in { // All intrinsics start with "llvm.ppc.".
// Data Stream Control.
def int_ppc_altivec_dss : GCCBuiltin<"__builtin_altivec_dss">,
Intrinsic<[llvm_void_ty], [llvm_i32_ty], [IntrWriteMem]>;
Intrinsic<[], [llvm_i32_ty], [IntrWriteMem]>;
def int_ppc_altivec_dssall : GCCBuiltin<"__builtin_altivec_dssall">,
Intrinsic<[llvm_void_ty], [], [IntrWriteMem]>;
Intrinsic<[], [], [IntrWriteMem]>;
def int_ppc_altivec_dst : GCCBuiltin<"__builtin_altivec_dst">,
Intrinsic<[llvm_void_ty],
Intrinsic<[],
[llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty],
[IntrWriteMem]>;
def int_ppc_altivec_dstt : GCCBuiltin<"__builtin_altivec_dstt">,
Intrinsic<[llvm_void_ty],
Intrinsic<[],
[llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty],
[IntrWriteMem]>;
def int_ppc_altivec_dstst : GCCBuiltin<"__builtin_altivec_dstst">,
Intrinsic<[llvm_void_ty],
Intrinsic<[],
[llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty],
[IntrWriteMem]>;
def int_ppc_altivec_dststt : GCCBuiltin<"__builtin_altivec_dststt">,
Intrinsic<[llvm_void_ty],
Intrinsic<[],
[llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty],
[IntrWriteMem]>;
@ -110,7 +110,7 @@ let TargetPrefix = "ppc" in { // All intrinsics start with "llvm.ppc.".
def int_ppc_altivec_mfvscr : GCCBuiltin<"__builtin_altivec_mfvscr">,
Intrinsic<[llvm_v8i16_ty], [], [IntrReadMem]>;
def int_ppc_altivec_mtvscr : GCCBuiltin<"__builtin_altivec_mtvscr">,
Intrinsic<[llvm_void_ty], [llvm_v4i32_ty], [IntrWriteMem]>;
Intrinsic<[], [llvm_v4i32_ty], [IntrWriteMem]>;
// Loads. These don't map directly to GCC builtins because they represent the
@ -129,19 +129,19 @@ let TargetPrefix = "ppc" in { // All intrinsics start with "llvm.ppc.".
// Stores. These don't map directly to GCC builtins because they represent the
// source address with a single pointer.
def int_ppc_altivec_stvx :
Intrinsic<[llvm_void_ty], [llvm_v4i32_ty, llvm_ptr_ty],
Intrinsic<[], [llvm_v4i32_ty, llvm_ptr_ty],
[IntrWriteMem]>;
def int_ppc_altivec_stvxl :
Intrinsic<[llvm_void_ty], [llvm_v4i32_ty, llvm_ptr_ty],
Intrinsic<[], [llvm_v4i32_ty, llvm_ptr_ty],
[IntrWriteMem]>;
def int_ppc_altivec_stvebx :
Intrinsic<[llvm_void_ty], [llvm_v16i8_ty, llvm_ptr_ty],
Intrinsic<[], [llvm_v16i8_ty, llvm_ptr_ty],
[IntrWriteMem]>;
def int_ppc_altivec_stvehx :
Intrinsic<[llvm_void_ty], [llvm_v8i16_ty, llvm_ptr_ty],
Intrinsic<[], [llvm_v8i16_ty, llvm_ptr_ty],
[IntrWriteMem]>;
def int_ppc_altivec_stvewx :
Intrinsic<[llvm_void_ty], [llvm_v4i32_ty, llvm_ptr_ty],
Intrinsic<[], [llvm_v4i32_ty, llvm_ptr_ty],
[IntrWriteMem]>;
// Comparisons setting a vector.

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@ -142,25 +142,25 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
// SIMD store ops
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_sse_storeu_ps : GCCBuiltin<"__builtin_ia32_storeups">,
Intrinsic<[llvm_void_ty], [llvm_ptr_ty,
Intrinsic<[], [llvm_ptr_ty,
llvm_v4f32_ty], [IntrWriteMem]>;
}
// Cacheability support ops
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_sse_movnt_ps : GCCBuiltin<"__builtin_ia32_movntps">,
Intrinsic<[llvm_void_ty], [llvm_ptr_ty,
Intrinsic<[], [llvm_ptr_ty,
llvm_v4f32_ty], [IntrWriteMem]>;
def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">,
Intrinsic<[llvm_void_ty], [], [IntrWriteMem]>;
Intrinsic<[], [], [IntrWriteMem]>;
}
// Control register.
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_sse_stmxcsr :
Intrinsic<[llvm_void_ty], [llvm_ptr_ty], [IntrWriteMem]>;
Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>;
def int_x86_sse_ldmxcsr :
Intrinsic<[llvm_void_ty], [llvm_ptr_ty], [IntrWriteMem]>;
Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>;
}
// Misc.
@ -458,26 +458,26 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
// SIMD store ops
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_sse2_storeu_pd : GCCBuiltin<"__builtin_ia32_storeupd">,
Intrinsic<[llvm_void_ty], [llvm_ptr_ty,
Intrinsic<[], [llvm_ptr_ty,
llvm_v2f64_ty], [IntrWriteMem]>;
def int_x86_sse2_storeu_dq : GCCBuiltin<"__builtin_ia32_storedqu">,
Intrinsic<[llvm_void_ty], [llvm_ptr_ty,
Intrinsic<[], [llvm_ptr_ty,
llvm_v16i8_ty], [IntrWriteMem]>;
def int_x86_sse2_storel_dq : GCCBuiltin<"__builtin_ia32_storelv4si">,
Intrinsic<[llvm_void_ty], [llvm_ptr_ty,
Intrinsic<[], [llvm_ptr_ty,
llvm_v4i32_ty], [IntrWriteMem]>;
}
// Cacheability support ops
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_sse2_movnt_dq : GCCBuiltin<"__builtin_ia32_movntdq">,
Intrinsic<[llvm_void_ty], [llvm_ptr_ty,
Intrinsic<[], [llvm_ptr_ty,
llvm_v2i64_ty], [IntrWriteMem]>;
def int_x86_sse2_movnt_pd : GCCBuiltin<"__builtin_ia32_movntpd">,
Intrinsic<[llvm_void_ty], [llvm_ptr_ty,
Intrinsic<[], [llvm_ptr_ty,
llvm_v2f64_ty], [IntrWriteMem]>;
def int_x86_sse2_movnt_i : GCCBuiltin<"__builtin_ia32_movnti">,
Intrinsic<[llvm_void_ty], [llvm_ptr_ty,
Intrinsic<[], [llvm_ptr_ty,
llvm_i32_ty], [IntrWriteMem]>;
}
@ -497,14 +497,14 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_sse2_pmovmskb_128 : GCCBuiltin<"__builtin_ia32_pmovmskb128">,
Intrinsic<[llvm_i32_ty], [llvm_v16i8_ty], [IntrNoMem]>;
def int_x86_sse2_maskmov_dqu : GCCBuiltin<"__builtin_ia32_maskmovdqu">,
Intrinsic<[llvm_void_ty], [llvm_v16i8_ty,
Intrinsic<[], [llvm_v16i8_ty,
llvm_v16i8_ty, llvm_ptr_ty], [IntrWriteMem]>;
def int_x86_sse2_clflush : GCCBuiltin<"__builtin_ia32_clflush">,
Intrinsic<[llvm_void_ty], [llvm_ptr_ty], [IntrWriteMem]>;
Intrinsic<[], [llvm_ptr_ty], [IntrWriteMem]>;
def int_x86_sse2_lfence : GCCBuiltin<"__builtin_ia32_lfence">,
Intrinsic<[llvm_void_ty], [], [IntrWriteMem]>;
Intrinsic<[], [], [IntrWriteMem]>;
def int_x86_sse2_mfence : GCCBuiltin<"__builtin_ia32_mfence">,
Intrinsic<[llvm_void_ty], [], [IntrWriteMem]>;
Intrinsic<[], [], [IntrWriteMem]>;
}
//===----------------------------------------------------------------------===//
@ -545,10 +545,10 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
// Thread synchronization ops.
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_sse3_monitor : GCCBuiltin<"__builtin_ia32_monitor">,
Intrinsic<[llvm_void_ty], [llvm_ptr_ty,
Intrinsic<[], [llvm_ptr_ty,
llvm_i32_ty, llvm_i32_ty], [IntrWriteMem]>;
def int_x86_sse3_mwait : GCCBuiltin<"__builtin_ia32_mwait">,
Intrinsic<[llvm_void_ty], [llvm_i32_ty,
Intrinsic<[], [llvm_i32_ty,
llvm_i32_ty], [IntrWriteMem]>;
}
@ -973,9 +973,9 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
// Empty MMX state op.
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_mmx_emms : GCCBuiltin<"__builtin_ia32_emms">,
Intrinsic<[llvm_void_ty], [], [IntrWriteMem]>;
Intrinsic<[], [], [IntrWriteMem]>;
def int_x86_mmx_femms : GCCBuiltin<"__builtin_ia32_femms">,
Intrinsic<[llvm_void_ty], [], [IntrWriteMem]>;
Intrinsic<[], [], [IntrWriteMem]>;
}
// Integer arithmetic ops.
@ -1151,7 +1151,7 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
// Misc.
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_mmx_maskmovq : GCCBuiltin<"__builtin_ia32_maskmovq">,
Intrinsic<[llvm_void_ty],
Intrinsic<[],
[llvm_v8i8_ty, llvm_v8i8_ty, llvm_ptr_ty],
[IntrWriteMem]>;
@ -1159,6 +1159,6 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
Intrinsic<[llvm_i32_ty], [llvm_v8i8_ty], [IntrNoMem]>;
def int_x86_mmx_movnt_dq : GCCBuiltin<"__builtin_ia32_movntq">,
Intrinsic<[llvm_void_ty], [llvm_ptr_ty,
Intrinsic<[], [llvm_ptr_ty,
llvm_v1i64_ty], [IntrWriteMem]>;
}

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@ -21,14 +21,14 @@ let TargetPrefix = "bfin", isTarget = 1 in {
// Execute csync instruction with workarounds
def int_bfin_csync : GCCBuiltin<"__builtin_bfin_csync">,
Intrinsic<[llvm_void_ty]>;
Intrinsic<[]>;
// Execute ssync instruction with workarounds
def int_bfin_ssync : GCCBuiltin<"__builtin_bfin_ssync">,
Intrinsic<[llvm_void_ty]>;
Intrinsic<[]>;
// Execute idle instruction with workarounds
def int_bfin_idle : GCCBuiltin<"__builtin_bfin_idle">,
Intrinsic<[llvm_void_ty]>;
Intrinsic<[]>;
}

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@ -21,11 +21,11 @@ let TargetPrefix = "mblaze", isTarget = 1 in {
[llvm_i32_ty],
[IntrWriteMem]>;
class MBFSL_Put_Intrinsic : Intrinsic<[llvm_void_ty],
class MBFSL_Put_Intrinsic : Intrinsic<[],
[llvm_i32_ty, llvm_i32_ty],
[IntrWriteMem]>;
class MBFSL_PutT_Intrinsic : Intrinsic<[llvm_void_ty],
class MBFSL_PutT_Intrinsic : Intrinsic<[],
[llvm_i32_ty],
[IntrWriteMem]>;
}