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[X86] Teach disassembler to handle illegal immediates on AVX512 integer compare instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227302 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper
parent
f3a2214da8
commit
aef361807e
@ -386,6 +386,135 @@ static void translateImmediate(MCInst &mcInst, uint64_t immediate,
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// Switch opcode to the one that doesn't get special printing.
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mcInst.setOpcode(NewOpc);
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}
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} else if (type == TYPE_AVX512ICC) {
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if (immediate >= 8 || ((immediate & 0x3) == 3)) {
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unsigned NewOpc;
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switch (mcInst.getOpcode()) {
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default: llvm_unreachable("unexpected opcode");
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case X86::VPCMPBZ128rmi: NewOpc = X86::VPCMPBZ128rmi_alt; break;
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case X86::VPCMPBZ128rmik: NewOpc = X86::VPCMPBZ128rmik_alt; break;
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case X86::VPCMPBZ128rri: NewOpc = X86::VPCMPBZ128rri_alt; break;
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case X86::VPCMPBZ128rrik: NewOpc = X86::VPCMPBZ128rrik_alt; break;
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case X86::VPCMPBZ256rmi: NewOpc = X86::VPCMPBZ256rmi_alt; break;
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case X86::VPCMPBZ256rmik: NewOpc = X86::VPCMPBZ256rmik_alt; break;
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case X86::VPCMPBZ256rri: NewOpc = X86::VPCMPBZ256rri_alt; break;
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case X86::VPCMPBZ256rrik: NewOpc = X86::VPCMPBZ256rrik_alt; break;
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case X86::VPCMPBZrmi: NewOpc = X86::VPCMPBZrmi_alt; break;
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case X86::VPCMPBZrmik: NewOpc = X86::VPCMPBZrmik_alt; break;
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case X86::VPCMPBZrri: NewOpc = X86::VPCMPBZrri_alt; break;
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case X86::VPCMPBZrrik: NewOpc = X86::VPCMPBZrrik_alt; break;
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case X86::VPCMPDZ128rmi: NewOpc = X86::VPCMPDZ128rmi_alt; break;
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case X86::VPCMPDZ128rmib: NewOpc = X86::VPCMPDZ128rmib_alt; break;
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case X86::VPCMPDZ128rmibk: NewOpc = X86::VPCMPDZ128rmibk_alt; break;
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case X86::VPCMPDZ128rmik: NewOpc = X86::VPCMPDZ128rmik_alt; break;
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case X86::VPCMPDZ128rri: NewOpc = X86::VPCMPDZ128rri_alt; break;
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case X86::VPCMPDZ128rrik: NewOpc = X86::VPCMPDZ128rrik_alt; break;
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case X86::VPCMPDZ256rmi: NewOpc = X86::VPCMPDZ256rmi_alt; break;
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case X86::VPCMPDZ256rmib: NewOpc = X86::VPCMPDZ256rmib_alt; break;
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case X86::VPCMPDZ256rmibk: NewOpc = X86::VPCMPDZ256rmibk_alt; break;
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case X86::VPCMPDZ256rmik: NewOpc = X86::VPCMPDZ256rmik_alt; break;
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case X86::VPCMPDZ256rri: NewOpc = X86::VPCMPDZ256rri_alt; break;
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case X86::VPCMPDZ256rrik: NewOpc = X86::VPCMPDZ256rrik_alt; break;
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case X86::VPCMPDZrmi: NewOpc = X86::VPCMPDZrmi_alt; break;
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case X86::VPCMPDZrmib: NewOpc = X86::VPCMPDZrmib_alt; break;
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case X86::VPCMPDZrmibk: NewOpc = X86::VPCMPDZrmibk_alt; break;
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case X86::VPCMPDZrmik: NewOpc = X86::VPCMPDZrmik_alt; break;
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case X86::VPCMPDZrri: NewOpc = X86::VPCMPDZrri_alt; break;
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case X86::VPCMPDZrrik: NewOpc = X86::VPCMPDZrrik_alt; break;
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case X86::VPCMPQZ128rmi: NewOpc = X86::VPCMPQZ128rmi_alt; break;
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case X86::VPCMPQZ128rmib: NewOpc = X86::VPCMPQZ128rmib_alt; break;
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case X86::VPCMPQZ128rmibk: NewOpc = X86::VPCMPQZ128rmibk_alt; break;
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case X86::VPCMPQZ128rmik: NewOpc = X86::VPCMPQZ128rmik_alt; break;
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case X86::VPCMPQZ128rri: NewOpc = X86::VPCMPQZ128rri_alt; break;
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case X86::VPCMPQZ128rrik: NewOpc = X86::VPCMPQZ128rrik_alt; break;
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case X86::VPCMPQZ256rmi: NewOpc = X86::VPCMPQZ256rmi_alt; break;
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case X86::VPCMPQZ256rmib: NewOpc = X86::VPCMPQZ256rmib_alt; break;
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case X86::VPCMPQZ256rmibk: NewOpc = X86::VPCMPQZ256rmibk_alt; break;
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case X86::VPCMPQZ256rmik: NewOpc = X86::VPCMPQZ256rmik_alt; break;
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case X86::VPCMPQZ256rri: NewOpc = X86::VPCMPQZ256rri_alt; break;
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case X86::VPCMPQZ256rrik: NewOpc = X86::VPCMPQZ256rrik_alt; break;
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case X86::VPCMPQZrmi: NewOpc = X86::VPCMPQZrmi_alt; break;
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case X86::VPCMPQZrmib: NewOpc = X86::VPCMPQZrmib_alt; break;
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case X86::VPCMPQZrmibk: NewOpc = X86::VPCMPQZrmibk_alt; break;
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case X86::VPCMPQZrmik: NewOpc = X86::VPCMPQZrmik_alt; break;
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case X86::VPCMPQZrri: NewOpc = X86::VPCMPQZrri_alt; break;
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case X86::VPCMPQZrrik: NewOpc = X86::VPCMPQZrrik_alt; break;
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case X86::VPCMPUBZ128rmi: NewOpc = X86::VPCMPUBZ128rmi_alt; break;
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case X86::VPCMPUBZ128rmik: NewOpc = X86::VPCMPUBZ128rmik_alt; break;
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case X86::VPCMPUBZ128rri: NewOpc = X86::VPCMPUBZ128rri_alt; break;
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case X86::VPCMPUBZ128rrik: NewOpc = X86::VPCMPUBZ128rrik_alt; break;
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case X86::VPCMPUBZ256rmi: NewOpc = X86::VPCMPUBZ256rmi_alt; break;
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case X86::VPCMPUBZ256rmik: NewOpc = X86::VPCMPUBZ256rmik_alt; break;
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case X86::VPCMPUBZ256rri: NewOpc = X86::VPCMPUBZ256rri_alt; break;
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case X86::VPCMPUBZ256rrik: NewOpc = X86::VPCMPUBZ256rrik_alt; break;
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case X86::VPCMPUBZrmi: NewOpc = X86::VPCMPUBZrmi_alt; break;
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case X86::VPCMPUBZrmik: NewOpc = X86::VPCMPUBZrmik_alt; break;
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case X86::VPCMPUBZrri: NewOpc = X86::VPCMPUBZrri_alt; break;
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case X86::VPCMPUBZrrik: NewOpc = X86::VPCMPUBZrrik_alt; break;
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case X86::VPCMPUDZ128rmi: NewOpc = X86::VPCMPUDZ128rmi_alt; break;
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case X86::VPCMPUDZ128rmib: NewOpc = X86::VPCMPUDZ128rmib_alt; break;
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case X86::VPCMPUDZ128rmibk: NewOpc = X86::VPCMPUDZ128rmibk_alt; break;
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case X86::VPCMPUDZ128rmik: NewOpc = X86::VPCMPUDZ128rmik_alt; break;
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case X86::VPCMPUDZ128rri: NewOpc = X86::VPCMPUDZ128rri_alt; break;
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case X86::VPCMPUDZ128rrik: NewOpc = X86::VPCMPUDZ128rrik_alt; break;
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case X86::VPCMPUDZ256rmi: NewOpc = X86::VPCMPUDZ256rmi_alt; break;
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case X86::VPCMPUDZ256rmib: NewOpc = X86::VPCMPUDZ256rmib_alt; break;
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case X86::VPCMPUDZ256rmibk: NewOpc = X86::VPCMPUDZ256rmibk_alt; break;
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case X86::VPCMPUDZ256rmik: NewOpc = X86::VPCMPUDZ256rmik_alt; break;
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case X86::VPCMPUDZ256rri: NewOpc = X86::VPCMPUDZ256rri_alt; break;
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case X86::VPCMPUDZ256rrik: NewOpc = X86::VPCMPUDZ256rrik_alt; break;
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case X86::VPCMPUDZrmi: NewOpc = X86::VPCMPUDZrmi_alt; break;
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case X86::VPCMPUDZrmib: NewOpc = X86::VPCMPUDZrmib_alt; break;
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case X86::VPCMPUDZrmibk: NewOpc = X86::VPCMPUDZrmibk_alt; break;
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case X86::VPCMPUDZrmik: NewOpc = X86::VPCMPUDZrmik_alt; break;
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case X86::VPCMPUDZrri: NewOpc = X86::VPCMPUDZrri_alt; break;
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case X86::VPCMPUDZrrik: NewOpc = X86::VPCMPUDZrrik_alt; break;
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case X86::VPCMPUQZ128rmi: NewOpc = X86::VPCMPUQZ128rmi_alt; break;
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case X86::VPCMPUQZ128rmib: NewOpc = X86::VPCMPUQZ128rmib_alt; break;
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case X86::VPCMPUQZ128rmibk: NewOpc = X86::VPCMPUQZ128rmibk_alt; break;
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case X86::VPCMPUQZ128rmik: NewOpc = X86::VPCMPUQZ128rmik_alt; break;
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case X86::VPCMPUQZ128rri: NewOpc = X86::VPCMPUQZ128rri_alt; break;
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case X86::VPCMPUQZ128rrik: NewOpc = X86::VPCMPUQZ128rrik_alt; break;
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case X86::VPCMPUQZ256rmi: NewOpc = X86::VPCMPUQZ256rmi_alt; break;
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case X86::VPCMPUQZ256rmib: NewOpc = X86::VPCMPUQZ256rmib_alt; break;
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case X86::VPCMPUQZ256rmibk: NewOpc = X86::VPCMPUQZ256rmibk_alt; break;
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case X86::VPCMPUQZ256rmik: NewOpc = X86::VPCMPUQZ256rmik_alt; break;
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case X86::VPCMPUQZ256rri: NewOpc = X86::VPCMPUQZ256rri_alt; break;
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case X86::VPCMPUQZ256rrik: NewOpc = X86::VPCMPUQZ256rrik_alt; break;
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case X86::VPCMPUQZrmi: NewOpc = X86::VPCMPUQZrmi_alt; break;
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case X86::VPCMPUQZrmib: NewOpc = X86::VPCMPUQZrmib_alt; break;
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case X86::VPCMPUQZrmibk: NewOpc = X86::VPCMPUQZrmibk_alt; break;
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case X86::VPCMPUQZrmik: NewOpc = X86::VPCMPUQZrmik_alt; break;
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case X86::VPCMPUQZrri: NewOpc = X86::VPCMPUQZrri_alt; break;
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case X86::VPCMPUQZrrik: NewOpc = X86::VPCMPUQZrrik_alt; break;
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case X86::VPCMPUWZ128rmi: NewOpc = X86::VPCMPUWZ128rmi_alt; break;
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case X86::VPCMPUWZ128rmik: NewOpc = X86::VPCMPUWZ128rmik_alt; break;
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case X86::VPCMPUWZ128rri: NewOpc = X86::VPCMPUWZ128rri_alt; break;
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case X86::VPCMPUWZ128rrik: NewOpc = X86::VPCMPUWZ128rrik_alt; break;
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case X86::VPCMPUWZ256rmi: NewOpc = X86::VPCMPUWZ256rmi_alt; break;
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case X86::VPCMPUWZ256rmik: NewOpc = X86::VPCMPUWZ256rmik_alt; break;
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case X86::VPCMPUWZ256rri: NewOpc = X86::VPCMPUWZ256rri_alt; break;
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case X86::VPCMPUWZ256rrik: NewOpc = X86::VPCMPUWZ256rrik_alt; break;
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case X86::VPCMPUWZrmi: NewOpc = X86::VPCMPUWZrmi_alt; break;
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case X86::VPCMPUWZrmik: NewOpc = X86::VPCMPUWZrmik_alt; break;
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case X86::VPCMPUWZrri: NewOpc = X86::VPCMPUWZrri_alt; break;
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case X86::VPCMPUWZrrik: NewOpc = X86::VPCMPUWZrrik_alt; break;
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case X86::VPCMPWZ128rmi: NewOpc = X86::VPCMPWZ128rmi_alt; break;
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case X86::VPCMPWZ128rmik: NewOpc = X86::VPCMPWZ128rmik_alt; break;
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case X86::VPCMPWZ128rri: NewOpc = X86::VPCMPWZ128rri_alt; break;
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case X86::VPCMPWZ128rrik: NewOpc = X86::VPCMPWZ128rrik_alt; break;
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case X86::VPCMPWZ256rmi: NewOpc = X86::VPCMPWZ256rmi_alt; break;
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case X86::VPCMPWZ256rmik: NewOpc = X86::VPCMPWZ256rmik_alt; break;
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case X86::VPCMPWZ256rri: NewOpc = X86::VPCMPWZ256rri_alt; break;
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case X86::VPCMPWZ256rrik: NewOpc = X86::VPCMPWZ256rrik_alt; break;
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case X86::VPCMPWZrmi: NewOpc = X86::VPCMPWZrmi_alt; break;
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case X86::VPCMPWZrmik: NewOpc = X86::VPCMPWZrmik_alt; break;
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case X86::VPCMPWZrri: NewOpc = X86::VPCMPWZrri_alt; break;
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case X86::VPCMPWZrrik: NewOpc = X86::VPCMPWZrrik_alt; break;
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}
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// Switch opcode to the one that doesn't get special printing.
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mcInst.setOpcode(NewOpc);
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}
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}
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switch (type) {
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@ -406,6 +406,7 @@ enum OperandEncoding {
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ENUM_ENTRY(TYPE_IMM64, "8-byte") \
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ENUM_ENTRY(TYPE_IMM3, "1-byte immediate operand between 0 and 7") \
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ENUM_ENTRY(TYPE_IMM5, "1-byte immediate operand between 0 and 31") \
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ENUM_ENTRY(TYPE_AVX512ICC, "1-byte immediate operand for AVX512 icmp") \
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ENUM_ENTRY(TYPE_UIMM8, "1-byte unsigned immediate operand") \
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ENUM_ENTRY(TYPE_RM8, "1-byte register or memory operand") \
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ENUM_ENTRY(TYPE_RM16, "2-byte") \
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@ -1366,7 +1366,7 @@ def : Pat<(v8i1 (X86pcmpeqm (v8i32 VR256X:$src1), (v8i32 VR256X:$src2))),
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multiclass avx512_icmp_cc<bits<8> opc, string Suffix, SDNode OpNode,
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X86VectorVTInfo _> {
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def rri : AVX512AIi8<opc, MRMSrcReg,
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(outs _.KRC:$dst), (ins _.RC:$src1, _.RC:$src2, AVXCC:$cc),
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(outs _.KRC:$dst), (ins _.RC:$src1, _.RC:$src2, AVX512ICC:$cc),
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!strconcat("vpcmp${cc}", Suffix,
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"\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
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[(set _.KRC:$dst, (OpNode (_.VT _.RC:$src1), (_.VT _.RC:$src2),
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@ -1374,7 +1374,7 @@ multiclass avx512_icmp_cc<bits<8> opc, string Suffix, SDNode OpNode,
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IIC_SSE_ALU_F32P_RR>, EVEX_4V;
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let mayLoad = 1 in
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def rmi : AVX512AIi8<opc, MRMSrcMem,
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(outs _.KRC:$dst), (ins _.RC:$src1, _.MemOp:$src2, AVXCC:$cc),
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(outs _.KRC:$dst), (ins _.RC:$src1, _.MemOp:$src2, AVX512ICC:$cc),
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!strconcat("vpcmp${cc}", Suffix,
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"\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
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[(set _.KRC:$dst, (OpNode (_.VT _.RC:$src1),
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@ -1383,7 +1383,7 @@ multiclass avx512_icmp_cc<bits<8> opc, string Suffix, SDNode OpNode,
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IIC_SSE_ALU_F32P_RM>, EVEX_4V;
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def rrik : AVX512AIi8<opc, MRMSrcReg,
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(outs _.KRC:$dst), (ins _.KRCWM:$mask, _.RC:$src1, _.RC:$src2,
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AVXCC:$cc),
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AVX512ICC:$cc),
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!strconcat("vpcmp${cc}", Suffix,
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"\t{$src2, $src1, $dst {${mask}}|",
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"$dst {${mask}}, $src1, $src2}"),
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@ -1394,7 +1394,7 @@ multiclass avx512_icmp_cc<bits<8> opc, string Suffix, SDNode OpNode,
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let mayLoad = 1 in
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def rmik : AVX512AIi8<opc, MRMSrcMem,
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(outs _.KRC:$dst), (ins _.KRCWM:$mask, _.RC:$src1, _.MemOp:$src2,
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AVXCC:$cc),
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AVX512ICC:$cc),
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!strconcat("vpcmp${cc}", Suffix,
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"\t{$src2, $src1, $dst {${mask}}|",
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"$dst {${mask}}, $src1, $src2}"),
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@ -1440,7 +1440,7 @@ multiclass avx512_icmp_cc_rmb<bits<8> opc, string Suffix, SDNode OpNode,
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avx512_icmp_cc<opc, Suffix, OpNode, _> {
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def rmib : AVX512AIi8<opc, MRMSrcMem,
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(outs _.KRC:$dst), (ins _.RC:$src1, _.ScalarMemOp:$src2,
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AVXCC:$cc),
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AVX512ICC:$cc),
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!strconcat("vpcmp${cc}", Suffix,
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"\t{${src2}", _.BroadcastStr, ", $src1, $dst|",
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"$dst, $src1, ${src2}", _.BroadcastStr, "}"),
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@ -1450,7 +1450,7 @@ multiclass avx512_icmp_cc_rmb<bits<8> opc, string Suffix, SDNode OpNode,
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IIC_SSE_ALU_F32P_RM>, EVEX_4V, EVEX_B;
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def rmibk : AVX512AIi8<opc, MRMSrcMem,
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(outs _.KRC:$dst), (ins _.KRCWM:$mask, _.RC:$src1,
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_.ScalarMemOp:$src2, AVXCC:$cc),
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_.ScalarMemOp:$src2, AVX512ICC:$cc),
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!strconcat("vpcmp${cc}", Suffix,
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"\t{${src2}", _.BroadcastStr, ", $src1, $dst {${mask}}|",
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"$dst {${mask}}, $src1, ${src2}", _.BroadcastStr, "}"),
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@ -556,6 +556,11 @@ def i8immZExt5 : ImmLeaf<i8, [{
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return Imm >= 0 && Imm < 32;
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}]>;
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def AVX512ICC : Operand<i8> {
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let PrintMethod = "printSSEAVXCC";
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let OperandType = "OPERAND_IMMEDIATE";
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}
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class ImmSExtAsmOperandClass : AsmOperandClass {
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let SuperClasses = [ImmAsmOperand];
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let RenderMethod = "addImmOperands";
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@ -109,3 +109,30 @@
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# CHECK: vaddss 1024(%rdx), %xmm0, %xmm16
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0x62 0xe1 0x7e 0x08 0x58 0x82 0x00 0x04 0x00 0x00
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# CHECK: vpcmpeqd %zmm10, %zmm25, %k5
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0x62 0xd3 0x35 0x40 0x1f 0xea 0x0
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# CHECK: vpcmpltd %zmm10, %zmm25, %k5
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0x62 0xd3 0x35 0x40 0x1f 0xea 0x1
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# CHECK: vpcmpled %zmm10, %zmm25, %k5
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0x62 0xd3 0x35 0x40 0x1f 0xea 0x2
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# CHECK: vpcmpd $3, %zmm10, %zmm25, %k5
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0x62 0xd3 0x35 0x40 0x1f 0xea 0x3
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# CHECK: vpcmpneqd %zmm10, %zmm25, %k5
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0x62 0xd3 0x35 0x40 0x1f 0xea 0x4
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# CHECK: vpcmpnltd %zmm10, %zmm25, %k5
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0x62 0xd3 0x35 0x40 0x1f 0xea 0x5
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# CHECK: vpcmpnled %zmm10, %zmm25, %k5
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0x62 0xd3 0x35 0x40 0x1f 0xea 0x6
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# CHECK: vpcmpd $7, %zmm10, %zmm25, %k5
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0x62 0xd3 0x35 0x40 0x1f 0xea 0x7
|
||||
|
||||
# CHECK: vpcmpd $8, %zmm10, %zmm25, %k5
|
||||
0x62 0xd3 0x35 0x40 0x1f 0xea 0x8
|
||||
|
||||
@ -957,6 +957,7 @@ OperandType RecognizableInstr::typeFromString(const std::string &s,
|
||||
TYPE("i32imm_pcrel", TYPE_REL32)
|
||||
TYPE("SSECC", TYPE_IMM3)
|
||||
TYPE("AVXCC", TYPE_IMM5)
|
||||
TYPE("AVX512ICC", TYPE_AVX512ICC)
|
||||
TYPE("AVX512RC", TYPE_IMM32)
|
||||
TYPE("brtarget32", TYPE_RELv)
|
||||
TYPE("brtarget16", TYPE_RELv)
|
||||
@ -1037,6 +1038,7 @@ RecognizableInstr::immediateEncodingFromString(const std::string &s,
|
||||
ENCODING("i32i8imm", ENCODING_IB)
|
||||
ENCODING("SSECC", ENCODING_IB)
|
||||
ENCODING("AVXCC", ENCODING_IB)
|
||||
ENCODING("AVX512ICC", ENCODING_IB)
|
||||
ENCODING("AVX512RC", ENCODING_IB)
|
||||
ENCODING("i16imm", ENCODING_Iv)
|
||||
ENCODING("i16i8imm", ENCODING_IB)
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user