create the raddr addressing mode that matches any register and the frame index

use raddr for the ldr instruction. This removes a dummy mov from the assembly output
remove SelectFrameIndex
remove isLoadFromStackSlot
remove isStoreToStackSlot


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29079 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMISelDAGToDAG.cpp

@@ -95,8 +95,7 @@ static SDOperand LowerFORMAL_ARGUMENT(SDOperand Op, SelectionDAG &DAG,
     // If the argument is actually used, emit a load from the right stack
       // slot.
     if (!Op.Val->hasNUsesOfValue(0, ArgNo)) {
-      //hack
+      unsigned ArgOffset = (ArgNo - num_regs) * 4;
-      unsigned ArgOffset = 0;
 
       MachineFrameInfo *MFI = MF.getFrameInfo();
       unsigned ObjSize = MVT::getSizeInBits(ObjectVT)/8;
@@ -165,6 +164,7 @@ public:
 
   void Select(SDOperand &Result, SDOperand Op);
   virtual void InstructionSelectBasicBlock(SelectionDAG &DAG);
+  bool SelectAddrReg(SDOperand N, SDOperand &Base);
 
   // Include the pieces autogenerated from the target description.
 #include "ARMGenDAGISel.inc"
@@ -183,12 +183,13 @@ void ARMDAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) {
   ScheduleAndEmitDAG(DAG);
 }
 
-static void SelectFrameIndex(SelectionDAG *CurDAG, SDOperand &Result, SDNode *N, SDOperand Op) {
+bool ARMDAGToDAGISel::SelectAddrReg(SDOperand N, SDOperand &Base) {
-  int FI = cast<FrameIndexSDNode>(N)->getIndex();
+  if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(N)) {
-
+    Base = CurDAG->getTargetFrameIndex(FI->getIndex(), N.getValueType());
-  SDOperand TFI = CurDAG->getTargetFrameIndex(FI, Op.getValueType());
+  }
-
+  else
-  Result = CurDAG->SelectNodeTo(N, ARM::movri, Op.getValueType(), TFI);
+    Base = N;
+  return true;      //any address fits in a register
 }
 
 void ARMDAGToDAGISel::Select(SDOperand &Result, SDOperand Op) {
@@ -198,10 +199,6 @@ void ARMDAGToDAGISel::Select(SDOperand &Result, SDOperand Op) {
   default:
     SelectCode(Result, Op);
     break;
-
-  case ISD::FrameIndex:
-    SelectFrameIndex(CurDAG, Result, N, Op);
-    break;
   }
 }
 

lib/Target/ARM/ARMInstrInfo.cpp

@@ -41,25 +41,3 @@ bool ARMInstrInfo::isMoveInstr(const MachineInstr &MI,
     return true;
   }
 }
-
-/// isLoadFromStackSlot - If the specified machine instruction is a direct
-/// load from a stack slot, return the virtual or physical register number of
-/// the destination along with the FrameIndex of the loaded stack slot.  If
-/// not, return 0.  This predicate must return 0 if the instruction has
-/// any side effects other than loading from the stack slot.
-unsigned ARMInstrInfo::isLoadFromStackSlot(MachineInstr *MI,
-                                             int &FrameIndex) const {
-  assert(0 && "not implemented");
-  return 0;
-}
-
-/// isStoreToStackSlot - If the specified machine instruction is a direct
-/// store to a stack slot, return the virtual or physical register number of
-/// the source reg along with the FrameIndex of the loaded stack slot.  If
-/// not, return 0.  This predicate must return 0 if the instruction has
-/// any side effects other than storing to the stack slot.
-unsigned ARMInstrInfo::isStoreToStackSlot(MachineInstr *MI,
-                                            int &FrameIndex) const {
-  assert(0 && "not implemented");
-  return 0;
-}

lib/Target/ARM/ARMInstrInfo.h

@@ -36,20 +36,6 @@ public:
   ///
   virtual bool isMoveInstr(const MachineInstr &MI,
                            unsigned &SrcReg, unsigned &DstReg) const;
-
-  /// isLoadFromStackSlot - If the specified machine instruction is a direct
-  /// load from a stack slot, return the virtual or physical register number of
-  /// the destination along with the FrameIndex of the loaded stack slot.  If
-  /// not, return 0.  This predicate must return 0 if the instruction has
-  /// any side effects other than loading from the stack slot.
-  virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
-
-  /// isStoreToStackSlot - If the specified machine instruction is a direct
-  /// store to a stack slot, return the virtual or physical register number of
-  /// the source reg along with the FrameIndex of the loaded stack slot.  If
-  /// not, return 0.  This predicate must return 0 if the instruction has
-  /// any side effects other than storing to the stack slot.
-  virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
 };
 
 }

lib/Target/ARM/ARMInstrInfo.td

@@ -12,7 +12,9 @@
 //
 //===----------------------------------------------------------------------===//
 
-
+// Define ARM specific addressing mode.
+ //register or frame index
+def raddr  : ComplexPattern<iPTR, 1, "SelectAddrReg", []>;
 
 //===----------------------------------------------------------------------===//
 // Instructions
@@ -42,7 +44,7 @@ def bxr: InstARM<(ops IntRegs:$dst), "bx $dst", [(brind IntRegs:$dst)]>;
 
 def ldr   : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
                      "ldr $dst, [$addr]",
-                     [(set IntRegs:$dst, (load IntRegs:$addr))]>;
+                     [(set IntRegs:$dst, (load raddr:$addr))]>;
 
 def str  : InstARM<(ops IntRegs:$src, IntRegs:$addr),
                     "str $src, [$addr]",

lib/Target/ARM/ARMRegisterInfo.cpp

@@ -81,7 +81,7 @@ ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
   MachineBasicBlock &MBB = *MI.getParent();
   MachineFunction &MF = *MBB.getParent();
 
-  assert (MI.getOpcode() == ARM::movri);
+  assert (MI.getOpcode() == ARM::ldr);
 
   unsigned FrameIdx = 1;