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Remove remaining calls to TII::isMoveInstr.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108556 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2010-07-16 21:03:55 +00:00
parent a90c3f600d
commit af462c4b4f
3 changed files with 1 additions and 54 deletions
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16
include/llvm/Target/TargetInstrInfo.h
View File

@ -113,22 +113,6 @@ public:
return false;
}
/// isIdentityCopy - Return true if the instruction is a copy (or
/// extract_subreg, insert_subreg, subreg_to_reg) where the source and
/// destination registers are the same.
bool isIdentityCopy(const MachineInstr &MI) const {
unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx;
if (isMoveInstr(MI, SrcReg, DstReg, SrcSubIdx, DstSubIdx) &&
SrcReg == DstReg)
return true;
if ((MI.getOpcode() == TargetOpcode::INSERT_SUBREG ||
MI.getOpcode() == TargetOpcode::SUBREG_TO_REG) &&
MI.getOperand(0).getReg() == MI.getOperand(2).getReg())
return true;
return false;
}
/// isLoadFromStackSlot - If the specified machine instruction is a direct
/// load from a stack slot, return the virtual or physical register number of
/// the destination along with the FrameIndex of the loaded stack slot. If

3
lib/CodeGen/CalcSpillWeights.cpp
View File

@ -43,7 +43,6 @@ bool CalculateSpillWeights::runOnMachineFunction(MachineFunction &fn) {
LiveIntervals *lis = &getAnalysis<LiveIntervals>();
MachineLoopInfo *loopInfo = &getAnalysis<MachineLoopInfo>();
const TargetInstrInfo *tii = fn.getTarget().getInstrInfo();
MachineRegisterInfo *mri = &fn.getRegInfo();
SmallSet<unsigned, 4> processed;
@ -58,7 +57,7 @@ bool CalculateSpillWeights::runOnMachineFunction(MachineFunction &fn) {
for (MachineBasicBlock::const_iterator mii = mbb->begin(), mie = mbb->end();
mii != mie; ++mii) {
const MachineInstr *mi = mii;
if (tii->isIdentityCopy(*mi) || mi->isImplicitDef() || mi->isDebugValue())
if (mi->isIdentityCopy() || mi->isImplicitDef() || mi->isDebugValue())
continue;
for (unsigned i = 0, e = mi->getNumOperands(); i != e; ++i) {

36
lib/CodeGen/VirtRegRewriter.cpp
View File

@ -2442,28 +2442,6 @@ LocalRewriter::RewriteMBB(LiveIntervals *LIs,
Spills.disallowClobberPhysReg(VirtReg);
goto ProcessNextInst;
}
unsigned Src, Dst, SrcSR, DstSR;
if (TII->isMoveInstr(MI, Src, Dst, SrcSR, DstSR) &&
Src == Dst && SrcSR == DstSR &&
!MI.findRegisterUseOperand(Src)->isUndef()) {
++NumDCE;
DEBUG(dbgs() << "Removing now-noop copy: " << MI);
SmallVector<unsigned, 2> KillRegs;
InvalidateKills(MI, TRI, RegKills, KillOps, &KillRegs);
if (MO.isDead() && !KillRegs.empty()) {
// Source register or an implicit super/sub-register use is killed.
assert(KillRegs[0] == Dst ||
TRI->isSubRegister(KillRegs[0], Dst) ||
TRI->isSuperRegister(KillRegs[0], Dst));
// Last def is now dead.
TransferDeadness(Src, RegKills, KillOps);
}
VRM->RemoveMachineInstrFromMaps(&MI);
MBB->erase(&MI);
Erased = true;
Spills.disallowClobberPhysReg(VirtReg);
goto ProcessNextInst;
}
// If it's not a no-op copy, it clobbers the value in the destreg.
Spills.ClobberPhysReg(VirtReg);
@ -2541,20 +2519,6 @@ LocalRewriter::RewriteMBB(LiveIntervals *LIs,
UpdateKills(*LastStore, TRI, RegKills, KillOps);
goto ProcessNextInst;
}
{
unsigned Src, Dst, SrcSR, DstSR;
if (TII->isMoveInstr(MI, Src, Dst, SrcSR, DstSR) &&
Src == Dst && SrcSR == DstSR) {
++NumDCE;
DEBUG(dbgs() << "Removing now-noop copy: " << MI);
InvalidateKills(MI, TRI, RegKills, KillOps);
VRM->RemoveMachineInstrFromMaps(&MI);
MBB->erase(&MI);
Erased = true;
UpdateKills(*LastStore, TRI, RegKills, KillOps);
goto ProcessNextInst;
}
}
}
}
ProcessNextInst: