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Fix constant island pass's handling of tBR_JTr. The offset of the instruction does not have to be 4-byte aligned. Rather, it's the offset + 2 that must be aligned since the instruction expands into:
mov pc, r1 .align 2 LJTI0_0_0: .long LBB0_14 This fixes rdar://8213383. No test case since it's not possible to come up with a suitable small one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109076 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -366,6 +366,8 @@ bool ARMConstantIslands::runOnMachineFunction(MachineFunction &MF) {
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if (isThumb && !HasFarJump && AFI->isLRSpilledForFarJump())
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MadeChange |= UndoLRSpillRestore();
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DEBUG(errs() << '\n'; dumpBBs());
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BBSizes.clear();
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BBOffsets.clear();
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WaterList.clear();
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@ -509,8 +511,11 @@ void ARMConstantIslands::InitialFunctionScan(MachineFunction &MF,
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case ARM::tBR_JTr:
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// A Thumb1 table jump may involve padding; for the offsets to
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// be right, functions containing these must be 4-byte aligned.
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// tBR_JTr expands to a mov pc followed by .align 2 and then the jump
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// table entries. So this code checks whether offset of tBR_JTr + 2
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// is aligned.
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MF.EnsureAlignment(2U);
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if ((Offset+MBBSize)%4 != 0 || HasInlineAsm)
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if ((Offset+MBBSize+2)%4 != 0 || HasInlineAsm)
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// FIXME: Add a pseudo ALIGN instruction instead.
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MBBSize += 2; // padding
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continue; // Does not get an entry in ImmBranches
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@ -915,9 +920,12 @@ void ARMConstantIslands::AdjustBBOffsetsAfter(MachineBasicBlock *BB,
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}
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// Thumb1 jump tables require padding. They should be at the end;
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// following unconditional branches are removed by AnalyzeBranch.
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// tBR_JTr expands to a mov pc followed by .align 2 and then the jump
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// table entries. So this code checks whether offset of tBR_JTr + 2
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// is aligned.
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MachineInstr *ThumbJTMI = prior(MBB->end());
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if (ThumbJTMI->getOpcode() == ARM::tBR_JTr) {
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unsigned NewMIOffset = GetOffsetOf(ThumbJTMI);
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unsigned NewMIOffset = GetOffsetOf(ThumbJTMI) + 2;
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unsigned OldMIOffset = NewMIOffset - delta;
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if ((OldMIOffset%4) == 0 && (NewMIOffset%4) != 0) {
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// remove existing padding
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