From b24fc1c7f7545362fe283730d5532fa7e7375c9e Mon Sep 17 00:00:00 2001 From: Justin Holewinski Date: Sat, 30 Mar 2013 14:29:30 +0000 Subject: [PATCH] [NVPTX] Remove support for SM < 2.0. This was never fully supported anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178417 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/NVPTX/NVPTX.td | 12 ---- lib/Target/NVPTX/NVPTXSubtarget.cpp | 4 +- test/CodeGen/NVPTX/annotations.ll | 2 - test/CodeGen/NVPTX/arithmetic-fp-sm10.ll | 72 ------------------------ test/CodeGen/NVPTX/arithmetic-int.ll | 2 - test/CodeGen/NVPTX/calling-conv.ll | 2 - test/CodeGen/NVPTX/compare-int.ll | 2 - test/CodeGen/NVPTX/convert-fp.ll | 2 - test/CodeGen/NVPTX/convert-int-sm10.ll | 55 ------------------ test/CodeGen/NVPTX/intrinsic-old.ll | 2 - test/CodeGen/NVPTX/intrinsics.ll | 2 - test/CodeGen/NVPTX/ld-addrspace.ll | 2 - test/CodeGen/NVPTX/sm-version-10.ll | 6 -- test/CodeGen/NVPTX/sm-version-11.ll | 6 -- test/CodeGen/NVPTX/sm-version-12.ll | 6 -- test/CodeGen/NVPTX/sm-version-13.ll | 6 -- test/CodeGen/NVPTX/st-addrspace.ll | 2 - test/CodeGen/NVPTX/tuple-literal.ll | 2 +- 18 files changed, 3 insertions(+), 184 deletions(-) delete mode 100644 test/CodeGen/NVPTX/arithmetic-fp-sm10.ll delete mode 100644 test/CodeGen/NVPTX/convert-int-sm10.ll delete mode 100644 test/CodeGen/NVPTX/sm-version-10.ll delete mode 100644 test/CodeGen/NVPTX/sm-version-11.ll delete mode 100644 test/CodeGen/NVPTX/sm-version-12.ll delete mode 100644 test/CodeGen/NVPTX/sm-version-13.ll diff --git a/lib/Target/NVPTX/NVPTX.td b/lib/Target/NVPTX/NVPTX.td index 7aee3595c62..d78b4e81a3e 100644 --- a/lib/Target/NVPTX/NVPTX.td +++ b/lib/Target/NVPTX/NVPTX.td @@ -26,14 +26,6 @@ include "NVPTXInstrInfo.td" //===----------------------------------------------------------------------===// // SM Versions -def SM10 : SubtargetFeature<"sm_10", "SmVersion", "10", - "Target SM 1.0">; -def SM11 : SubtargetFeature<"sm_11", "SmVersion", "11", - "Target SM 1.1">; -def SM12 : SubtargetFeature<"sm_12", "SmVersion", "12", - "Target SM 1.2">; -def SM13 : SubtargetFeature<"sm_13", "SmVersion", "13", - "Target SM 1.3">; def SM20 : SubtargetFeature<"sm_20", "SmVersion", "20", "Target SM 2.0">; def SM21 : SubtargetFeature<"sm_21", "SmVersion", "21", @@ -56,10 +48,6 @@ def PTX31 : SubtargetFeature<"ptx31", "PTXVersion", "31", class Proc Features> : Processor; -def : Proc<"sm_10", [SM10]>; -def : Proc<"sm_11", [SM11]>; -def : Proc<"sm_12", [SM12]>; -def : Proc<"sm_13", [SM13]>; def : Proc<"sm_20", [SM20]>; def : Proc<"sm_21", [SM21]>; def : Proc<"sm_30", [SM30]>; diff --git a/lib/Target/NVPTX/NVPTXSubtarget.cpp b/lib/Target/NVPTX/NVPTXSubtarget.cpp index 7ac1f5a27d2..2dcd73dcff9 100644 --- a/lib/Target/NVPTX/NVPTXSubtarget.cpp +++ b/lib/Target/NVPTX/NVPTXSubtarget.cpp @@ -33,12 +33,12 @@ cl::opt DriverInterface( NVPTXSubtarget::NVPTXSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, bool is64Bit) : NVPTXGenSubtargetInfo(TT, CPU, FS), Is64Bit(is64Bit), PTXVersion(0), - SmVersion(10) { + SmVersion(20) { drvInterface = DriverInterface; // Provide the default CPU if none - std::string defCPU = "sm_10"; + std::string defCPU = "sm_20"; ParseSubtargetFeatures((CPU.empty() ? defCPU : CPU), FS); diff --git a/test/CodeGen/NVPTX/annotations.ll b/test/CodeGen/NVPTX/annotations.ll index d93f688ef1f..39d52d38266 100644 --- a/test/CodeGen/NVPTX/annotations.ll +++ b/test/CodeGen/NVPTX/annotations.ll @@ -1,5 +1,3 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s diff --git a/test/CodeGen/NVPTX/arithmetic-fp-sm10.ll b/test/CodeGen/NVPTX/arithmetic-fp-sm10.ll deleted file mode 100644 index 73c77f56bc9..00000000000 --- a/test/CodeGen/NVPTX/arithmetic-fp-sm10.ll +++ /dev/null @@ -1,72 +0,0 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s - -;; These tests should run for all targets - -;;===-- Basic instruction selection tests ---------------------------------===;; - - -;;; f64 - -define double @fadd_f64(double %a, double %b) { -; CHECK: add.f64 %fl{{[0-9]+}}, %fl{{[0-9]+}}, %fl{{[0-9]+}} -; CHECK: ret - %ret = fadd double %a, %b - ret double %ret -} - -define double @fsub_f64(double %a, double %b) { -; CHECK: sub.f64 %fl{{[0-9]+}}, %fl{{[0-9]+}}, %fl{{[0-9]+}} -; CHECK: ret - %ret = fsub double %a, %b - ret double %ret -} - -define double @fmul_f64(double %a, double %b) { -; CHECK: mul.f64 %fl{{[0-9]+}}, %fl{{[0-9]+}}, %fl{{[0-9]+}} -; CHECK: ret - %ret = fmul double %a, %b - ret double %ret -} - -define double @fdiv_f64(double %a, double %b) { -; CHECK: div.rn.f64 %fl{{[0-9]+}}, %fl{{[0-9]+}}, %fl{{[0-9]+}} -; CHECK: ret - %ret = fdiv double %a, %b - ret double %ret -} - -;; PTX does not have a floating-point rem instruction - - -;;; f32 - -define float @fadd_f32(float %a, float %b) { -; CHECK: add.f32 %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}} -; CHECK: ret - %ret = fadd float %a, %b - ret float %ret -} - -define float @fsub_f32(float %a, float %b) { -; CHECK: sub.f32 %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}} -; CHECK: ret - %ret = fsub float %a, %b - ret float %ret -} - -define float @fmul_f32(float %a, float %b) { -; CHECK: mul.f32 %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}} -; CHECK: ret - %ret = fmul float %a, %b - ret float %ret -} - -define float @fdiv_f32(float %a, float %b) { -; CHECK: div.full.f32 %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}} -; CHECK: ret - %ret = fdiv float %a, %b - ret float %ret -} - -;; PTX does not have a floating-point rem instruction diff --git a/test/CodeGen/NVPTX/arithmetic-int.ll b/test/CodeGen/NVPTX/arithmetic-int.ll index 529f84900af..8d73b7e6c4c 100644 --- a/test/CodeGen/NVPTX/arithmetic-int.ll +++ b/test/CodeGen/NVPTX/arithmetic-int.ll @@ -1,5 +1,3 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s diff --git a/test/CodeGen/NVPTX/calling-conv.ll b/test/CodeGen/NVPTX/calling-conv.ll index 968203e5f70..190a1462adb 100644 --- a/test/CodeGen/NVPTX/calling-conv.ll +++ b/test/CodeGen/NVPTX/calling-conv.ll @@ -1,5 +1,3 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s diff --git a/test/CodeGen/NVPTX/compare-int.ll b/test/CodeGen/NVPTX/compare-int.ll index 12fc7548212..16af0a336dd 100644 --- a/test/CodeGen/NVPTX/compare-int.ll +++ b/test/CodeGen/NVPTX/compare-int.ll @@ -1,5 +1,3 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s diff --git a/test/CodeGen/NVPTX/convert-fp.ll b/test/CodeGen/NVPTX/convert-fp.ll index 21c84379b06..1882121fa72 100644 --- a/test/CodeGen/NVPTX/convert-fp.ll +++ b/test/CodeGen/NVPTX/convert-fp.ll @@ -1,5 +1,3 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s diff --git a/test/CodeGen/NVPTX/convert-int-sm10.ll b/test/CodeGen/NVPTX/convert-int-sm10.ll deleted file mode 100644 index 20716f982e3..00000000000 --- a/test/CodeGen/NVPTX/convert-int-sm10.ll +++ /dev/null @@ -1,55 +0,0 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s - - -; i16 - -define i16 @cvt_i16_i32(i32 %x) { -; CHECK: cvt.u16.u32 %rs{{[0-9]+}}, %r{{[0-9]+}} -; CHECK: ret - %a = trunc i32 %x to i16 - ret i16 %a -} - -define i16 @cvt_i16_i64(i64 %x) { -; CHECK: cvt.u16.u64 %rs{{[0-9]+}}, %rl{{[0-9]+}} -; CHECK: ret - %a = trunc i64 %x to i16 - ret i16 %a -} - - - -; i32 - -define i32 @cvt_i32_i16(i16 %x) { -; CHECK: cvt.u32.u16 %r{{[0-9]+}}, %rs{{[0-9]+}} -; CHECK: ret - %a = zext i16 %x to i32 - ret i32 %a -} - -define i32 @cvt_i32_i64(i64 %x) { -; CHECK: cvt.u32.u64 %r{{[0-9]+}}, %rl{{[0-9]+}} -; CHECK: ret - %a = trunc i64 %x to i32 - ret i32 %a -} - - - -; i64 - -define i64 @cvt_i64_i16(i16 %x) { -; CHECK: cvt.u64.u16 %rl{{[0-9]+}}, %rs{{[0-9]+}} -; CHECK: ret - %a = zext i16 %x to i64 - ret i64 %a -} - -define i64 @cvt_i64_i32(i32 %x) { -; CHECK: cvt.u64.u32 %rl{{[0-9]+}}, %r{{[0-9]+}} -; CHECK: ret - %a = zext i32 %x to i64 - ret i64 %a -} diff --git a/test/CodeGen/NVPTX/intrinsic-old.ll b/test/CodeGen/NVPTX/intrinsic-old.ll index 1c9879c4178..53a28f33379 100644 --- a/test/CodeGen/NVPTX/intrinsic-old.ll +++ b/test/CodeGen/NVPTX/intrinsic-old.ll @@ -1,5 +1,3 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s diff --git a/test/CodeGen/NVPTX/intrinsics.ll b/test/CodeGen/NVPTX/intrinsics.ll index afab60ca96a..8b0357be87c 100644 --- a/test/CodeGen/NVPTX/intrinsics.ll +++ b/test/CodeGen/NVPTX/intrinsics.ll @@ -1,5 +1,3 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s diff --git a/test/CodeGen/NVPTX/ld-addrspace.ll b/test/CodeGen/NVPTX/ld-addrspace.ll index d1f5093df22..3265868d3c5 100644 --- a/test/CodeGen/NVPTX/ld-addrspace.ll +++ b/test/CodeGen/NVPTX/ld-addrspace.ll @@ -1,6 +1,4 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s --check-prefix=PTX32 ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s --check-prefix=PTX32 -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s --check-prefix=PTX64 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s --check-prefix=PTX64 diff --git a/test/CodeGen/NVPTX/sm-version-10.ll b/test/CodeGen/NVPTX/sm-version-10.ll deleted file mode 100644 index 9324a378098..00000000000 --- a/test/CodeGen/NVPTX/sm-version-10.ll +++ /dev/null @@ -1,6 +0,0 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s - - -; CHECK: .target sm_10 - diff --git a/test/CodeGen/NVPTX/sm-version-11.ll b/test/CodeGen/NVPTX/sm-version-11.ll deleted file mode 100644 index 9033a4eba5e..00000000000 --- a/test/CodeGen/NVPTX/sm-version-11.ll +++ /dev/null @@ -1,6 +0,0 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_11 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_11 | FileCheck %s - - -; CHECK: .target sm_11 - diff --git a/test/CodeGen/NVPTX/sm-version-12.ll b/test/CodeGen/NVPTX/sm-version-12.ll deleted file mode 100644 index d8ee85c9010..00000000000 --- a/test/CodeGen/NVPTX/sm-version-12.ll +++ /dev/null @@ -1,6 +0,0 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_12 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_12 | FileCheck %s - - -; CHECK: .target sm_12 - diff --git a/test/CodeGen/NVPTX/sm-version-13.ll b/test/CodeGen/NVPTX/sm-version-13.ll deleted file mode 100644 index ad67d642ce3..00000000000 --- a/test/CodeGen/NVPTX/sm-version-13.ll +++ /dev/null @@ -1,6 +0,0 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_13 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_13 | FileCheck %s - - -; CHECK: .target sm_13 - diff --git a/test/CodeGen/NVPTX/st-addrspace.ll b/test/CodeGen/NVPTX/st-addrspace.ll index 54e04ae6106..0b26d802df8 100644 --- a/test/CodeGen/NVPTX/st-addrspace.ll +++ b/test/CodeGen/NVPTX/st-addrspace.ll @@ -1,6 +1,4 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s --check-prefix=PTX32 ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s --check-prefix=PTX32 -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s --check-prefix=PTX64 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s --check-prefix=PTX64 diff --git a/test/CodeGen/NVPTX/tuple-literal.ll b/test/CodeGen/NVPTX/tuple-literal.ll index 5c0cb2c15c2..2b1f2c4b668 100644 --- a/test/CodeGen/NVPTX/tuple-literal.ll +++ b/test/CodeGen/NVPTX/tuple-literal.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_13 +; RUN: llc < %s -march=nvptx -mcpu=sm_20 define ptx_device void @test_function({i8, i8}*) { ret void