diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h index 43dc78dfc55..9903f09c01d 100644 --- a/include/llvm/CodeGen/MachineInstr.h +++ b/include/llvm/CodeGen/MachineInstr.h @@ -19,7 +19,7 @@ #include "llvm/CodeGen/InstrForest.h" #include "llvm/Support/DataTypes.h" #include "llvm/Support/NonCopyable.h" -#include "llvm/CodeGen/TargetMachine.h" +#include "llvm/Target/Machine.h" template class ValOpIterator; diff --git a/include/llvm/CodeGen/RegClass.h b/include/llvm/CodeGen/RegClass.h index 1d08502445d..efe174617ce 100644 --- a/include/llvm/CodeGen/RegClass.h +++ b/include/llvm/CodeGen/RegClass.h @@ -16,19 +16,14 @@ */ - - #ifndef REG_CLASS_H #define REG_CLASS_H #include "llvm/CodeGen/IGNode.h" #include "llvm/CodeGen/InterferenceGraph.h" -#include "llvm/CodeGen/TargetMachine.h" - - +#include "llvm/Target/Machine.h" #include - typedef vector ReservedColorListType; diff --git a/include/llvm/CodeGen/TargetData.h b/include/llvm/Target/Data.h similarity index 96% rename from include/llvm/CodeGen/TargetData.h rename to include/llvm/Target/Data.h index cf449702b7b..55739503e72 100644 --- a/include/llvm/CodeGen/TargetData.h +++ b/include/llvm/Target/Data.h @@ -1,4 +1,4 @@ -//===-- llvm/TargetData.h - Data size & alignment routines -------*- C++ -*-==// +//===-- llvm/Target/Data.h - Data size & alignment routines ------*- C++ -*-==// // // This file defines target properties related to datatype size/offset/alignment // information. It uses lazy annotations to cache information about how @@ -10,8 +10,8 @@ // //===----------------------------------------------------------------------===// -#ifndef LLVM_CODEGEN_TARGETDATA_H -#define LLVM_CODEGEN_TARGETDATA_H +#ifndef LLVM_TARGET_DATA_H +#define LLVM_TARGET_DATA_H #include "llvm/Type.h" #include diff --git a/include/llvm/CodeGen/TargetMachine.h b/include/llvm/Target/Machine.h similarity index 97% rename from include/llvm/CodeGen/TargetMachine.h rename to include/llvm/Target/Machine.h index 9a72ff974b9..ae0858aff5c 100644 --- a/include/llvm/CodeGen/TargetMachine.h +++ b/include/llvm/Target/Machine.h @@ -1,18 +1,13 @@ -// $Id$ -*-c++-*- -//*************************************************************************** -// File: -// TargetMachine.h -// -// Purpose: -// -// History: -// 7/12/01 - Vikram Adve - Created -//**************************************************************************/ +//===-- llvm/Target/Machine.h - General Target Information -------*- C++ -*-==// +// +// This file describes the general parts of a Target machine. +// +//===----------------------------------------------------------------------===// -#ifndef LLVM_CODEGEN_TARGETMACHINE_H -#define LLVM_CODEGEN_TARGETMACHINE_H +#ifndef LLVM_TARGET_MACHINE_H +#define LLVM_TARGET_MACHINE_H -#include "llvm/CodeGen/TargetData.h" +#include "llvm/Target/Data.h" #include "llvm/Support/NonCopyable.h" #include "llvm/Support/DataTypes.h" #include @@ -24,8 +19,6 @@ class StructType; struct MachineInstrDescriptor; class TargetMachine; -//************************ Exported Data Types *****************************/ - //--------------------------------------------------------------------------- // Data types used to define information about a single machine instruction //--------------------------------------------------------------------------- @@ -518,7 +511,7 @@ public: int l1DCacheMissPenalty; // 7 or 9 for SPARC IIi int l1ICacheMissPenalty; // ? for SPARC IIi - bool inOrderLoads ; // true for SPARC IIi + bool inOrderLoads; // true for SPARC IIi bool inOrderIssue; // true for SPARC IIi bool inOrderExec; // false for most architectures bool inOrderRetire; // true for most architectures @@ -714,7 +707,7 @@ public: virtual void colorCallArgs(vector & CallInstrList, LiveRangeInfo& LRI, - AddedInstrMapType& AddedInstrMap ) const = 0 ; + AddedInstrMapType& AddedInstrMap ) const = 0; virtual int getUnifiedRegNum(int RegClassID, int reg) const = 0; diff --git a/include/llvm/CodeGen/Sparc.h b/include/llvm/Target/Sparc.h similarity index 100% rename from include/llvm/CodeGen/Sparc.h rename to include/llvm/Target/Sparc.h diff --git a/include/llvm/Target/TargetMachineImpls.h b/include/llvm/Target/TargetMachineImpls.h new file mode 100644 index 00000000000..83bebbddaf3 --- /dev/null +++ b/include/llvm/Target/TargetMachineImpls.h @@ -0,0 +1,17 @@ +//===-- llvm/CodeGen/Sparc.h - Sparc Target Description ----------*- C++ -*--=// +// +// This file defines the Sparc processor targets +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_CODEGEN_SPARC_H +#define LLVM_CODEGEN_SPARC_H + +class TargetMachine; + +// allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine +// that implements the Sparc backend. +// +TargetMachine *allocateSparcTargetMachine(); + +#endif diff --git a/lib/CodeGen/InstrSched/InstrScheduling.cpp b/lib/CodeGen/InstrSched/InstrScheduling.cpp index 23586870655..0987572ac3f 100644 --- a/lib/CodeGen/InstrSched/InstrScheduling.cpp +++ b/lib/CodeGen/InstrSched/InstrScheduling.cpp @@ -12,7 +12,7 @@ #include "llvm/CodeGen/InstrScheduling.h" #include "llvm/CodeGen/SchedPriorities.h" #include "llvm/Analysis/LiveVar/BBLiveVar.h" -#include "llvm/CodeGen/TargetMachine.h" +#include "llvm/Target/Machine.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/Support/CommandLine.h" #include "llvm/Instruction.h" diff --git a/lib/CodeGen/InstrSched/SchedGraph.cpp b/lib/CodeGen/InstrSched/SchedGraph.cpp index 05109cb8526..3c819f6bc7d 100644 --- a/lib/CodeGen/InstrSched/SchedGraph.cpp +++ b/lib/CodeGen/InstrSched/SchedGraph.cpp @@ -18,7 +18,7 @@ #include "llvm/Method.h" #include "llvm/CodeGen/SchedGraph.h" #include "llvm/CodeGen/MachineInstr.h" -#include "llvm/CodeGen/TargetMachine.h" +#include "llvm/Target/Machine.h" #include "llvm/Support/StringExtras.h" #include diff --git a/lib/CodeGen/Makefile b/lib/CodeGen/Makefile index 1c0e390088a..b0fba9d6567 100644 --- a/lib/CodeGen/Makefile +++ b/lib/CodeGen/Makefile @@ -1,4 +1,4 @@ LEVEL = ../.. -DIRS = TargetMachine InstrSelection InstrSched +DIRS = InstrSelection InstrSched include $(LEVEL)/Makefile.common diff --git a/lib/CodeGen/RegAlloc/RegClass.h b/lib/CodeGen/RegAlloc/RegClass.h index 1d08502445d..efe174617ce 100644 --- a/lib/CodeGen/RegAlloc/RegClass.h +++ b/lib/CodeGen/RegAlloc/RegClass.h @@ -16,19 +16,14 @@ */ - - #ifndef REG_CLASS_H #define REG_CLASS_H #include "llvm/CodeGen/IGNode.h" #include "llvm/CodeGen/InterferenceGraph.h" -#include "llvm/CodeGen/TargetMachine.h" - - +#include "llvm/Target/Machine.h" #include - typedef vector ReservedColorListType; diff --git a/lib/CodeGen/TargetMachine/Makefile b/lib/CodeGen/TargetMachine/Makefile deleted file mode 100644 index eefef8907a9..00000000000 --- a/lib/CodeGen/TargetMachine/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -LEVEL = ../../.. - -LIBRARYNAME = target - -include $(LEVEL)/Makefile.common diff --git a/lib/ExecutionEngine/Interpreter/Execution.cpp b/lib/ExecutionEngine/Interpreter/Execution.cpp index 0b017ad574a..ff914106643 100644 --- a/lib/ExecutionEngine/Interpreter/Execution.cpp +++ b/lib/ExecutionEngine/Interpreter/Execution.cpp @@ -13,7 +13,7 @@ #include "llvm/ConstPoolVals.h" #include "llvm/Assembly/Writer.h" #include "llvm/Support/DataTypes.h" -#include "llvm/CodeGen/TargetData.h" +#include "llvm/Target/Data.h" static unsigned getOperandSlot(Value *V) { SlotNumber *SN = (SlotNumber*)V->getAnnotation(SlotNumberAID); diff --git a/lib/Target/Makefile b/lib/Target/Makefile index ebcd23a242f..7fd02c66722 100644 --- a/lib/Target/Makefile +++ b/lib/Target/Makefile @@ -1,5 +1,5 @@ LEVEL = ../.. DIRS = Sparc +LIBRARYNAME = target include $(LEVEL)/Makefile.common - diff --git a/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp b/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp index 23586870655..0987572ac3f 100644 --- a/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp +++ b/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp @@ -12,7 +12,7 @@ #include "llvm/CodeGen/InstrScheduling.h" #include "llvm/CodeGen/SchedPriorities.h" #include "llvm/Analysis/LiveVar/BBLiveVar.h" -#include "llvm/CodeGen/TargetMachine.h" +#include "llvm/Target/Machine.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/Support/CommandLine.h" #include "llvm/Instruction.h" diff --git a/lib/Target/SparcV9/InstrSched/SchedGraph.cpp b/lib/Target/SparcV9/InstrSched/SchedGraph.cpp index 05109cb8526..3c819f6bc7d 100644 --- a/lib/Target/SparcV9/InstrSched/SchedGraph.cpp +++ b/lib/Target/SparcV9/InstrSched/SchedGraph.cpp @@ -18,7 +18,7 @@ #include "llvm/Method.h" #include "llvm/CodeGen/SchedGraph.h" #include "llvm/CodeGen/MachineInstr.h" -#include "llvm/CodeGen/TargetMachine.h" +#include "llvm/Target/Machine.h" #include "llvm/Support/StringExtras.h" #include diff --git a/lib/Target/SparcV9/RegAlloc/RegClass.h b/lib/Target/SparcV9/RegAlloc/RegClass.h index 1d08502445d..efe174617ce 100644 --- a/lib/Target/SparcV9/RegAlloc/RegClass.h +++ b/lib/Target/SparcV9/RegAlloc/RegClass.h @@ -16,19 +16,14 @@ */ - - #ifndef REG_CLASS_H #define REG_CLASS_H #include "llvm/CodeGen/IGNode.h" #include "llvm/CodeGen/InterferenceGraph.h" -#include "llvm/CodeGen/TargetMachine.h" - - +#include "llvm/Target/Machine.h" #include - typedef vector ReservedColorListType; diff --git a/lib/Target/SparcV9/SparcV9Internals.h b/lib/Target/SparcV9/SparcV9Internals.h index 606966db731..f9a344b37af 100644 --- a/lib/Target/SparcV9/SparcV9Internals.h +++ b/lib/Target/SparcV9/SparcV9Internals.h @@ -8,7 +8,7 @@ #ifndef SPARC_INTERNALS_H #define SPARC_INTERNALS_H -#include "llvm/CodeGen/TargetMachine.h" +#include "llvm/Target/Machine.h" #include "SparcRegInfo.h" #include diff --git a/lib/Target/SparcV9/SparcV9RegInfo.h b/lib/Target/SparcV9/SparcV9RegInfo.h index 41a6d00a081..3ebef550f08 100644 --- a/lib/Target/SparcV9/SparcV9RegInfo.h +++ b/lib/Target/SparcV9/SparcV9RegInfo.h @@ -4,19 +4,17 @@ Purpose: Contains the description of integer register class of Sparc */ - #ifndef SPARC_INT_REG_CLASS_H #define SPARC_INT_REG_CLASS_H -#include "llvm/CodeGen/TargetMachine.h" +#include "llvm/Target/Machine.h" //----------------------------------------------------------------------------- // Integer Register Class //----------------------------------------------------------------------------- - // Int register names in same order as enum in class SparcIntRegOrder - +// static string const IntRegNames[] = { "g1", "g2", "g3", "g4", "g5", "g6", "g7", "o0", "o1", "o2", "o3", "o4", "o5", "o7", diff --git a/lib/CodeGen/TargetMachine/TargetData.cpp b/lib/Target/TargetData.cpp similarity index 99% rename from lib/CodeGen/TargetMachine/TargetData.cpp rename to lib/Target/TargetData.cpp index fd9dd26d282..2e2ffd84cd1 100644 --- a/lib/CodeGen/TargetMachine/TargetData.cpp +++ b/lib/Target/TargetData.cpp @@ -10,7 +10,7 @@ // //===----------------------------------------------------------------------===// -#include "llvm/CodeGen/TargetData.h" +#include "llvm/Target/Data.h" #include "llvm/DerivedTypes.h" #include "llvm/ConstPoolVals.h" diff --git a/lib/CodeGen/TargetMachine/TargetMachine.cpp b/lib/Target/TargetMachine.cpp similarity index 93% rename from lib/CodeGen/TargetMachine/TargetMachine.cpp rename to lib/Target/TargetMachine.cpp index 0a9a739071b..a9e376e10a9 100644 --- a/lib/CodeGen/TargetMachine/TargetMachine.cpp +++ b/lib/Target/TargetMachine.cpp @@ -1,23 +1,12 @@ -// $Id$ -//*************************************************************************** -// File: -// TargetMachine.cpp -// -// Purpose: -// -// History: -// 7/12/01 - Vikram Adve - Created -//**************************************************************************/ +//===-- TargetMachine.cpp - General Target Information ---------------------==// +// +// This file describes the general parts of a Target machine. +// +//===----------------------------------------------------------------------===// - -//*************************** User Include Files ***************************/ - -#include "llvm/CodeGen/TargetMachine.h" +#include "llvm/Target/Machine.h" #include "llvm/DerivedTypes.h" -//************************ Exported Constants ******************************/ - - // External object describing the machine instructions // Initialized only when the TargetMachine class is created // and reset when that class is destroyed. @@ -26,17 +15,12 @@ const MachineInstrDescriptor* TargetInstrDescriptors = NULL; resourceId_t MachineResource::nextId = 0; -//************************* Forward Declarations **************************/ - static cycles_t ComputeMinGap (const InstrRUsage& fromRU, const InstrRUsage& toRU); static bool RUConflict (const vector& fromRVec, const vector& fromRVec); - -//************************ Class Implementations **************************/ - //--------------------------------------------------------------------------- // class TargetMachine // diff --git a/tools/llc/llc.cpp b/tools/llc/llc.cpp index fb5c1fc9456..789087f9a5f 100644 --- a/tools/llc/llc.cpp +++ b/tools/llc/llc.cpp @@ -1,14 +1,13 @@ -//===------------------------------------------------------------------------=== -// LLVM 'LLC' UTILITY +//===-- llc.cpp - Implement the LLVM Compiler -----------------------------===// // // This is the llc compiler driver. // -//===------------------------------------------------------------------------=== +//===----------------------------------------------------------------------===// #include "llvm/Bytecode/Reader.h" #include "llvm/Optimizations/Normalize.h" -#include "llvm/CodeGen/Sparc.h" -#include "llvm/CodeGen/TargetMachine.h" +#include "llvm/Target/Sparc.h" +#include "llvm/Target/Machine.h" #include "llvm/Support/CommandLine.h" #include "llvm/Module.h" #include "llvm/Method.h" @@ -20,46 +19,39 @@ static void NormalizeMethod(Method* method) { NormalizePhiConstantArgs(method); } - -static bool CompileModule(Module *M, TargetMachine &Target) { - for (Module::const_iterator MI = M->begin(), ME = M->end(); MI != ME; ++MI) { - Method *Meth = *MI; - - NormalizeMethod(Meth); - - if (Target.compileMethod(Meth)) return true; - } - - return false; -} - - - -//--------------------------------------------------------------------------- +//===----------------------------------------------------------------------===// // Function main() +//===----------------------------------------------------------------------===// // // Entry point for the llc compiler. -//--------------------------------------------------------------------------- - +// int main(int argc, char** argv) { cl::ParseCommandLineOptions(argc, argv, " llvm system compiler\n"); TargetMachine *Target = allocateSparcTargetMachine(); - Module *module = ParseBytecodeFile(InputFilename); - if (module == 0) { + Module *M = ParseBytecodeFile(InputFilename); + if (M == 0) { cerr << "bytecode didn't read correctly.\n"; + delete Target; return 1; } - if (CompileModule(module, *Target)) { - cerr << "Error compiling " << InputFilename << "!\n"; - delete module; - return 1; + bool Failed = false; + for (Module::const_iterator MI = M->begin(), ME = M->end(); MI != ME; ++MI) { + Method *Meth = *MI; + + NormalizeMethod(Meth); + + if (Target->compileMethod(Meth)) { + cerr << "Error compiling " << InputFilename << "!\n"; + Failed = true; + break; + } } // Clean up and exit - delete module; + delete M; delete Target; - return 0; + return Failed; }