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AMDGPU: Simplify tests with per function subtargets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274971 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault
parent
ba3380ea67
commit
b3013ff97b
@ -1,36 +1,62 @@
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; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals,+fp64-denormals < %s | FileCheck -check-prefix=FP64-DENORMAL -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=SI -mattr=+fp32-denormals,-fp64-denormals < %s | FileCheck -check-prefix=FP32-DENORMAL -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=SI -mattr=+fp32-denormals,+fp64-denormals < %s | FileCheck -check-prefix=BOTH-DENORMAL -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals,-fp64-denormals < %s | FileCheck -check-prefix=NO-DENORMAL -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=DEFAULT -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals < %s | FileCheck -check-prefix=DEFAULT -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=SI -mattr=+fp64-denormals < %s | FileCheck -check-prefix=DEFAULT -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals,+fp64-denormals < %s | FileCheck -check-prefix=FP64-DENORMAL -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp32-denormals,-fp64-denormals < %s | FileCheck -check-prefix=FP32-DENORMAL -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp32-denormals,+fp64-denormals < %s | FileCheck -check-prefix=BOTH-DENORMAL -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals,-fp64-denormals < %s | FileCheck -check-prefix=NO-DENORMAL -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=DEFAULT -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals < %s | FileCheck -check-prefix=DEFAULT -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp64-denormals < %s | FileCheck -check-prefix=DEFAULT -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; FUNC-LABEL: {{^}}test_kernel:
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; DEFAULT: FloatMode: 192
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; DEFAULT: IeeeMode: 0
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; FP64-DENORMAL: FloatMode: 192
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; FP64-DENORMAL: IeeeMode: 0
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; FP32-DENORMAL: FloatMode: 48
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; FP32-DENORMAL: IeeeMode: 0
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; BOTH-DENORMAL: FloatMode: 240
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; BOTH-DENORMAL: IeeeMode: 0
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; NO-DENORMAL: FloatMode: 0
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; NO-DENORMAL: IeeeMode: 0
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define void @test_kernel(float addrspace(1)* %out0, double addrspace(1)* %out1) nounwind {
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; GCN-LABEL: {{^}}test_default_si:
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; GCN: FloatMode: 192
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; GCN: IeeeMode: 0
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define void @test_default_si(float addrspace(1)* %out0, double addrspace(1)* %out1) #0 {
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store float 0.0, float addrspace(1)* %out0
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store double 0.0, double addrspace(1)* %out1
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ret void
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}
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; GCN-LABEL: {{^}}test_default_vi:
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; GCN: FloatMode: 192
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; GCN: IeeeMode: 0
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define void @test_default_vi(float addrspace(1)* %out0, double addrspace(1)* %out1) #1 {
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store float 0.0, float addrspace(1)* %out0
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store double 0.0, double addrspace(1)* %out1
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ret void
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}
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; GCN-LABEL: {{^}}test_f64_denormals:
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; GCN: FloatMode: 192
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; GCN: IeeeMode: 0
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define void @test_f64_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #2 {
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store float 0.0, float addrspace(1)* %out0
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store double 0.0, double addrspace(1)* %out1
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ret void
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}
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; GCN-LABEL: {{^}}test_f32_denormals:
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; GCNL: FloatMode: 48
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; GCN: IeeeMode: 0
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define void @test_f32_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #3 {
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store float 0.0, float addrspace(1)* %out0
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store double 0.0, double addrspace(1)* %out1
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ret void
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}
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; GCN-LABEL: {{^}}test_f32_f64_denormals:
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; GCN: FloatMode: 240
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; GCN: IeeeMode: 0
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define void @test_f32_f64_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #4 {
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store float 0.0, float addrspace(1)* %out0
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store double 0.0, double addrspace(1)* %out1
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ret void
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}
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; GCN-LABEL: {{^}}test_no_denormals
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; GCN: FloatMode: 0
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; GCN: IeeeMode: 0
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define void @test_no_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #5 {
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store float 0.0, float addrspace(1)* %out0
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store double 0.0, double addrspace(1)* %out1
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ret void
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}
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attributes #0 = { nounwind "target-cpu"="tahiti" }
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attributes #1 = { nounwind "target-cpu"="fiji" }
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attributes #2 = { nounwind "target-features"="+fp64-denormals" }
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attributes #3 = { nounwind "target-features"="+fp32-denormals" }
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attributes #4 = { nounwind "target-features"="+fp32-denormals,+fp64-denormals" }
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attributes #5 = { nounwind "target-features"="-fp32-denormals,-fp64-denormals" }
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@ -1,5 +1,4 @@
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; RUN: llc -march=amdgcn -verify-machineinstrs -mattr=-fp32-denormals,-fp64-denormals < %s | FileCheck -check-prefix=GCN -check-prefix=NODENORM %s
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; RUN: llc -march=amdgcn -verify-machineinstrs -mattr=+fp32-denormals,+fp64-denormals < %s | FileCheck -check-prefix=GCN -check-prefix=DENORM %s
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; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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declare float @llvm.canonicalize.f32(float) #0
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declare double @llvm.canonicalize.f64(double) #0
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@ -68,21 +67,37 @@ define void @test_fold_canonicalize_literal_f32(float addrspace(1)* %out) #1 {
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ret void
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}
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; GCN-LABEL: {{^}}test_fold_canonicalize_denormal0_f32:
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; NODENORM: v_mov_b32_e32 [[REG:v[0-9]+]], 0{{$}}
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; DENORM: v_mov_b32_e32 [[REG:v[0-9]+]], 0x7fffff{{$}}
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; GCN-LABEL: {{^}}test_no_denormals_fold_canonicalize_denormal0_f32:
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; GCN: v_mov_b32_e32 [[REG:v[0-9]+]], 0{{$}}
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; GCN: buffer_store_dword [[REG]]
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define void @test_fold_canonicalize_denormal0_f32(float addrspace(1)* %out) #1 {
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define void @test_no_denormals_fold_canonicalize_denormal0_f32(float addrspace(1)* %out) #1 {
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%canonicalized = call float @llvm.canonicalize.f32(float bitcast (i32 8388607 to float))
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store float %canonicalized, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}test_fold_canonicalize_denormal1_f32:
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; NODENORM: v_mov_b32_e32 [[REG:v[0-9]+]], 0{{$}}
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; DENORM: v_mov_b32_e32 [[REG:v[0-9]+]], 0x807fffff{{$}}
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; GCN-LABEL: {{^}}test_denormals_fold_canonicalize_denormal0_f32:
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; GCN: v_mov_b32_e32 [[REG:v[0-9]+]], 0x7fffff{{$}}
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; GCN: buffer_store_dword [[REG]]
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define void @test_fold_canonicalize_denormal1_f32(float addrspace(1)* %out) #1 {
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define void @test_denormals_fold_canonicalize_denormal0_f32(float addrspace(1)* %out) #3 {
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%canonicalized = call float @llvm.canonicalize.f32(float bitcast (i32 8388607 to float))
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store float %canonicalized, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}test_no_denormals_fold_canonicalize_denormal1_f32:
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; GCN: v_mov_b32_e32 [[REG:v[0-9]+]], 0{{$}}
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; GCN: buffer_store_dword [[REG]]
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define void @test_no_denormals_fold_canonicalize_denormal1_f32(float addrspace(1)* %out) #1 {
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%canonicalized = call float @llvm.canonicalize.f32(float bitcast (i32 2155872255 to float))
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store float %canonicalized, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}test_denormals_fold_canonicalize_denormal1_f32:
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; GCN: v_mov_b32_e32 [[REG:v[0-9]+]], 0x807fffff{{$}}
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; GCN: buffer_store_dword [[REG]]
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define void @test_denormals_fold_canonicalize_denormal1_f32(float addrspace(1)* %out) #3 {
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%canonicalized = call float @llvm.canonicalize.f32(float bitcast (i32 2155872255 to float))
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store float %canonicalized, float addrspace(1)* %out
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ret void
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@ -220,27 +235,41 @@ define void @test_fold_canonicalize_literal_f64(double addrspace(1)* %out) #1 {
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ret void
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}
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; GCN-LABEL: {{^}}test_fold_canonicalize_denormal0_f64:
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; DENORM-DAG: v_mov_b32_e32 v[[LO:[0-9]+]], -1{{$}}
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; DENORM-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], 0xfffff{{$}}
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; NODENORM: v_mov_b32_e32 v[[LO:[0-9]+]], 0{{$}}
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; NODENORM: v_mov_b32_e32 v[[HI:[0-9]+]], v[[LO]]{{$}}
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; GCN-LABEL: {{^}}test_no_denormals_fold_canonicalize_denormal0_f64:
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; GCN: v_mov_b32_e32 v[[LO:[0-9]+]], 0{{$}}
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; GCN: v_mov_b32_e32 v[[HI:[0-9]+]], v[[LO]]{{$}}
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; GCN: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}
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define void @test_fold_canonicalize_denormal0_f64(double addrspace(1)* %out) #1 {
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define void @test_no_denormals_fold_canonicalize_denormal0_f64(double addrspace(1)* %out) #2 {
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%canonicalized = call double @llvm.canonicalize.f64(double bitcast (i64 4503599627370495 to double))
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store double %canonicalized, double addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}test_fold_canonicalize_denormal1_f64:
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; DENORM-DAG: v_mov_b32_e32 v[[LO:[0-9]+]], -1{{$}}
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; DENORM-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], 0x800fffff{{$}}
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; NODENORM: v_mov_b32_e32 v[[LO:[0-9]+]], 0{{$}}
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; NODENORM: v_mov_b32_e32 v[[HI:[0-9]+]], v[[LO]]{{$}}
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; GCN-LABEL: {{^}}test_denormals_fold_canonicalize_denormal0_f64:
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; GCN-DAG: v_mov_b32_e32 v[[LO:[0-9]+]], -1{{$}}
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; GCN-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], 0xfffff{{$}}
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; GCN: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}
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define void @test_fold_canonicalize_denormal1_f64(double addrspace(1)* %out) #1 {
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define void @test_denormals_fold_canonicalize_denormal0_f64(double addrspace(1)* %out) #3 {
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%canonicalized = call double @llvm.canonicalize.f64(double bitcast (i64 4503599627370495 to double))
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store double %canonicalized, double addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}test_no_denormals_fold_canonicalize_denormal1_f64:
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; GCN: v_mov_b32_e32 v[[LO:[0-9]+]], 0{{$}}
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; GCN: v_mov_b32_e32 v[[HI:[0-9]+]], v[[LO]]{{$}}
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; GCN: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}
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define void @test_no_denormals_fold_canonicalize_denormal1_f64(double addrspace(1)* %out) #2 {
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%canonicalized = call double @llvm.canonicalize.f64(double bitcast (i64 9227875636482146303 to double))
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store double %canonicalized, double addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}test_denormals_fold_canonicalize_denormal1_f64:
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; GCN-DAG: v_mov_b32_e32 v[[LO:[0-9]+]], -1{{$}}
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; GCN-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], 0x800fffff{{$}}
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; GCN: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}
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define void @test_denormals_fold_canonicalize_denormal1_f64(double addrspace(1)* %out) #3 {
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%canonicalized = call double @llvm.canonicalize.f64(double bitcast (i64 9227875636482146303 to double))
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store double %canonicalized, double addrspace(1)* %out
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ret void
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@ -318,3 +347,5 @@ define void @test_fold_canonicalize_snan3_value_f64(double addrspace(1)* %out) #
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind }
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attributes #2 = { nounwind "target-features"="-fp32-denormals,-fp64-denormals" }
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attributes #3 = { nounwind "target-features"="+fp32-denormals,+fp64-denormals" }
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@ -1,4 +1,4 @@
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; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
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@ -67,15 +67,16 @@ define void @ffloor_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %x) {
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ret void
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}
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; FIXME-FUNC-LABEL: {{^}}ffloor_v3f64:
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; FIXME-CI: v_floor_f64_e32
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; FIXME-CI: v_floor_f64_e32
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; FIXME-CI: v_floor_f64_e32
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; define void @ffloor_v3f64(<3 x double> addrspace(1)* %out, <3 x double> %x) {
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; %y = call <3 x double> @llvm.floor.v3f64(<3 x double> %x) nounwind readnone
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; store <3 x double> %y, <3 x double> addrspace(1)* %out
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; ret void
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; }
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; FUNC-LABEL: {{^}}ffloor_v3f64:
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI: v_floor_f64_e32
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; CI-NOT: v_floor_f64_e32
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define void @ffloor_v3f64(<3 x double> addrspace(1)* %out, <3 x double> %x) {
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%y = call <3 x double> @llvm.floor.v3f64(<3 x double> %x) nounwind readnone
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store <3 x double> %y, <3 x double> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}ffloor_v4f64:
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; CI: v_floor_f64_e32
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@ -1,10 +1,68 @@
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; RUN: llc -march=amdgcn -mcpu=kaveri -mtriple=amdgcn-unknown-amdhsa -mattr=-fp32-denormals,+fp64-denormals < %s | FileCheck -check-prefix=FP64-DENORMAL -check-prefix=COMMON %s
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; RUN: llc -mtriple=amdgcn--amdhsa -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; COMMON-LABEL: {{^}}test_kernel:
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; COMMON-DENORMAL: compute_pgm_rsrc1_float_mode = compute_pgm_rsrc1_float_mode = 192
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; COMMON-DENORMAL: compute_pgm_rsrc1_dx10_clamp = 1
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define void @test_kernel(float addrspace(1)* %out0, double addrspace(1)* %out1) nounwind {
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; GCN-LABEL: {{^}}test_default_ci:
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; GCN: compute_pgm_rsrc1_float_mode = 192
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; GCN: compute_pgm_rsrc1_dx10_clamp = 1
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; GCN: compute_pgm_rsrc1_ieee_mode = 0
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define void @test_default_ci(float addrspace(1)* %out0, double addrspace(1)* %out1) #0 {
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store float 0.0, float addrspace(1)* %out0
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store double 0.0, double addrspace(1)* %out1
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ret void
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}
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; GCN-LABEL: {{^}}test_default_vi:
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; GCN: compute_pgm_rsrc1_float_mode = 192
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; GCN: compute_pgm_rsrc1_dx10_clamp = 1
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; GCN: compute_pgm_rsrc1_ieee_mode = 0
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define void @test_default_vi(float addrspace(1)* %out0, double addrspace(1)* %out1) #1 {
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store float 0.0, float addrspace(1)* %out0
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store double 0.0, double addrspace(1)* %out1
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ret void
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}
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; GCN-LABEL: {{^}}test_f64_denormals:
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; GCN: compute_pgm_rsrc1_float_mode = 192
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; GCN: compute_pgm_rsrc1_dx10_clamp = 1
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; GCN: compute_pgm_rsrc1_ieee_mode = 0
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define void @test_f64_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #2 {
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store float 0.0, float addrspace(1)* %out0
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store double 0.0, double addrspace(1)* %out1
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ret void
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}
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; GCN-LABEL: {{^}}test_f32_denormals:
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; GCN: compute_pgm_rsrc1_float_mode = 48
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; GCN: compute_pgm_rsrc1_dx10_clamp = 1
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; GCN: compute_pgm_rsrc1_ieee_mode = 0
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define void @test_f32_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #3 {
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store float 0.0, float addrspace(1)* %out0
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store double 0.0, double addrspace(1)* %out1
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ret void
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}
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; GCN-LABEL: {{^}}test_f32_f64_denormals:
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; GCN: compute_pgm_rsrc1_float_mode = 240
|
||||
; GCN: compute_pgm_rsrc1_dx10_clamp = 1
|
||||
; GCN: compute_pgm_rsrc1_ieee_mode = 0
|
||||
define void @test_f32_f64_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #4 {
|
||||
store float 0.0, float addrspace(1)* %out0
|
||||
store double 0.0, double addrspace(1)* %out1
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}test_no_denormals:
|
||||
; GCN: compute_pgm_rsrc1_float_mode = 0
|
||||
; GCN: compute_pgm_rsrc1_dx10_clamp = 1
|
||||
; GCN: compute_pgm_rsrc1_ieee_mode = 0
|
||||
define void @test_no_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #5 {
|
||||
store float 0.0, float addrspace(1)* %out0
|
||||
store double 0.0, double addrspace(1)* %out1
|
||||
ret void
|
||||
}
|
||||
|
||||
attributes #0 = { nounwind "target-cpu"="kaveri" }
|
||||
attributes #1 = { nounwind "target-cpu"="fiji" }
|
||||
attributes #2 = { nounwind "target-features"="-fp32-denormals,+fp64-denormals" }
|
||||
attributes #3 = { nounwind "target-features"="+fp32-denormals,-fp64-denormals" }
|
||||
attributes #4 = { nounwind "target-features"="+fp32-denormals,+fp64-denormals" }
|
||||
attributes #5 = { nounwind "target-features"="-fp32-denormals,-fp64-denormals" }
|
||||
|
||||
@ -1,9 +1,4 @@
|
||||
; RUN: llc -march=amdgcn -mattr=-fp32-denormals -enable-unsafe-fp-math -verify-machineinstrs < %s | FileCheck -check-prefix=SI-UNSAFE -check-prefix=SI -check-prefix=FUNC %s
|
||||
; RUN: llc -march=amdgcn -mattr=-fp32-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE -check-prefix=SI -check-prefix=FUNC %s
|
||||
; XUN: llc -march=amdgcn -mattr=+fp32-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE-SPDENORM -check-prefix=SI -check-prefix=FUNC %s
|
||||
; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals -enable-unsafe-fp-math -verify-machineinstrs < %s | FileCheck -check-prefix=SI-UNSAFE -check-prefix=SI -check-prefix=FUNC %s
|
||||
; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE -check-prefix=SI -check-prefix=FUNC %s
|
||||
; XUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp32-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE-SPDENORM -check-prefix=SI -check-prefix=FUNC %s
|
||||
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
|
||||
|
||||
declare float @llvm.amdgcn.rcp.f32(float) #0
|
||||
declare double @llvm.amdgcn.rcp.f64(double) #0
|
||||
@ -11,71 +6,123 @@ declare double @llvm.amdgcn.rcp.f64(double) #0
|
||||
declare double @llvm.sqrt.f64(double) #0
|
||||
declare float @llvm.sqrt.f32(float) #0
|
||||
|
||||
|
||||
; FUNC-LABEL: {{^}}rcp_f32:
|
||||
; SI: v_rcp_f32_e32
|
||||
define void @rcp_f32(float addrspace(1)* %out, float %src) #1 {
|
||||
%rcp = call float @llvm.amdgcn.rcp.f32(float %src) #0
|
||||
; FUNC-LABEL: {{^}}rcp_undef_f32:
|
||||
; SI-NOT: v_rcp_f32
|
||||
define void @rcp_undef_f32(float addrspace(1)* %out) #1 {
|
||||
%rcp = call float @llvm.amdgcn.rcp.f32(float undef)
|
||||
store float %rcp, float addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}rcp_pat_f32:
|
||||
|
||||
; SI-SAFE: v_rcp_f32_e32
|
||||
; XSI-SAFE-SPDENORM-NOT: v_rcp_f32_e32
|
||||
define void @rcp_pat_f32(float addrspace(1)* %out, float %src) #1 {
|
||||
; FUNC-LABEL: {{^}}safe_no_fp32_denormals_rcp_f32:
|
||||
; SI: v_rcp_f32_e32 [[RESULT:v[0-9]+]], s{{[0-9]+}}
|
||||
; SI-NOT: [[RESULT]]
|
||||
; SI: buffer_store_dword [[RESULT]]
|
||||
define void @safe_no_fp32_denormals_rcp_f32(float addrspace(1)* %out, float %src) #1 {
|
||||
%rcp = fdiv float 1.0, %src
|
||||
store float %rcp, float addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}rsq_rcp_pat_f32:
|
||||
; SI-UNSAFE: v_rsq_f32_e32
|
||||
; SI-SAFE: v_sqrt_f32_e32
|
||||
; SI-SAFE: v_rcp_f32_e32
|
||||
define void @rsq_rcp_pat_f32(float addrspace(1)* %out, float %src) #1 {
|
||||
%sqrt = call float @llvm.sqrt.f32(float %src) #0
|
||||
%rcp = call float @llvm.amdgcn.rcp.f32(float %sqrt) #0
|
||||
; FUNC-LABEL: {{^}}safe_f32_denormals_rcp_pat_f32:
|
||||
; SI: v_rcp_f32_e32 [[RESULT:v[0-9]+]], s{{[0-9]+}}
|
||||
; SI-NOT: [[RESULT]]
|
||||
; SI: buffer_store_dword [[RESULT]]
|
||||
define void @safe_f32_denormals_rcp_pat_f32(float addrspace(1)* %out, float %src) #4 {
|
||||
%rcp = fdiv float 1.0, %src
|
||||
store float %rcp, float addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}unsafe_f32_denormals_rcp_pat_f32:
|
||||
; SI: v_div_scale_f32
|
||||
define void @unsafe_f32_denormals_rcp_pat_f32(float addrspace(1)* %out, float %src) #3 {
|
||||
%rcp = fdiv float 1.0, %src
|
||||
store float %rcp, float addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}safe_rsq_rcp_pat_f32:
|
||||
; SI: v_sqrt_f32_e32
|
||||
; SI: v_rcp_f32_e32
|
||||
define void @safe_rsq_rcp_pat_f32(float addrspace(1)* %out, float %src) #1 {
|
||||
%sqrt = call float @llvm.sqrt.f32(float %src)
|
||||
%rcp = call float @llvm.amdgcn.rcp.f32(float %sqrt)
|
||||
store float %rcp, float addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}unsafe_rsq_rcp_pat_f32:
|
||||
; SI: v_rsq_f32_e32
|
||||
define void @unsafe_rsq_rcp_pat_f32(float addrspace(1)* %out, float %src) #2 {
|
||||
%sqrt = call float @llvm.sqrt.f32(float %src)
|
||||
%rcp = call float @llvm.amdgcn.rcp.f32(float %sqrt)
|
||||
store float %rcp, float addrspace(1)* %out, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}rcp_f64:
|
||||
; SI: v_rcp_f64_e32
|
||||
; SI: v_rcp_f64_e32 [[RESULT:v\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}
|
||||
; SI-NOT: [[RESULT]]
|
||||
; SI: buffer_store_dwordx2 [[RESULT]]
|
||||
define void @rcp_f64(double addrspace(1)* %out, double %src) #1 {
|
||||
%rcp = call double @llvm.amdgcn.rcp.f64(double %src) #0
|
||||
%rcp = call double @llvm.amdgcn.rcp.f64(double %src)
|
||||
store double %rcp, double addrspace(1)* %out, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}unsafe_rcp_f64:
|
||||
; SI: v_rcp_f64_e32 [[RESULT:v\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}
|
||||
; SI-NOT: [[RESULT]]
|
||||
; SI: buffer_store_dwordx2 [[RESULT]]
|
||||
define void @unsafe_rcp_f64(double addrspace(1)* %out, double %src) #2 {
|
||||
%rcp = call double @llvm.amdgcn.rcp.f64(double %src)
|
||||
store double %rcp, double addrspace(1)* %out, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}rcp_pat_f64:
|
||||
; SI: v_rcp_f64_e32
|
||||
; SI: v_div_scale_f64
|
||||
define void @rcp_pat_f64(double addrspace(1)* %out, double %src) #1 {
|
||||
%rcp = fdiv double 1.0, %src
|
||||
store double %rcp, double addrspace(1)* %out, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}rsq_rcp_pat_f64:
|
||||
; SI-UNSAFE: v_rsq_f64_e32
|
||||
; SI-SAFE-NOT: v_rsq_f64_e32
|
||||
; SI-SAFE: v_sqrt_f64
|
||||
; SI-SAFE: v_rcp_f64
|
||||
define void @rsq_rcp_pat_f64(double addrspace(1)* %out, double %src) #1 {
|
||||
%sqrt = call double @llvm.sqrt.f64(double %src) #0
|
||||
%rcp = call double @llvm.amdgcn.rcp.f64(double %sqrt) #0
|
||||
; FUNC-LABEL: {{^}}unsafe_rcp_pat_f64:
|
||||
; SI: v_rcp_f64_e32 [[RESULT:v\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}
|
||||
; SI-NOT: [[RESULT]]
|
||||
; SI: buffer_store_dwordx2 [[RESULT]]
|
||||
define void @unsafe_rcp_pat_f64(double addrspace(1)* %out, double %src) #2 {
|
||||
%rcp = fdiv double 1.0, %src
|
||||
store double %rcp, double addrspace(1)* %out, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}rcp_undef_f32:
|
||||
; SI-NOT: v_rcp_f32
|
||||
define void @rcp_undef_f32(float addrspace(1)* %out) #1 {
|
||||
%rcp = call float @llvm.amdgcn.rcp.f32(float undef) #0
|
||||
store float %rcp, float addrspace(1)* %out, align 4
|
||||
; FUNC-LABEL: {{^}}safe_rsq_rcp_pat_f64:
|
||||
; SI-NOT: v_rsq_f64_e32
|
||||
; SI: v_sqrt_f64
|
||||
; SI: v_rcp_f64
|
||||
define void @safe_rsq_rcp_pat_f64(double addrspace(1)* %out, double %src) #1 {
|
||||
%sqrt = call double @llvm.sqrt.f64(double %src)
|
||||
%rcp = call double @llvm.amdgcn.rcp.f64(double %sqrt)
|
||||
store double %rcp, double addrspace(1)* %out, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}unsafe_rsq_rcp_pat_f64:
|
||||
; SI: v_rsq_f64_e32 [[RESULT:v\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}
|
||||
; SI-NOT: [[RESULT]]
|
||||
; SI: buffer_store_dwordx2 [[RESULT]]
|
||||
define void @unsafe_rsq_rcp_pat_f64(double addrspace(1)* %out, double %src) #2 {
|
||||
%sqrt = call double @llvm.sqrt.f64(double %src)
|
||||
%rcp = call double @llvm.amdgcn.rcp.f64(double %sqrt)
|
||||
store double %rcp, double addrspace(1)* %out, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
attributes #0 = { nounwind readnone }
|
||||
attributes #1 = { nounwind }
|
||||
attributes #1 = { nounwind "unsafe-fp-math"="false" "target-features"="-fp32-denormals" }
|
||||
attributes #2 = { nounwind "unsafe-fp-math"="true" "target-features"="-fp32-denormals" }
|
||||
attributes #3 = { nounwind "unsafe-fp-math"="false" "target-features"="+fp32-denormals" }
|
||||
attributes #4 = { nounwind "unsafe-fp-math"="true" "target-features"="+fp32-denormals" }
|
||||
|
||||
@ -1,8 +1,5 @@
|
||||
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
|
||||
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=SI-SAFE -check-prefix=FUNC %s
|
||||
; RUN: llc -march=amdgcn -mcpu=SI -enable-unsafe-fp-math < %s | FileCheck -check-prefix=SI -check-prefix=SI-UNSAFE -check-prefix=FUNC %s
|
||||
; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=SI-SAFE -check-prefix=FUNC %s
|
||||
; RUN: llc -march=amdgcn -mcpu=tonga -enable-unsafe-fp-math < %s | FileCheck -check-prefix=SI -check-prefix=SI-UNSAFE -check-prefix=FUNC %s
|
||||
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
|
||||
|
||||
; FUNC-LABEL: sin_f32
|
||||
; EG: MULADD_IEEE *
|
||||
@ -10,58 +7,91 @@
|
||||
; EG: ADD *
|
||||
; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
|
||||
; EG-NOT: SIN
|
||||
|
||||
; SI: v_mul_f32
|
||||
; SI: v_fract_f32
|
||||
; SI: v_sin_f32
|
||||
; SI-NOT: v_sin_f32
|
||||
|
||||
define void @sin_f32(float addrspace(1)* %out, float %x) #1 {
|
||||
%sin = call float @llvm.sin.f32(float %x)
|
||||
store float %sin, float addrspace(1)* %out
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}sin_3x_f32:
|
||||
; SI-UNSAFE-NOT: v_add_f32
|
||||
; SI-UNSAFE: 0x3ef47644
|
||||
; SI-UNSAFE: v_mul_f32
|
||||
; SI-SAFE: v_mul_f32
|
||||
; SI-SAFE: v_mul_f32
|
||||
; FUNC-LABEL: {{^}}safe_sin_3x_f32:
|
||||
; SI: v_mul_f32
|
||||
; SI: v_mul_f32
|
||||
; SI: v_fract_f32
|
||||
; SI: v_sin_f32
|
||||
; SI-NOT: v_sin_f32
|
||||
define void @sin_3x_f32(float addrspace(1)* %out, float %x) #1 {
|
||||
define void @safe_sin_3x_f32(float addrspace(1)* %out, float %x) #1 {
|
||||
%y = fmul float 3.0, %x
|
||||
%sin = call float @llvm.sin.f32(float %y)
|
||||
store float %sin, float addrspace(1)* %out
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}sin_2x_f32:
|
||||
; SI-UNSAFE-NOT: v_add_f32
|
||||
; SI-UNSAFE: 0x3ea2f983
|
||||
; SI-UNSAFE: v_mul_f32
|
||||
; SI-SAFE: v_add_f32
|
||||
; SI-SAFE: v_mul_f32
|
||||
; FUNC-LABEL: {{^}}unsafe_sin_3x_f32:
|
||||
; SI-NOT: v_add_f32
|
||||
; SI: 0x3ef47644
|
||||
; SI: v_mul_f32
|
||||
; SI: v_fract_f32
|
||||
; SI: v_sin_f32
|
||||
; SI-NOT: v_sin_f32
|
||||
define void @sin_2x_f32(float addrspace(1)* %out, float %x) #1 {
|
||||
define void @unsafe_sin_3x_f32(float addrspace(1)* %out, float %x) #2 {
|
||||
%y = fmul float 3.0, %x
|
||||
%sin = call float @llvm.sin.f32(float %y)
|
||||
store float %sin, float addrspace(1)* %out
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}safe_sin_2x_f32:
|
||||
; SI: v_add_f32
|
||||
; SI: v_mul_f32
|
||||
; SI: v_fract_f32
|
||||
; SI: v_sin_f32
|
||||
; SI-NOT: v_sin_f32
|
||||
define void @safe_sin_2x_f32(float addrspace(1)* %out, float %x) #1 {
|
||||
%y = fmul float 2.0, %x
|
||||
%sin = call float @llvm.sin.f32(float %y)
|
||||
store float %sin, float addrspace(1)* %out
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}test_2sin_f32:
|
||||
; SI-UNSAFE: 0x3ea2f983
|
||||
; SI-UNSAFE: v_mul_f32
|
||||
; SI-SAFE: v_add_f32
|
||||
; SI-SAFE: v_mul_f32
|
||||
; FUNC-LABEL: {{^}}unsafe_sin_2x_f32:
|
||||
; SI-NOT: v_add_f32
|
||||
; SI: 0x3ea2f983
|
||||
; SI: v_mul_f32
|
||||
; SI: v_fract_f32
|
||||
; SI: v_sin_f32
|
||||
; SI-NOT: v_sin_f32
|
||||
define void @test_2sin_f32(float addrspace(1)* %out, float %x) #1 {
|
||||
define void @unsafe_sin_2x_f32(float addrspace(1)* %out, float %x) #2 {
|
||||
%y = fmul float 2.0, %x
|
||||
%sin = call float @llvm.sin.f32(float %y)
|
||||
store float %sin, float addrspace(1)* %out
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}test_safe_2sin_f32:
|
||||
; SI: v_add_f32
|
||||
; SI: v_mul_f32
|
||||
; SI: v_fract_f32
|
||||
; SI: v_sin_f32
|
||||
; SI-NOT: v_sin_f32
|
||||
define void @test_safe_2sin_f32(float addrspace(1)* %out, float %x) #1 {
|
||||
%y = fmul float 2.0, %x
|
||||
%sin = call float @llvm.sin.f32(float %y)
|
||||
store float %sin, float addrspace(1)* %out
|
||||
ret void
|
||||
}
|
||||
|
||||
; FUNC-LABEL: {{^}}test_unsafe_2sin_f32:
|
||||
; SI: 0x3ea2f983
|
||||
; SI: v_mul_f32
|
||||
; SI: v_fract_f32
|
||||
; SI: v_sin_f32
|
||||
; SI-NOT: v_sin_f32
|
||||
define void @test_unsafe_2sin_f32(float addrspace(1)* %out, float %x) #2 {
|
||||
%y = fmul float 2.0, %x
|
||||
%sin = call float @llvm.sin.f32(float %y)
|
||||
store float %sin, float addrspace(1)* %out
|
||||
@ -74,17 +104,21 @@ define void @test_2sin_f32(float addrspace(1)* %out, float %x) #1 {
|
||||
; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
|
||||
; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
|
||||
; EG-NOT: SIN
|
||||
|
||||
; SI: v_sin_f32
|
||||
; SI: v_sin_f32
|
||||
; SI: v_sin_f32
|
||||
; SI: v_sin_f32
|
||||
; SI-NOT: v_sin_f32
|
||||
|
||||
define void @sin_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %vx) #1 {
|
||||
%sin = call <4 x float> @llvm.sin.v4f32( <4 x float> %vx)
|
||||
store <4 x float> %sin, <4 x float> addrspace(1)* %out
|
||||
ret void
|
||||
}
|
||||
|
||||
declare float @llvm.sin.f32(float) readnone
|
||||
declare <4 x float> @llvm.sin.v4f32(<4 x float>) readnone
|
||||
declare float @llvm.sin.f32(float) #0
|
||||
declare <4 x float> @llvm.sin.v4f32(<4 x float>) #0
|
||||
|
||||
attributes #0 = { nounwind readnone }
|
||||
attributes #1 = { nounwind "unsafe-fp-math"="false" }
|
||||
attributes #2 = { nounwind "unsafe-fp-math"="true" }
|
||||
|
||||
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Reference in New Issue
Block a user