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Added "LoadEffective" pattern to handle stack locations.

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Fixed some comments


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42271 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bruno Cardoso Lopes 2007-09-24 20:15:11 +00:00
parent 128459b85b
commit b42abebe36
3 changed files with 25 additions and 6 deletions
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15
lib/Target/Mips/MipsAsmPrinter.cpp
View File

@ -141,7 +141,7 @@ emitMaskDirective(MachineFunction &MF)
#endif
unsigned int Bitmask = getSavedRegsBitmask(false, MF);
O << "\t.mask\t";
O << "\t.mask \t";
printHex32(Bitmask);
O << "," << Offset << "\n";
}
@ -366,9 +366,16 @@ printOperand(const MachineInstr *MI, int opNum)
void MipsAsmPrinter::
printMemOperand(const MachineInstr *MI, int opNum, const char *Modifier)
{
// lw/sw $reg, MemOperand
// will turn into :
// lw/sw $reg, imm($reg)
// when using stack locations for not load/store instructions
// print the same way as all normal 3 operand instructions.
if (Modifier && !strcmp(Modifier, "stackloc")) {
printOperand(MI, opNum+1);
O << ", ";
printOperand(MI, opNum);
return;
}
// Load/Store memory operands -- imm($reg)
printOperand(MI, opNum);
O << "(";
printOperand(MI, opNum+1);

4
lib/Target/Mips/MipsISelDAGToDAG.cpp
View File

@ -196,8 +196,8 @@ Select(SDOperand N)
}
///
// Instruction Selection not handled by custom or by the
// auto-generated tablegen selection should be handled here
// Instruction Selection not handled by the auto-generated
// tablegen selection should be handled here.
///
switch(Opcode) {

12
lib/Target/Mips/MipsInstrInfo.td
View File

@ -332,6 +332,12 @@ class CountLeading<bits<6> func, string instr_asm>:
!strconcat(instr_asm, " $dst, $src"),
[], IIAlu>;
class EffectiveAddress<string instr_asm> :
FI<0x09,
(outs CPURegs:$dst),
(ins mem:$addr),
instr_asm,
[(set CPURegs:$dst, addr:$addr)], IIAlu>;
//===----------------------------------------------------------------------===//
// Pseudo instructions
@ -468,6 +474,12 @@ let isReturn=1, isTerminator=1, hasDelaySlot=1,
"jr $target", [(MipsRet CPURegs:$target)], IIBranch>;
}
// FrameIndexes are legalized when they are operands from load/store
// instructions. The same not happens for stack address copies, so an
// add op with mem ComplexPattern is used and the stack address copy
// can be matched. It's similar to Sparc LEA_ADDRi
def LEA_ADDiu : EffectiveAddress<"addiu $dst, ${addr:stackloc}">;
//===----------------------------------------------------------------------===//
// Arbitrary patterns that map to one or more instructions
//===----------------------------------------------------------------------===//