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Whitespace and formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83285 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -185,7 +185,7 @@ bool MachineVerifier::runOnMachineFunction(MachineFunction &MF) {
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errs() << "Error opening '" << OutFileName << "': " << ErrorInfo << '\n';
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exit(1);
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}
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OS = OutFile;
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} else {
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OS = &errs();
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@ -238,9 +238,7 @@ void MachineVerifier::report(const char *msg, const MachineFunction *MF) {
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<< "- function: " << MF->getFunction()->getNameStr() << "\n";
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}
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void
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MachineVerifier::report(const char *msg, const MachineBasicBlock *MBB)
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{
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void MachineVerifier::report(const char *msg, const MachineBasicBlock *MBB) {
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assert(MBB);
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report(msg, MBB->getParent());
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*OS << "- basic block: " << MBB->getBasicBlock()->getNameStr()
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@ -248,19 +246,15 @@ MachineVerifier::report(const char *msg, const MachineBasicBlock *MBB)
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<< " (#" << MBB->getNumber() << ")\n";
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}
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void
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MachineVerifier::report(const char *msg, const MachineInstr *MI)
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{
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void MachineVerifier::report(const char *msg, const MachineInstr *MI) {
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assert(MI);
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report(msg, MI->getParent());
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*OS << "- instruction: ";
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MI->print(*OS, TM);
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}
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void
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MachineVerifier::report(const char *msg,
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const MachineOperand *MO, unsigned MONum)
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{
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void MachineVerifier::report(const char *msg,
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const MachineOperand *MO, unsigned MONum) {
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assert(MO);
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report(msg, MO->getParent());
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*OS << "- operand " << MONum << ": ";
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@ -268,9 +262,7 @@ MachineVerifier::report(const char *msg,
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*OS << "\n";
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}
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void
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MachineVerifier::markReachable(const MachineBasicBlock *MBB)
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{
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void MachineVerifier::markReachable(const MachineBasicBlock *MBB) {
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BBInfo &MInfo = MBBInfoMap[MBB];
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if (!MInfo.reachable) {
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MInfo.reachable = true;
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@ -280,9 +272,7 @@ MachineVerifier::markReachable(const MachineBasicBlock *MBB)
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}
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}
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void
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MachineVerifier::visitMachineFunctionBefore()
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{
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void MachineVerifier::visitMachineFunctionBefore() {
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regsReserved = TRI->getReservedRegs(*MF);
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// A sub-register of a reserved register is also reserved
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@ -297,9 +287,7 @@ MachineVerifier::visitMachineFunctionBefore()
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markReachable(&MF->front());
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}
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void
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MachineVerifier::visitMachineBasicBlockBefore(const MachineBasicBlock *MBB)
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{
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void MachineVerifier::visitMachineBasicBlockBefore(const MachineBasicBlock *MBB) {
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const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
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// Start with minimal CFG sanity checks.
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@ -462,9 +450,7 @@ MachineVerifier::visitMachineBasicBlockBefore(const MachineBasicBlock *MBB)
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regsDefined.clear();
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}
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void
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MachineVerifier::visitMachineInstrBefore(const MachineInstr *MI)
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{
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void MachineVerifier::visitMachineInstrBefore(const MachineInstr *MI) {
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const TargetInstrDesc &TI = MI->getDesc();
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if (MI->getNumOperands() < TI.getNumOperands()) {
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report("Too few operands", MI);
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@ -474,8 +460,7 @@ MachineVerifier::visitMachineInstrBefore(const MachineInstr *MI)
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}
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void
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MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum)
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{
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MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) {
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const MachineInstr *MI = MO->getParent();
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const TargetInstrDesc &TI = MI->getDesc();
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@ -608,9 +593,7 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum)
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}
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}
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void
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MachineVerifier::visitMachineInstrAfter(const MachineInstr *MI)
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{
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void MachineVerifier::visitMachineInstrAfter(const MachineInstr *MI) {
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BBInfo &MInfo = MBBInfoMap[MI->getParent()];
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set_union(MInfo.regsKilled, regsKilled);
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set_subtract(regsLive, regsKilled);
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@ -650,8 +633,7 @@ MachineVerifier::visitMachineInstrAfter(const MachineInstr *MI)
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}
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void
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MachineVerifier::visitMachineBasicBlockAfter(const MachineBasicBlock *MBB)
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{
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MachineVerifier::visitMachineBasicBlockAfter(const MachineBasicBlock *MBB) {
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MBBInfoMap[MBB].regsLiveOut = regsLive;
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regsLive.clear();
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}
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@ -659,9 +641,7 @@ MachineVerifier::visitMachineBasicBlockAfter(const MachineBasicBlock *MBB)
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// Calculate the largest possible vregsPassed sets. These are the registers that
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// can pass through an MBB live, but may not be live every time. It is assumed
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// that all vregsPassed sets are empty before the call.
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void
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MachineVerifier::calcMaxRegsPassed()
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{
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void MachineVerifier::calcMaxRegsPassed() {
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// First push live-out regs to successors' vregsPassed. Remember the MBBs that
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// have any vregsPassed.
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DenseSet<const MachineBasicBlock*> todo;
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@ -699,9 +679,7 @@ MachineVerifier::calcMaxRegsPassed()
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// Calculate the minimum vregsPassed set. These are the registers that always
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// pass live through an MBB. The calculation assumes that calcMaxRegsPassed has
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// been called earlier.
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void
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MachineVerifier::calcMinRegsPassed()
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{
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void MachineVerifier::calcMinRegsPassed() {
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DenseSet<const MachineBasicBlock*> todo;
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for (MachineFunction::const_iterator MFI = MF->begin(), MFE = MF->end();
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MFI != MFE; ++MFI)
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@ -736,9 +714,7 @@ MachineVerifier::calcMinRegsPassed()
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// Check PHI instructions at the beginning of MBB. It is assumed that
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// calcMinRegsPassed has been run so BBInfo::isLiveOut is valid.
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void
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MachineVerifier::checkPHIOps(const MachineBasicBlock *MBB)
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{
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void MachineVerifier::checkPHIOps(const MachineBasicBlock *MBB) {
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for (MachineBasicBlock::const_iterator BBI = MBB->begin(), BBE = MBB->end();
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BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI) {
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DenseSet<const MachineBasicBlock*> seen;
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@ -767,9 +743,7 @@ MachineVerifier::checkPHIOps(const MachineBasicBlock *MBB)
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}
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}
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void
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MachineVerifier::visitMachineFunctionAfter()
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{
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void MachineVerifier::visitMachineFunctionAfter() {
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calcMaxRegsPassed();
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// With the maximal set of vregsPassed we can verify dead-in registers.
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