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Add API to check and fold memory operands into instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11519 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -242,6 +242,16 @@ public:
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const TargetRegisterClass *RC) const = 0;
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virtual bool canFoldMemoryOperand(MachineInstr* MI, unsigned i) const {
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return false;
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}
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virtual int foldMemoryOperand(MachineInstr* MI,
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unsigned i,
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int FrameIndex) const {
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return 0;
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}
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/// getCallFrameSetup/DestroyOpcode - These methods return the opcode of the
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/// frame setup/destroy instructions if they exist (-1 otherwise). Some
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/// targets use pseudo instructions in order to abstract away the difference
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@ -79,6 +79,87 @@ int X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
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return 1;
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}
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bool X86RegisterInfo::canFoldMemoryOperand(MachineInstr* MI,
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unsigned i) const
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{
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switch(MI->getOpcode()) {
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case X86::ADDrr8: case X86::ADDrr16: case X86::ADDrr32:
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case X86::ADDri8: case X86::ADDri16: case X86::ADDri32:
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case X86::MOVrr8: case X86::MOVrr16: case X86::MOVrr32:
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return true;
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default:
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return false;
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}
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}
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int X86RegisterInfo::foldMemoryOperand(MachineInstr* MI,
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unsigned i,
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int FrameIndex) const
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{
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MachineBasicBlock& MBB = *MI->getParent();
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MachineInstr* NI = 0;
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if (i == 0)
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switch(MI->getOpcode()) {
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case X86::MOVrr8:
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NI = addFrameReference(BuildMI(X86::MOVmr8, 5), FrameIndex).addReg(MI->getOperand(1).getReg());
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break;
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case X86::MOVrr16:
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NI = addFrameReference(BuildMI(X86::MOVmr16, 5), FrameIndex).addReg(MI->getOperand(1).getReg());
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break;
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case X86::MOVrr32:
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NI = addFrameReference(BuildMI(X86::MOVmr32, 5), FrameIndex).addReg(MI->getOperand(1).getReg());
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break;
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case X86::ADDrr8:
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NI = addFrameReference(BuildMI(X86::ADDmr8, 5), FrameIndex).addReg(MI->getOperand(1).getReg());
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break;
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case X86::ADDrr16:
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NI = addFrameReference(BuildMI(X86::ADDmr16, 5), FrameIndex).addReg(MI->getOperand(1).getReg());
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break;
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case X86::ADDrr32:
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NI = addFrameReference(BuildMI(X86::ADDmr32, 5), FrameIndex).addReg(MI->getOperand(1).getReg());
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break;
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case X86::ADDri8:
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NI = addFrameReference(BuildMI(X86::ADDmi8, 5), FrameIndex).addZImm(MI->getOperand(1).getImmedValue());
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break;
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case X86::ADDri16:
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NI = addFrameReference(BuildMI(X86::ADDmi16, 5), FrameIndex).addZImm(MI->getOperand(1).getImmedValue());
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break;
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case X86::ADDri32:
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NI = addFrameReference(BuildMI(X86::ADDmi32, 5), FrameIndex).addZImm(MI->getOperand(1).getImmedValue());
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break;
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default:
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assert(0 && "Operand cannot be folded");
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}
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else if (i == 1)
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switch(MI->getOpcode()) {
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case X86::MOVrr8:
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NI = addFrameReference(BuildMI(X86::MOVrm8, 5).addReg(MI->getOperand(0).getReg()), FrameIndex);
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break;
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case X86::MOVrr16:
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NI = addFrameReference(BuildMI(X86::MOVrm16, 5).addReg(MI->getOperand(0).getReg()), FrameIndex);
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break;
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case X86::MOVrr32:
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NI = addFrameReference(BuildMI(X86::MOVrm32, 5).addReg(MI->getOperand(0).getReg()), FrameIndex);
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break;
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case X86::ADDrr8:
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NI = addFrameReference(BuildMI(X86::ADDrm8, 5).addReg(MI->getOperand(0).getReg()), FrameIndex);
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break;
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case X86::ADDrr16:
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NI = addFrameReference(BuildMI(X86::ADDrm16, 5).addReg(MI->getOperand(0).getReg()), FrameIndex);
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break;
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case X86::ADDrr32:
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NI = addFrameReference(BuildMI(X86::ADDrm32, 5).addReg(MI->getOperand(0).getReg()), FrameIndex);
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break;
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default:
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assert(0 && "Operand cannot be folded");
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}
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else
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assert(0 && "Operand cannot be folded");
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MBB.insert(MBB.erase(MI), NI);
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return 0;
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}
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//===----------------------------------------------------------------------===//
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// Stack Frame Processing methods
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//===----------------------------------------------------------------------===//
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@ -42,6 +42,11 @@ struct X86RegisterInfo : public X86GenRegisterInfo {
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *RC) const;
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virtual bool canFoldMemoryOperand(MachineInstr* MI, unsigned i) const;
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virtual int foldMemoryOperand(MachineInstr* MI, unsigned i,
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int FrameIndex) const;
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void eliminateCallFramePseudoInstr(MachineFunction &MF,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI) const;
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