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Use table to separate opcode from operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86965 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -146,7 +146,7 @@ def VLDMS : NI<(outs),
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// Use vldmia to load a Q register as a D register pair.
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def VLDRQ : NI4<(outs QPR:$dst), (ins addrmode4:$addr),
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IIC_fpLoadm,
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"vldmia $addr, ${dst:dregpair}",
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"vldmia\t$addr, ${dst:dregpair}",
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[(set QPR:$dst, (v2f64 (load addrmode4:$addr)))]> {
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let Inst{27-25} = 0b110;
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let Inst{24} = 0; // P bit
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@ -158,7 +158,7 @@ def VLDRQ : NI4<(outs QPR:$dst), (ins addrmode4:$addr),
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// Use vstmia to store a Q register as a D register pair.
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def VSTRQ : NI4<(outs), (ins QPR:$src, addrmode4:$addr),
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IIC_fpStorem,
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"vstmia $addr, ${src:dregpair}",
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"vstmia\t$addr, ${src:dregpair}",
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[(store (v2f64 QPR:$src), addrmode4:$addr)]> {
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let Inst{27-25} = 0b110;
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let Inst{24} = 0; // P bit
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