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Refactor MachO relocation generaration into the Target directories.
Move the target-specific RecordRelocation logic out of the generic MC MachObjectWriter and into the target-specific object writers. This allows nuking quite a bit of target knowledge from the supposedly target-independent bits in lib/MC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133844 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach
parent
e6b8bf8c4a
commit
ba8297ec08
@ -10,11 +10,20 @@
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#ifndef LLVM_MC_MCMACHOBJECTWRITER_H
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#define LLVM_MC_MCMACHOBJECTWRITER_H
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/OwningPtr.h"
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#include "llvm/ADT/SmallString.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCObjectWriter.h"
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#include "llvm/Object/MachOFormat.h"
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#include "llvm/Support/DataTypes.h"
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#include <vector>
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namespace llvm {
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class MCSectionData;
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class MachObjectWriter;
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class MCMachObjectTargetWriter {
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const unsigned Is64Bit : 1;
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const uint32_t CPUType;
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@ -48,8 +57,191 @@ public:
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}
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/// @}
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/// @name API
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/// @{
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virtual void RecordRelocation(MachObjectWriter *Writer,
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const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup,
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MCValue Target,
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uint64_t &FixedValue) = 0;
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/// @}
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};
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class MachObjectWriter : public MCObjectWriter {
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/// MachSymbolData - Helper struct for containing some precomputed information
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/// on symbols.
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struct MachSymbolData {
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MCSymbolData *SymbolData;
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uint64_t StringIndex;
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uint8_t SectionIndex;
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// Support lexicographic sorting.
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bool operator<(const MachSymbolData &RHS) const;
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};
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/// The target specific Mach-O writer instance.
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llvm::OwningPtr<MCMachObjectTargetWriter> TargetObjectWriter;
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/// @name Relocation Data
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/// @{
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llvm::DenseMap<const MCSectionData*,
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std::vector<object::macho::RelocationEntry> > Relocations;
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llvm::DenseMap<const MCSectionData*, unsigned> IndirectSymBase;
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/// @}
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/// @name Symbol Table Data
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/// @{
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SmallString<256> StringTable;
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std::vector<MachSymbolData> LocalSymbolData;
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std::vector<MachSymbolData> ExternalSymbolData;
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std::vector<MachSymbolData> UndefinedSymbolData;
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/// @}
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public:
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MachObjectWriter(MCMachObjectTargetWriter *MOTW, raw_ostream &_OS,
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bool _IsLittleEndian)
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: MCObjectWriter(_OS, _IsLittleEndian), TargetObjectWriter(MOTW) {
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}
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/// @name Utility Methods
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/// @{
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bool isFixupKindPCRel(const MCAssembler &Asm, unsigned Kind);
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SectionAddrMap SectionAddress;
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SectionAddrMap &getSectionAddressMap() { return SectionAddress; }
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uint64_t getSectionAddress(const MCSectionData* SD) const {
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return SectionAddress.lookup(SD);
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}
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uint64_t getSymbolAddress(const MCSymbolData* SD,
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const MCAsmLayout &Layout) const;
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uint64_t getFragmentAddress(const MCFragment *Fragment,
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const MCAsmLayout &Layout) const;
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uint64_t getPaddingSize(const MCSectionData *SD,
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const MCAsmLayout &Layout) const;
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bool doesSymbolRequireExternRelocation(const MCSymbolData *SD);
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/// @}
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/// @name Target Writer Proxy Accessors
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/// @{
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bool is64Bit() const { return TargetObjectWriter->is64Bit(); }
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bool isARM() const {
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uint32_t CPUType = TargetObjectWriter->getCPUType() &
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~object::mach::CTFM_ArchMask;
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return CPUType == object::mach::CTM_ARM;
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}
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/// @}
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void WriteHeader(unsigned NumLoadCommands, unsigned LoadCommandsSize,
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bool SubsectionsViaSymbols);
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/// WriteSegmentLoadCommand - Write a segment load command.
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///
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/// \arg NumSections - The number of sections in this segment.
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/// \arg SectionDataSize - The total size of the sections.
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void WriteSegmentLoadCommand(unsigned NumSections,
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uint64_t VMSize,
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uint64_t SectionDataStartOffset,
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uint64_t SectionDataSize);
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void WriteSection(const MCAssembler &Asm, const MCAsmLayout &Layout,
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const MCSectionData &SD, uint64_t FileOffset,
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uint64_t RelocationsStart, unsigned NumRelocations);
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void WriteSymtabLoadCommand(uint32_t SymbolOffset, uint32_t NumSymbols,
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uint32_t StringTableOffset,
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uint32_t StringTableSize);
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void WriteDysymtabLoadCommand(uint32_t FirstLocalSymbol,
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uint32_t NumLocalSymbols,
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uint32_t FirstExternalSymbol,
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uint32_t NumExternalSymbols,
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uint32_t FirstUndefinedSymbol,
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uint32_t NumUndefinedSymbols,
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uint32_t IndirectSymbolOffset,
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uint32_t NumIndirectSymbols);
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void WriteNlist(MachSymbolData &MSD, const MCAsmLayout &Layout);
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// FIXME: We really need to improve the relocation validation. Basically, we
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// want to implement a separate computation which evaluates the relocation
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// entry as the linker would, and verifies that the resultant fixup value is
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// exactly what the encoder wanted. This will catch several classes of
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// problems:
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//
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// - Relocation entry bugs, the two algorithms are unlikely to have the same
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// exact bug.
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//
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// - Relaxation issues, where we forget to relax something.
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//
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// - Input errors, where something cannot be correctly encoded. 'as' allows
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// these through in many cases.
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void addRelocation(const MCSectionData *SD,
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object::macho::RelocationEntry &MRE) {
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Relocations[SD].push_back(MRE);
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}
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void RecordScatteredRelocation(const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup, MCValue Target,
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unsigned Log2Size,
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uint64_t &FixedValue);
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void RecordTLVPRelocation(const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup, MCValue Target,
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uint64_t &FixedValue);
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void RecordRelocation(const MCAssembler &Asm, const MCAsmLayout &Layout,
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const MCFragment *Fragment, const MCFixup &Fixup,
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MCValue Target, uint64_t &FixedValue);
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void BindIndirectSymbols(MCAssembler &Asm);
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/// ComputeSymbolTable - Compute the symbol table data
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///
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/// \param StringTable [out] - The string table data.
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/// \param StringIndexMap [out] - Map from symbol names to offsets in the
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/// string table.
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void ComputeSymbolTable(MCAssembler &Asm, SmallString<256> &StringTable,
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std::vector<MachSymbolData> &LocalSymbolData,
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std::vector<MachSymbolData> &ExternalSymbolData,
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std::vector<MachSymbolData> &UndefinedSymbolData);
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void computeSectionAddresses(const MCAssembler &Asm,
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const MCAsmLayout &Layout);
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void ExecutePostLayoutBinding(MCAssembler &Asm, const MCAsmLayout &Layout);
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virtual bool IsSymbolRefDifferenceFullyResolvedImpl(const MCAssembler &Asm,
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const MCSymbolData &DataA,
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const MCFragment &FB,
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bool InSet,
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bool IsPCRel) const;
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void WriteObject(MCAssembler &Asm, const MCAsmLayout &Layout);
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};
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/// \brief Construct a new Mach-O writer instance.
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///
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/// This routine takes ownership of the target writer subclass.
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File diff suppressed because it is too large
Load Diff
@ -8,19 +8,376 @@
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//===----------------------------------------------------------------------===//
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#include "ARM.h"
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#include "ARMFixupKinds.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCAsmLayout.h"
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#include "llvm/MC/MCMachObjectWriter.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCFixup.h"
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#include "llvm/MC/MCFixupKindInfo.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Object/MachOFormat.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Target/TargetAsmBackend.h"
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using namespace llvm;
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using namespace llvm::object;
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namespace {
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class ARMMachObjectWriter : public MCMachObjectTargetWriter {
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void RecordARMScatteredRelocation(MachObjectWriter *Writer,
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const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup,
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MCValue Target,
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unsigned Log2Size,
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uint64_t &FixedValue);
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void RecordARMMovwMovtRelocation(MachObjectWriter *Writer,
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const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup, MCValue Target,
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uint64_t &FixedValue);
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public:
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ARMMachObjectWriter(bool Is64Bit, uint32_t CPUType,
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uint32_t CPUSubtype)
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: MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype,
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/*UseAggressiveSymbolFolding=*/true) {}
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void RecordRelocation(MachObjectWriter *Writer,
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const MCAssembler &Asm, const MCAsmLayout &Layout,
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const MCFragment *Fragment, const MCFixup &Fixup,
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MCValue Target, uint64_t &FixedValue);
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};
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}
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static bool getARMFixupKindMachOInfo(unsigned Kind, unsigned &RelocType,
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unsigned &Log2Size) {
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RelocType = unsigned(macho::RIT_Vanilla);
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Log2Size = ~0U;
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switch (Kind) {
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default:
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return false;
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case FK_Data_1:
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Log2Size = llvm::Log2_32(1);
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return true;
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case FK_Data_2:
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Log2Size = llvm::Log2_32(2);
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return true;
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case FK_Data_4:
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Log2Size = llvm::Log2_32(4);
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return true;
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case FK_Data_8:
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Log2Size = llvm::Log2_32(8);
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return true;
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// Handle 24-bit branch kinds.
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case ARM::fixup_arm_ldst_pcrel_12:
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case ARM::fixup_arm_pcrel_10:
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case ARM::fixup_arm_adr_pcrel_12:
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case ARM::fixup_arm_condbranch:
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case ARM::fixup_arm_uncondbranch:
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RelocType = unsigned(macho::RIT_ARM_Branch24Bit);
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// Report as 'long', even though that is not quite accurate.
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Log2Size = llvm::Log2_32(4);
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return true;
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// Handle Thumb branches.
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case ARM::fixup_arm_thumb_br:
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RelocType = unsigned(macho::RIT_ARM_ThumbBranch22Bit);
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Log2Size = llvm::Log2_32(2);
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return true;
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case ARM::fixup_t2_uncondbranch:
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case ARM::fixup_arm_thumb_bl:
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case ARM::fixup_arm_thumb_blx:
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RelocType = unsigned(macho::RIT_ARM_ThumbBranch22Bit);
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Log2Size = llvm::Log2_32(4);
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return true;
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case ARM::fixup_arm_movt_hi16:
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case ARM::fixup_arm_movt_hi16_pcrel:
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case ARM::fixup_t2_movt_hi16:
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case ARM::fixup_t2_movt_hi16_pcrel:
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RelocType = unsigned(macho::RIT_ARM_HalfDifference);
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// Report as 'long', even though that is not quite accurate.
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Log2Size = llvm::Log2_32(4);
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return true;
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case ARM::fixup_arm_movw_lo16:
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case ARM::fixup_arm_movw_lo16_pcrel:
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case ARM::fixup_t2_movw_lo16:
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case ARM::fixup_t2_movw_lo16_pcrel:
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RelocType = unsigned(macho::RIT_ARM_Half);
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// Report as 'long', even though that is not quite accurate.
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Log2Size = llvm::Log2_32(4);
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return true;
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}
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}
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void ARMMachObjectWriter::
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RecordARMMovwMovtRelocation(MachObjectWriter *Writer,
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const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup,
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MCValue Target,
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uint64_t &FixedValue) {
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uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
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unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
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unsigned Type = macho::RIT_ARM_Half;
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// See <reloc.h>.
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const MCSymbol *A = &Target.getSymA()->getSymbol();
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MCSymbolData *A_SD = &Asm.getSymbolData(*A);
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if (!A_SD->getFragment())
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report_fatal_error("symbol '" + A->getName() +
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"' can not be undefined in a subtraction expression");
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uint32_t Value = Writer->getSymbolAddress(A_SD, Layout);
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uint32_t Value2 = 0;
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uint64_t SecAddr =
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Writer->getSectionAddress(A_SD->getFragment()->getParent());
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FixedValue += SecAddr;
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if (const MCSymbolRefExpr *B = Target.getSymB()) {
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MCSymbolData *B_SD = &Asm.getSymbolData(B->getSymbol());
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if (!B_SD->getFragment())
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report_fatal_error("symbol '" + B->getSymbol().getName() +
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"' can not be undefined in a subtraction expression");
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// Select the appropriate difference relocation type.
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Type = macho::RIT_ARM_HalfDifference;
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Value2 = Writer->getSymbolAddress(B_SD, Layout);
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FixedValue -= Writer->getSectionAddress(B_SD->getFragment()->getParent());
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}
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// Relocations are written out in reverse order, so the PAIR comes first.
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// ARM_RELOC_HALF and ARM_RELOC_HALF_SECTDIFF abuse the r_length field:
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//
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// For these two r_type relocations they always have a pair following them and
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// the r_length bits are used differently. The encoding of the r_length is as
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// follows:
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// low bit of r_length:
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// 0 - :lower16: for movw instructions
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// 1 - :upper16: for movt instructions
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// high bit of r_length:
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// 0 - arm instructions
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// 1 - thumb instructions
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// the other half of the relocated expression is in the following pair
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// relocation entry in the the low 16 bits of r_address field.
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unsigned ThumbBit = 0;
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unsigned MovtBit = 0;
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switch ((unsigned)Fixup.getKind()) {
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default: break;
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case ARM::fixup_arm_movt_hi16:
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case ARM::fixup_arm_movt_hi16_pcrel:
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MovtBit = 1;
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break;
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case ARM::fixup_t2_movt_hi16:
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case ARM::fixup_t2_movt_hi16_pcrel:
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MovtBit = 1;
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// Fallthrough
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case ARM::fixup_t2_movw_lo16:
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case ARM::fixup_t2_movw_lo16_pcrel:
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ThumbBit = 1;
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break;
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}
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if (Type == macho::RIT_ARM_HalfDifference) {
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uint32_t OtherHalf = MovtBit
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? (FixedValue & 0xffff) : ((FixedValue & 0xffff0000) >> 16);
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macho::RelocationEntry MRE;
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MRE.Word0 = ((OtherHalf << 0) |
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(macho::RIT_Pair << 24) |
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(MovtBit << 28) |
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(ThumbBit << 29) |
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(IsPCRel << 30) |
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macho::RF_Scattered);
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MRE.Word1 = Value2;
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Writer->addRelocation(Fragment->getParent(), MRE);
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}
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macho::RelocationEntry MRE;
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MRE.Word0 = ((FixupOffset << 0) |
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(Type << 24) |
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(MovtBit << 28) |
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(ThumbBit << 29) |
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(IsPCRel << 30) |
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macho::RF_Scattered);
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MRE.Word1 = Value;
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Writer->addRelocation(Fragment->getParent(), MRE);
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}
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void ARMMachObjectWriter::RecordARMScatteredRelocation(MachObjectWriter *Writer,
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const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup,
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MCValue Target,
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unsigned Log2Size,
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uint64_t &FixedValue) {
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uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
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unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
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unsigned Type = macho::RIT_Vanilla;
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// See <reloc.h>.
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const MCSymbol *A = &Target.getSymA()->getSymbol();
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MCSymbolData *A_SD = &Asm.getSymbolData(*A);
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if (!A_SD->getFragment())
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report_fatal_error("symbol '" + A->getName() +
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"' can not be undefined in a subtraction expression");
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uint32_t Value = Writer->getSymbolAddress(A_SD, Layout);
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uint64_t SecAddr = Writer->getSectionAddress(A_SD->getFragment()->getParent());
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FixedValue += SecAddr;
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uint32_t Value2 = 0;
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if (const MCSymbolRefExpr *B = Target.getSymB()) {
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MCSymbolData *B_SD = &Asm.getSymbolData(B->getSymbol());
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if (!B_SD->getFragment())
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report_fatal_error("symbol '" + B->getSymbol().getName() +
|
||||
"' can not be undefined in a subtraction expression");
|
||||
|
||||
// Select the appropriate difference relocation type.
|
||||
Type = macho::RIT_Difference;
|
||||
Value2 = Writer->getSymbolAddress(B_SD, Layout);
|
||||
FixedValue -= Writer->getSectionAddress(B_SD->getFragment()->getParent());
|
||||
}
|
||||
|
||||
// Relocations are written out in reverse order, so the PAIR comes first.
|
||||
if (Type == macho::RIT_Difference ||
|
||||
Type == macho::RIT_Generic_LocalDifference) {
|
||||
macho::RelocationEntry MRE;
|
||||
MRE.Word0 = ((0 << 0) |
|
||||
(macho::RIT_Pair << 24) |
|
||||
(Log2Size << 28) |
|
||||
(IsPCRel << 30) |
|
||||
macho::RF_Scattered);
|
||||
MRE.Word1 = Value2;
|
||||
Writer->addRelocation(Fragment->getParent(), MRE);
|
||||
}
|
||||
|
||||
macho::RelocationEntry MRE;
|
||||
MRE.Word0 = ((FixupOffset << 0) |
|
||||
(Type << 24) |
|
||||
(Log2Size << 28) |
|
||||
(IsPCRel << 30) |
|
||||
macho::RF_Scattered);
|
||||
MRE.Word1 = Value;
|
||||
Writer->addRelocation(Fragment->getParent(), MRE);
|
||||
}
|
||||
|
||||
void ARMMachObjectWriter::RecordRelocation(MachObjectWriter *Writer,
|
||||
const MCAssembler &Asm,
|
||||
const MCAsmLayout &Layout,
|
||||
const MCFragment *Fragment,
|
||||
const MCFixup &Fixup,
|
||||
MCValue Target,
|
||||
uint64_t &FixedValue) {
|
||||
unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
|
||||
unsigned Log2Size;
|
||||
unsigned RelocType = macho::RIT_Vanilla;
|
||||
if (!getARMFixupKindMachOInfo(Fixup.getKind(), RelocType, Log2Size)) {
|
||||
report_fatal_error("unknown ARM fixup kind!");
|
||||
return;
|
||||
}
|
||||
|
||||
// If this is a difference or a defined symbol plus an offset, then we need a
|
||||
// scattered relocation entry. Differences always require scattered
|
||||
// relocations.
|
||||
if (Target.getSymB()) {
|
||||
if (RelocType == macho::RIT_ARM_Half ||
|
||||
RelocType == macho::RIT_ARM_HalfDifference)
|
||||
return RecordARMMovwMovtRelocation(Writer, Asm, Layout, Fragment, Fixup,
|
||||
Target, FixedValue);
|
||||
return RecordARMScatteredRelocation(Writer, Asm, Layout, Fragment, Fixup,
|
||||
Target, Log2Size, FixedValue);
|
||||
}
|
||||
|
||||
// Get the symbol data, if any.
|
||||
MCSymbolData *SD = 0;
|
||||
if (Target.getSymA())
|
||||
SD = &Asm.getSymbolData(Target.getSymA()->getSymbol());
|
||||
|
||||
// FIXME: For other platforms, we need to use scattered relocations for
|
||||
// internal relocations with offsets. If this is an internal relocation with
|
||||
// an offset, it also needs a scattered relocation entry.
|
||||
//
|
||||
// Is this right for ARM?
|
||||
uint32_t Offset = Target.getConstant();
|
||||
if (IsPCRel && RelocType == macho::RIT_Vanilla)
|
||||
Offset += 1 << Log2Size;
|
||||
if (Offset && SD && !Writer->doesSymbolRequireExternRelocation(SD))
|
||||
return RecordARMScatteredRelocation(Writer, Asm, Layout, Fragment, Fixup,
|
||||
Target, Log2Size, FixedValue);
|
||||
|
||||
// See <reloc.h>.
|
||||
uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
|
||||
unsigned Index = 0;
|
||||
unsigned IsExtern = 0;
|
||||
unsigned Type = 0;
|
||||
|
||||
if (Target.isAbsolute()) { // constant
|
||||
// FIXME!
|
||||
report_fatal_error("FIXME: relocations to absolute targets "
|
||||
"not yet implemented");
|
||||
} else {
|
||||
// Resolve constant variables.
|
||||
if (SD->getSymbol().isVariable()) {
|
||||
int64_t Res;
|
||||
if (SD->getSymbol().getVariableValue()->EvaluateAsAbsolute(
|
||||
Res, Layout, Writer->getSectionAddressMap())) {
|
||||
FixedValue = Res;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
// Check whether we need an external or internal relocation.
|
||||
if (Writer->doesSymbolRequireExternRelocation(SD)) {
|
||||
IsExtern = 1;
|
||||
Index = SD->getIndex();
|
||||
|
||||
// For external relocations, make sure to offset the fixup value to
|
||||
// compensate for the addend of the symbol address, if it was
|
||||
// undefined. This occurs with weak definitions, for example.
|
||||
if (!SD->Symbol->isUndefined())
|
||||
FixedValue -= Layout.getSymbolOffset(SD);
|
||||
} else {
|
||||
// The index is the section ordinal (1-based).
|
||||
const MCSectionData &SymSD = Asm.getSectionData(
|
||||
SD->getSymbol().getSection());
|
||||
Index = SymSD.getOrdinal() + 1;
|
||||
FixedValue += Writer->getSectionAddress(&SymSD);
|
||||
}
|
||||
if (IsPCRel)
|
||||
FixedValue -= Writer->getSectionAddress(Fragment->getParent());
|
||||
|
||||
// The type is determined by the fixup kind.
|
||||
Type = RelocType;
|
||||
}
|
||||
|
||||
// struct relocation_info (8 bytes)
|
||||
macho::RelocationEntry MRE;
|
||||
MRE.Word0 = FixupOffset;
|
||||
MRE.Word1 = ((Index << 0) |
|
||||
(IsPCRel << 24) |
|
||||
(Log2Size << 25) |
|
||||
(IsExtern << 27) |
|
||||
(Type << 28));
|
||||
Writer->addRelocation(Fragment->getParent(), MRE);
|
||||
}
|
||||
|
||||
MCObjectWriter *llvm::createARMMachObjectWriter(raw_ostream &OS,
|
||||
bool Is64Bit,
|
||||
uint32_t CPUType,
|
||||
|
||||
@ -13,6 +13,7 @@
|
||||
#include "llvm/MC/MCMachObjectWriter.h"
|
||||
#include "llvm/MC/MCSectionMachO.h"
|
||||
#include "llvm/MC/MCObjectWriter.h"
|
||||
#include "llvm/MC/MCValue.h"
|
||||
#include "llvm/Object/MachOFormat.h"
|
||||
#include "llvm/Target/TargetRegistry.h"
|
||||
using namespace llvm;
|
||||
@ -23,6 +24,11 @@ public:
|
||||
PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType,
|
||||
uint32_t CPUSubtype)
|
||||
: MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
|
||||
|
||||
void RecordRelocation(MachObjectWriter *Writer,
|
||||
const MCAssembler &Asm, const MCAsmLayout &Layout,
|
||||
const MCFragment *Fragment, const MCFixup &Fixup,
|
||||
MCValue Target, uint64_t &FixedValue) {}
|
||||
};
|
||||
|
||||
class PPCAsmBackend : public TargetAsmBackend {
|
||||
|
||||
@ -8,19 +8,541 @@
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
#include "X86.h"
|
||||
#include "X86FixupKinds.h"
|
||||
#include "llvm/ADT/Twine.h"
|
||||
#include "llvm/MC/MCAssembler.h"
|
||||
#include "llvm/MC/MCAsmLayout.h"
|
||||
#include "llvm/MC/MCMachObjectWriter.h"
|
||||
#include "llvm/MC/MCSectionMachO.h"
|
||||
#include "llvm/MC/MCValue.h"
|
||||
#include "llvm/Support/ErrorHandling.h"
|
||||
#include "llvm/Object/MachOFormat.h"
|
||||
|
||||
using namespace llvm;
|
||||
using namespace llvm::object;
|
||||
|
||||
namespace {
|
||||
class X86MachObjectWriter : public MCMachObjectTargetWriter {
|
||||
void RecordScatteredRelocation(MachObjectWriter *Writer,
|
||||
const MCAssembler &Asm,
|
||||
const MCAsmLayout &Layout,
|
||||
const MCFragment *Fragment,
|
||||
const MCFixup &Fixup,
|
||||
MCValue Target,
|
||||
unsigned Log2Size,
|
||||
uint64_t &FixedValue);
|
||||
void RecordTLVPRelocation(MachObjectWriter *Writer,
|
||||
const MCAssembler &Asm,
|
||||
const MCAsmLayout &Layout,
|
||||
const MCFragment *Fragment,
|
||||
const MCFixup &Fixup,
|
||||
MCValue Target,
|
||||
uint64_t &FixedValue);
|
||||
|
||||
void RecordX86Relocation(MachObjectWriter *Writer,
|
||||
const MCAssembler &Asm,
|
||||
const MCAsmLayout &Layout,
|
||||
const MCFragment *Fragment,
|
||||
const MCFixup &Fixup,
|
||||
MCValue Target,
|
||||
uint64_t &FixedValue);
|
||||
void RecordX86_64Relocation(MachObjectWriter *Writer,
|
||||
const MCAssembler &Asm,
|
||||
const MCAsmLayout &Layout,
|
||||
const MCFragment *Fragment,
|
||||
const MCFixup &Fixup,
|
||||
MCValue Target,
|
||||
uint64_t &FixedValue);
|
||||
public:
|
||||
X86MachObjectWriter(bool Is64Bit, uint32_t CPUType,
|
||||
uint32_t CPUSubtype)
|
||||
: MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype,
|
||||
/*UseAggressiveSymbolFolding=*/Is64Bit) {}
|
||||
|
||||
void RecordRelocation(MachObjectWriter *Writer,
|
||||
const MCAssembler &Asm, const MCAsmLayout &Layout,
|
||||
const MCFragment *Fragment, const MCFixup &Fixup,
|
||||
MCValue Target, uint64_t &FixedValue) {
|
||||
if (Writer->is64Bit())
|
||||
RecordX86_64Relocation(Writer, Asm, Layout, Fragment, Fixup, Target,
|
||||
FixedValue);
|
||||
else
|
||||
RecordX86Relocation(Writer, Asm, Layout, Fragment, Fixup, Target,
|
||||
FixedValue);
|
||||
}
|
||||
};
|
||||
}
|
||||
|
||||
static bool isFixupKindRIPRel(unsigned Kind) {
|
||||
return Kind == X86::reloc_riprel_4byte ||
|
||||
Kind == X86::reloc_riprel_4byte_movq_load;
|
||||
}
|
||||
|
||||
static unsigned getFixupKindLog2Size(unsigned Kind) {
|
||||
switch (Kind) {
|
||||
default:
|
||||
llvm_unreachable("invalid fixup kind!");
|
||||
case FK_PCRel_1:
|
||||
case FK_Data_1: return 0;
|
||||
case FK_PCRel_2:
|
||||
case FK_Data_2: return 1;
|
||||
case FK_PCRel_4:
|
||||
// FIXME: Remove these!!!
|
||||
case X86::reloc_riprel_4byte:
|
||||
case X86::reloc_riprel_4byte_movq_load:
|
||||
case X86::reloc_signed_4byte:
|
||||
case FK_Data_4: return 2;
|
||||
case FK_Data_8: return 3;
|
||||
}
|
||||
}
|
||||
|
||||
void X86MachObjectWriter::RecordX86_64Relocation(MachObjectWriter *Writer,
|
||||
const MCAssembler &Asm,
|
||||
const MCAsmLayout &Layout,
|
||||
const MCFragment *Fragment,
|
||||
const MCFixup &Fixup,
|
||||
MCValue Target,
|
||||
uint64_t &FixedValue) {
|
||||
unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
|
||||
unsigned IsRIPRel = isFixupKindRIPRel(Fixup.getKind());
|
||||
unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());
|
||||
|
||||
// See <reloc.h>.
|
||||
uint32_t FixupOffset =
|
||||
Layout.getFragmentOffset(Fragment) + Fixup.getOffset();
|
||||
uint32_t FixupAddress =
|
||||
Writer->getFragmentAddress(Fragment, Layout) + Fixup.getOffset();
|
||||
int64_t Value = 0;
|
||||
unsigned Index = 0;
|
||||
unsigned IsExtern = 0;
|
||||
unsigned Type = 0;
|
||||
|
||||
Value = Target.getConstant();
|
||||
|
||||
if (IsPCRel) {
|
||||
// Compensate for the relocation offset, Darwin x86_64 relocations only have
|
||||
// the addend and appear to have attempted to define it to be the actual
|
||||
// expression addend without the PCrel bias. However, instructions with data
|
||||
// following the relocation are not accommodated for (see comment below
|
||||
// regarding SIGNED{1,2,4}), so it isn't exactly that either.
|
||||
Value += 1LL << Log2Size;
|
||||
}
|
||||
|
||||
if (Target.isAbsolute()) { // constant
|
||||
// SymbolNum of 0 indicates the absolute section.
|
||||
Type = macho::RIT_X86_64_Unsigned;
|
||||
Index = 0;
|
||||
|
||||
// FIXME: I believe this is broken, I don't think the linker can understand
|
||||
// it. I think it would require a local relocation, but I'm not sure if that
|
||||
// would work either. The official way to get an absolute PCrel relocation
|
||||
// is to use an absolute symbol (which we don't support yet).
|
||||
if (IsPCRel) {
|
||||
IsExtern = 1;
|
||||
Type = macho::RIT_X86_64_Branch;
|
||||
}
|
||||
} else if (Target.getSymB()) { // A - B + constant
|
||||
const MCSymbol *A = &Target.getSymA()->getSymbol();
|
||||
MCSymbolData &A_SD = Asm.getSymbolData(*A);
|
||||
const MCSymbolData *A_Base = Asm.getAtom(&A_SD);
|
||||
|
||||
const MCSymbol *B = &Target.getSymB()->getSymbol();
|
||||
MCSymbolData &B_SD = Asm.getSymbolData(*B);
|
||||
const MCSymbolData *B_Base = Asm.getAtom(&B_SD);
|
||||
|
||||
// Neither symbol can be modified.
|
||||
if (Target.getSymA()->getKind() != MCSymbolRefExpr::VK_None ||
|
||||
Target.getSymB()->getKind() != MCSymbolRefExpr::VK_None)
|
||||
report_fatal_error("unsupported relocation of modified symbol");
|
||||
|
||||
// We don't support PCrel relocations of differences. Darwin 'as' doesn't
|
||||
// implement most of these correctly.
|
||||
if (IsPCRel)
|
||||
report_fatal_error("unsupported pc-relative relocation of difference");
|
||||
|
||||
// The support for the situation where one or both of the symbols would
|
||||
// require a local relocation is handled just like if the symbols were
|
||||
// external. This is certainly used in the case of debug sections where the
|
||||
// section has only temporary symbols and thus the symbols don't have base
|
||||
// symbols. This is encoded using the section ordinal and non-extern
|
||||
// relocation entries.
|
||||
|
||||
// Darwin 'as' doesn't emit correct relocations for this (it ends up with a
|
||||
// single SIGNED relocation); reject it for now. Except the case where both
|
||||
// symbols don't have a base, equal but both NULL.
|
||||
if (A_Base == B_Base && A_Base)
|
||||
report_fatal_error("unsupported relocation with identical base");
|
||||
|
||||
Value += Writer->getSymbolAddress(&A_SD, Layout) -
|
||||
(A_Base == NULL ? 0 : Writer->getSymbolAddress(A_Base, Layout));
|
||||
Value -= Writer->getSymbolAddress(&B_SD, Layout) -
|
||||
(B_Base == NULL ? 0 : Writer->getSymbolAddress(B_Base, Layout));
|
||||
|
||||
if (A_Base) {
|
||||
Index = A_Base->getIndex();
|
||||
IsExtern = 1;
|
||||
}
|
||||
else {
|
||||
Index = A_SD.getFragment()->getParent()->getOrdinal() + 1;
|
||||
IsExtern = 0;
|
||||
}
|
||||
Type = macho::RIT_X86_64_Unsigned;
|
||||
|
||||
macho::RelocationEntry MRE;
|
||||
MRE.Word0 = FixupOffset;
|
||||
MRE.Word1 = ((Index << 0) |
|
||||
(IsPCRel << 24) |
|
||||
(Log2Size << 25) |
|
||||
(IsExtern << 27) |
|
||||
(Type << 28));
|
||||
Writer->addRelocation(Fragment->getParent(), MRE);
|
||||
|
||||
if (B_Base) {
|
||||
Index = B_Base->getIndex();
|
||||
IsExtern = 1;
|
||||
}
|
||||
else {
|
||||
Index = B_SD.getFragment()->getParent()->getOrdinal() + 1;
|
||||
IsExtern = 0;
|
||||
}
|
||||
Type = macho::RIT_X86_64_Subtractor;
|
||||
} else {
|
||||
const MCSymbol *Symbol = &Target.getSymA()->getSymbol();
|
||||
MCSymbolData &SD = Asm.getSymbolData(*Symbol);
|
||||
const MCSymbolData *Base = Asm.getAtom(&SD);
|
||||
|
||||
// Relocations inside debug sections always use local relocations when
|
||||
// possible. This seems to be done because the debugger doesn't fully
|
||||
// understand x86_64 relocation entries, and expects to find values that
|
||||
// have already been fixed up.
|
||||
if (Symbol->isInSection()) {
|
||||
const MCSectionMachO &Section = static_cast<const MCSectionMachO&>(
|
||||
Fragment->getParent()->getSection());
|
||||
if (Section.hasAttribute(MCSectionMachO::S_ATTR_DEBUG))
|
||||
Base = 0;
|
||||
}
|
||||
|
||||
// x86_64 almost always uses external relocations, except when there is no
|
||||
// symbol to use as a base address (a local symbol with no preceding
|
||||
// non-local symbol).
|
||||
if (Base) {
|
||||
Index = Base->getIndex();
|
||||
IsExtern = 1;
|
||||
|
||||
// Add the local offset, if needed.
|
||||
if (Base != &SD)
|
||||
Value += Layout.getSymbolOffset(&SD) - Layout.getSymbolOffset(Base);
|
||||
} else if (Symbol->isInSection() && !Symbol->isVariable()) {
|
||||
// The index is the section ordinal (1-based).
|
||||
Index = SD.getFragment()->getParent()->getOrdinal() + 1;
|
||||
IsExtern = 0;
|
||||
Value += Writer->getSymbolAddress(&SD, Layout);
|
||||
|
||||
if (IsPCRel)
|
||||
Value -= FixupAddress + (1 << Log2Size);
|
||||
} else if (Symbol->isVariable()) {
|
||||
const MCExpr *Value = Symbol->getVariableValue();
|
||||
int64_t Res;
|
||||
bool isAbs = Value->EvaluateAsAbsolute(Res, Layout,
|
||||
Writer->getSectionAddressMap());
|
||||
if (isAbs) {
|
||||
FixedValue = Res;
|
||||
return;
|
||||
} else {
|
||||
report_fatal_error("unsupported relocation of variable '" +
|
||||
Symbol->getName() + "'");
|
||||
}
|
||||
} else {
|
||||
report_fatal_error("unsupported relocation of undefined symbol '" +
|
||||
Symbol->getName() + "'");
|
||||
}
|
||||
|
||||
MCSymbolRefExpr::VariantKind Modifier = Target.getSymA()->getKind();
|
||||
if (IsPCRel) {
|
||||
if (IsRIPRel) {
|
||||
if (Modifier == MCSymbolRefExpr::VK_GOTPCREL) {
|
||||
// x86_64 distinguishes movq foo@GOTPCREL so that the linker can
|
||||
// rewrite the movq to an leaq at link time if the symbol ends up in
|
||||
// the same linkage unit.
|
||||
if (unsigned(Fixup.getKind()) == X86::reloc_riprel_4byte_movq_load)
|
||||
Type = macho::RIT_X86_64_GOTLoad;
|
||||
else
|
||||
Type = macho::RIT_X86_64_GOT;
|
||||
} else if (Modifier == MCSymbolRefExpr::VK_TLVP) {
|
||||
Type = macho::RIT_X86_64_TLV;
|
||||
} else if (Modifier != MCSymbolRefExpr::VK_None) {
|
||||
report_fatal_error("unsupported symbol modifier in relocation");
|
||||
} else {
|
||||
Type = macho::RIT_X86_64_Signed;
|
||||
|
||||
// The Darwin x86_64 relocation format has a problem where it cannot
|
||||
// encode an address (L<foo> + <constant>) which is outside the atom
|
||||
// containing L<foo>. Generally, this shouldn't occur but it does
|
||||
// happen when we have a RIPrel instruction with data following the
|
||||
// relocation entry (e.g., movb $012, L0(%rip)). Even with the PCrel
|
||||
// adjustment Darwin x86_64 uses, the offset is still negative and the
|
||||
// linker has no way to recognize this.
|
||||
//
|
||||
// To work around this, Darwin uses several special relocation types
|
||||
// to indicate the offsets. However, the specification or
|
||||
// implementation of these seems to also be incomplete; they should
|
||||
// adjust the addend as well based on the actual encoded instruction
|
||||
// (the additional bias), but instead appear to just look at the final
|
||||
// offset.
|
||||
switch (-(Target.getConstant() + (1LL << Log2Size))) {
|
||||
case 1: Type = macho::RIT_X86_64_Signed1; break;
|
||||
case 2: Type = macho::RIT_X86_64_Signed2; break;
|
||||
case 4: Type = macho::RIT_X86_64_Signed4; break;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
if (Modifier != MCSymbolRefExpr::VK_None)
|
||||
report_fatal_error("unsupported symbol modifier in branch "
|
||||
"relocation");
|
||||
|
||||
Type = macho::RIT_X86_64_Branch;
|
||||
}
|
||||
} else {
|
||||
if (Modifier == MCSymbolRefExpr::VK_GOT) {
|
||||
Type = macho::RIT_X86_64_GOT;
|
||||
} else if (Modifier == MCSymbolRefExpr::VK_GOTPCREL) {
|
||||
// GOTPCREL is allowed as a modifier on non-PCrel instructions, in which
|
||||
// case all we do is set the PCrel bit in the relocation entry; this is
|
||||
// used with exception handling, for example. The source is required to
|
||||
// include any necessary offset directly.
|
||||
Type = macho::RIT_X86_64_GOT;
|
||||
IsPCRel = 1;
|
||||
} else if (Modifier == MCSymbolRefExpr::VK_TLVP) {
|
||||
report_fatal_error("TLVP symbol modifier should have been rip-rel");
|
||||
} else if (Modifier != MCSymbolRefExpr::VK_None)
|
||||
report_fatal_error("unsupported symbol modifier in relocation");
|
||||
else
|
||||
Type = macho::RIT_X86_64_Unsigned;
|
||||
}
|
||||
}
|
||||
|
||||
// x86_64 always writes custom values into the fixups.
|
||||
FixedValue = Value;
|
||||
|
||||
// struct relocation_info (8 bytes)
|
||||
macho::RelocationEntry MRE;
|
||||
MRE.Word0 = FixupOffset;
|
||||
MRE.Word1 = ((Index << 0) |
|
||||
(IsPCRel << 24) |
|
||||
(Log2Size << 25) |
|
||||
(IsExtern << 27) |
|
||||
(Type << 28));
|
||||
Writer->addRelocation(Fragment->getParent(), MRE);
|
||||
}
|
||||
|
||||
void X86MachObjectWriter::RecordScatteredRelocation(MachObjectWriter *Writer,
|
||||
const MCAssembler &Asm,
|
||||
const MCAsmLayout &Layout,
|
||||
const MCFragment *Fragment,
|
||||
const MCFixup &Fixup,
|
||||
MCValue Target,
|
||||
unsigned Log2Size,
|
||||
uint64_t &FixedValue) {
|
||||
uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
|
||||
unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
|
||||
unsigned Type = macho::RIT_Vanilla;
|
||||
|
||||
// See <reloc.h>.
|
||||
const MCSymbol *A = &Target.getSymA()->getSymbol();
|
||||
MCSymbolData *A_SD = &Asm.getSymbolData(*A);
|
||||
|
||||
if (!A_SD->getFragment())
|
||||
report_fatal_error("symbol '" + A->getName() +
|
||||
"' can not be undefined in a subtraction expression");
|
||||
|
||||
uint32_t Value = Writer->getSymbolAddress(A_SD, Layout);
|
||||
uint64_t SecAddr = Writer->getSectionAddress(A_SD->getFragment()->getParent());
|
||||
FixedValue += SecAddr;
|
||||
uint32_t Value2 = 0;
|
||||
|
||||
if (const MCSymbolRefExpr *B = Target.getSymB()) {
|
||||
MCSymbolData *B_SD = &Asm.getSymbolData(B->getSymbol());
|
||||
|
||||
if (!B_SD->getFragment())
|
||||
report_fatal_error("symbol '" + B->getSymbol().getName() +
|
||||
"' can not be undefined in a subtraction expression");
|
||||
|
||||
// Select the appropriate difference relocation type.
|
||||
//
|
||||
// Note that there is no longer any semantic difference between these two
|
||||
// relocation types from the linkers point of view, this is done solely for
|
||||
// pedantic compatibility with 'as'.
|
||||
Type = A_SD->isExternal() ? (unsigned)macho::RIT_Difference :
|
||||
(unsigned)macho::RIT_Generic_LocalDifference;
|
||||
Value2 = Writer->getSymbolAddress(B_SD, Layout);
|
||||
FixedValue -= Writer->getSectionAddress(B_SD->getFragment()->getParent());
|
||||
}
|
||||
|
||||
// Relocations are written out in reverse order, so the PAIR comes first.
|
||||
if (Type == macho::RIT_Difference ||
|
||||
Type == macho::RIT_Generic_LocalDifference) {
|
||||
macho::RelocationEntry MRE;
|
||||
MRE.Word0 = ((0 << 0) |
|
||||
(macho::RIT_Pair << 24) |
|
||||
(Log2Size << 28) |
|
||||
(IsPCRel << 30) |
|
||||
macho::RF_Scattered);
|
||||
MRE.Word1 = Value2;
|
||||
Writer->addRelocation(Fragment->getParent(), MRE);
|
||||
}
|
||||
|
||||
macho::RelocationEntry MRE;
|
||||
MRE.Word0 = ((FixupOffset << 0) |
|
||||
(Type << 24) |
|
||||
(Log2Size << 28) |
|
||||
(IsPCRel << 30) |
|
||||
macho::RF_Scattered);
|
||||
MRE.Word1 = Value;
|
||||
Writer->addRelocation(Fragment->getParent(), MRE);
|
||||
}
|
||||
|
||||
void X86MachObjectWriter::RecordTLVPRelocation(MachObjectWriter *Writer,
|
||||
const MCAssembler &Asm,
|
||||
const MCAsmLayout &Layout,
|
||||
const MCFragment *Fragment,
|
||||
const MCFixup &Fixup,
|
||||
MCValue Target,
|
||||
uint64_t &FixedValue) {
|
||||
assert(Target.getSymA()->getKind() == MCSymbolRefExpr::VK_TLVP &&
|
||||
!is64Bit() &&
|
||||
"Should only be called with a 32-bit TLVP relocation!");
|
||||
|
||||
unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());
|
||||
uint32_t Value = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
|
||||
unsigned IsPCRel = 0;
|
||||
|
||||
// Get the symbol data.
|
||||
MCSymbolData *SD_A = &Asm.getSymbolData(Target.getSymA()->getSymbol());
|
||||
unsigned Index = SD_A->getIndex();
|
||||
|
||||
// We're only going to have a second symbol in pic mode and it'll be a
|
||||
// subtraction from the picbase. For 32-bit pic the addend is the difference
|
||||
// between the picbase and the next address. For 32-bit static the addend is
|
||||
// zero.
|
||||
if (Target.getSymB()) {
|
||||
// If this is a subtraction then we're pcrel.
|
||||
uint32_t FixupAddress =
|
||||
Writer->getFragmentAddress(Fragment, Layout) + Fixup.getOffset();
|
||||
MCSymbolData *SD_B = &Asm.getSymbolData(Target.getSymB()->getSymbol());
|
||||
IsPCRel = 1;
|
||||
FixedValue = (FixupAddress - Writer->getSymbolAddress(SD_B, Layout) +
|
||||
Target.getConstant());
|
||||
FixedValue += 1ULL << Log2Size;
|
||||
} else {
|
||||
FixedValue = 0;
|
||||
}
|
||||
|
||||
// struct relocation_info (8 bytes)
|
||||
macho::RelocationEntry MRE;
|
||||
MRE.Word0 = Value;
|
||||
MRE.Word1 = ((Index << 0) |
|
||||
(IsPCRel << 24) |
|
||||
(Log2Size << 25) |
|
||||
(1 << 27) | // Extern
|
||||
(macho::RIT_Generic_TLV << 28)); // Type
|
||||
Writer->addRelocation(Fragment->getParent(), MRE);
|
||||
}
|
||||
|
||||
void X86MachObjectWriter::RecordX86Relocation(MachObjectWriter *Writer,
|
||||
const MCAssembler &Asm,
|
||||
const MCAsmLayout &Layout,
|
||||
const MCFragment *Fragment,
|
||||
const MCFixup &Fixup,
|
||||
MCValue Target,
|
||||
uint64_t &FixedValue) {
|
||||
unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
|
||||
unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());
|
||||
|
||||
// If this is a 32-bit TLVP reloc it's handled a bit differently.
|
||||
if (Target.getSymA() &&
|
||||
Target.getSymA()->getKind() == MCSymbolRefExpr::VK_TLVP) {
|
||||
RecordTLVPRelocation(Writer, Asm, Layout, Fragment, Fixup, Target,
|
||||
FixedValue);
|
||||
return;
|
||||
}
|
||||
|
||||
// If this is a difference or a defined symbol plus an offset, then we need a
|
||||
// scattered relocation entry. Differences always require scattered
|
||||
// relocations.
|
||||
if (Target.getSymB())
|
||||
return RecordScatteredRelocation(Writer, Asm, Layout, Fragment, Fixup,
|
||||
Target, Log2Size, FixedValue);
|
||||
|
||||
// Get the symbol data, if any.
|
||||
MCSymbolData *SD = 0;
|
||||
if (Target.getSymA())
|
||||
SD = &Asm.getSymbolData(Target.getSymA()->getSymbol());
|
||||
|
||||
// If this is an internal relocation with an offset, it also needs a scattered
|
||||
// relocation entry.
|
||||
uint32_t Offset = Target.getConstant();
|
||||
if (IsPCRel)
|
||||
Offset += 1 << Log2Size;
|
||||
if (Offset && SD && !Writer->doesSymbolRequireExternRelocation(SD))
|
||||
return RecordScatteredRelocation(Writer, Asm, Layout, Fragment, Fixup,
|
||||
Target, Log2Size, FixedValue);
|
||||
|
||||
// See <reloc.h>.
|
||||
uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
|
||||
unsigned Index = 0;
|
||||
unsigned IsExtern = 0;
|
||||
unsigned Type = 0;
|
||||
|
||||
if (Target.isAbsolute()) { // constant
|
||||
// SymbolNum of 0 indicates the absolute section.
|
||||
//
|
||||
// FIXME: Currently, these are never generated (see code below). I cannot
|
||||
// find a case where they are actually emitted.
|
||||
Type = macho::RIT_Vanilla;
|
||||
} else {
|
||||
// Resolve constant variables.
|
||||
if (SD->getSymbol().isVariable()) {
|
||||
int64_t Res;
|
||||
if (SD->getSymbol().getVariableValue()->EvaluateAsAbsolute(
|
||||
Res, Layout, Writer->getSectionAddressMap())) {
|
||||
FixedValue = Res;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
// Check whether we need an external or internal relocation.
|
||||
if (Writer->doesSymbolRequireExternRelocation(SD)) {
|
||||
IsExtern = 1;
|
||||
Index = SD->getIndex();
|
||||
// For external relocations, make sure to offset the fixup value to
|
||||
// compensate for the addend of the symbol address, if it was
|
||||
// undefined. This occurs with weak definitions, for example.
|
||||
if (!SD->Symbol->isUndefined())
|
||||
FixedValue -= Layout.getSymbolOffset(SD);
|
||||
} else {
|
||||
// The index is the section ordinal (1-based).
|
||||
const MCSectionData &SymSD = Asm.getSectionData(
|
||||
SD->getSymbol().getSection());
|
||||
Index = SymSD.getOrdinal() + 1;
|
||||
FixedValue += Writer->getSectionAddress(&SymSD);
|
||||
}
|
||||
if (IsPCRel)
|
||||
FixedValue -= Writer->getSectionAddress(Fragment->getParent());
|
||||
|
||||
Type = macho::RIT_Vanilla;
|
||||
}
|
||||
|
||||
// struct relocation_info (8 bytes)
|
||||
macho::RelocationEntry MRE;
|
||||
MRE.Word0 = FixupOffset;
|
||||
MRE.Word1 = ((Index << 0) |
|
||||
(IsPCRel << 24) |
|
||||
(Log2Size << 25) |
|
||||
(IsExtern << 27) |
|
||||
(Type << 28));
|
||||
Writer->addRelocation(Fragment->getParent(), MRE);
|
||||
}
|
||||
|
||||
MCObjectWriter *llvm::createX86MachObjectWriter(raw_ostream &OS,
|
||||
bool Is64Bit,
|
||||
uint32_t CPUType,
|
||||
|
||||
Loading…
Reference in New Issue
Block a user