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GlobalISel: make translate* functions take the most specialized class possible.

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NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277188 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2016-07-29 18:11:21 +00:00
parent 9f1f15e084
commit bbdb447778
2 changed files with 17 additions and 18 deletions
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6
include/llvm/CodeGen/GlobalISel/IRTranslator.h
View File

@ -113,17 +113,17 @@ private:
/// Translate \p Inst into a binary operation \p Opcode.
/// \pre \p Inst is a binary operation.
bool translateBinaryOp(unsigned Opcode, const Instruction &Inst);
bool translateBinaryOp(unsigned Opcode, const BinaryOperator &Inst);
/// Translate branch (br) instruction.
/// \pre \p Inst is a branch instruction.
bool translateBr(const Instruction &Inst);
bool translateBr(const BranchInst &Inst);
/// Translate return (ret) instruction.
/// The target needs to implement CallLowering::lowerReturn for
/// this to succeed.
/// \pre \p Inst is a return instruction.
bool translateReturn(const Instruction &Inst);
bool translateReturn(const ReturnInst &Inst);
/// @}
// Builder for machine instruction a la IRBuilder.

29
lib/CodeGen/GlobalISel/IRTranslator.cpp
View File

@ -77,7 +77,10 @@ MachineBasicBlock &IRTranslator::getOrCreateBB(const BasicBlock &BB) {
return *MBB;
}
bool IRTranslator::translateBinaryOp(unsigned Opcode, const Instruction &Inst) {
bool IRTranslator::translateBinaryOp(unsigned Opcode,
const BinaryOperator &Inst) {
// FIXME: handle signed/unsigned wrapping flags.
// Get or create a virtual register for each value.
// Unless the value is a Constant => loadimm cst?
// or inline constant each time?
@ -92,19 +95,15 @@ bool IRTranslator::translateBinaryOp(unsigned Opcode, const Instruction &Inst) {
return true;
}
bool IRTranslator::translateReturn(const Instruction &Inst) {
assert(isa<ReturnInst>(Inst) && "Return expected");
const Value *Ret = cast<ReturnInst>(Inst).getReturnValue();
bool IRTranslator::translateReturn(const ReturnInst &RI) {
const Value *Ret = RI.getReturnValue();
// The target may mess up with the insertion point, but
// this is not important as a return is the last instruction
// of the block anyway.
return CLI->lowerReturn(MIRBuilder, Ret, !Ret ? 0 : getOrCreateVReg(*Ret));
}
bool IRTranslator::translateBr(const Instruction &Inst) {
assert(isa<BranchInst>(Inst) && "Branch expected");
const BranchInst &BrInst = *cast<BranchInst>(&Inst);
bool IRTranslator::translateBr(const BranchInst &BrInst) {
unsigned Succ = 0;
if (!BrInst.isUnconditional()) {
// We want a G_BRCOND to the true BB followed by an unconditional branch.
@ -201,23 +200,23 @@ bool IRTranslator::translate(const Instruction &Inst) {
switch(Inst.getOpcode()) {
// Arithmetic operations.
case Instruction::Add:
return translateBinaryOp(TargetOpcode::G_ADD, Inst);
return translateBinaryOp(TargetOpcode::G_ADD, cast<BinaryOperator>(Inst));
case Instruction::Sub:
return translateBinaryOp(TargetOpcode::G_SUB, Inst);
return translateBinaryOp(TargetOpcode::G_SUB, cast<BinaryOperator>(Inst));
// Bitwise operations.
case Instruction::And:
return translateBinaryOp(TargetOpcode::G_AND, Inst);
return translateBinaryOp(TargetOpcode::G_AND, cast<BinaryOperator>(Inst));
case Instruction::Or:
return translateBinaryOp(TargetOpcode::G_OR, Inst);
return translateBinaryOp(TargetOpcode::G_OR, cast<BinaryOperator>(Inst));
case Instruction::Xor:
return translateBinaryOp(TargetOpcode::G_XOR, Inst);
return translateBinaryOp(TargetOpcode::G_XOR, cast<BinaryOperator>(Inst));
// Branch operations.
case Instruction::Br:
return translateBr(Inst);
return translateBr(cast<BranchInst>(Inst));
case Instruction::Ret:
return translateReturn(Inst);
return translateReturn(cast<ReturnInst>(Inst));
// Casts
case Instruction::BitCast: