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DAGCombiner: Don't narrow volatile vector loads + extract
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273909 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -12263,6 +12263,8 @@ SDValue DAGCombiner::visitINSERT_VECTOR_ELT(SDNode *N) {
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SDValue DAGCombiner::ReplaceExtractVectorEltOfLoadWithNarrowedLoad(
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SDNode *EVE, EVT InVecVT, SDValue EltNo, LoadSDNode *OriginalLoad) {
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assert(!OriginalLoad->isVolatile());
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EVT ResultVT = EVE->getValueType(0);
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EVT VecEltVT = InVecVT.getVectorElementType();
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unsigned Align = OriginalLoad->getAlignment();
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@ -12457,9 +12459,12 @@ SDValue DAGCombiner::visitEXTRACT_VECTOR_ELT(SDNode *N) {
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ISD::isNormalLoad(InVec.getNode()) &&
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!N->getOperand(1)->hasPredecessor(InVec.getNode())) {
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SDValue Index = N->getOperand(1);
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if (LoadSDNode *OrigLoad = dyn_cast<LoadSDNode>(InVec))
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return ReplaceExtractVectorEltOfLoadWithNarrowedLoad(N, VT, Index,
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OrigLoad);
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if (LoadSDNode *OrigLoad = dyn_cast<LoadSDNode>(InVec)) {
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if (!OrigLoad->isVolatile()) {
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return ReplaceExtractVectorEltOfLoadWithNarrowedLoad(N, VT, Index,
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OrigLoad);
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}
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}
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}
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// Perform only after legalization to ensure build_vector / vector_shuffle
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@ -41,3 +41,37 @@ define void @bitcast_int_to_fpvector_extract_0(float addrspace(1)* %out, i64 add
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store float %extract, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}no_extract_volatile_load_extract0:
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; GCN: buffer_load_dwordx4
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; GCN: buffer_store_dword v
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define void @no_extract_volatile_load_extract0(i32 addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
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entry:
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%vec = load volatile <4 x i32>, <4 x i32> addrspace(1)* %in
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%elt0 = extractelement <4 x i32> %vec, i32 0
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store i32 %elt0, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}no_extract_volatile_load_extract2:
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; GCN: buffer_load_dwordx4
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; GCN: buffer_store_dword v
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define void @no_extract_volatile_load_extract2(i32 addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
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entry:
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%vec = load volatile <4 x i32>, <4 x i32> addrspace(1)* %in
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%elt2 = extractelement <4 x i32> %vec, i32 2
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store i32 %elt2, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}no_extract_volatile_load_dynextract:
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; GCN: buffer_load_dwordx4
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; GCN: buffer_store_dword v
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define void @no_extract_volatile_load_dynextract(i32 addrspace(1)* %out, <4 x i32> addrspace(1)* %in, i32 %idx) {
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entry:
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%vec = load volatile <4 x i32>, <4 x i32> addrspace(1)* %in
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%eltN = extractelement <4 x i32> %vec, i32 %idx
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store i32 %eltN, i32 addrspace(1)* %out
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ret void
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}
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